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authorRajeshwari Shinde <rajeshwari.s@samsung.com>2012-07-23 21:23:51 +0000
committerHeiko Schocher <hs@denx.de>2012-07-31 08:02:28 +0200
commitc65c05f57f0ea98c3397dfd41c3bfa29252256f2 (patch)
tree6df7f5859b21c874f15f2f403da9cf144e54fcb1
parent8da3eb1b22f881b72a934b34bf97659f2d1502f0 (diff)
EXYNOS: PINMUX: Add pinmux support for I2C
This patch adds pinmux code for I2C. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/cpu/armv7/exynos/pinmux.c52
-rw-r--r--arch/arm/include/asm/arch-exynos/periph.h8
2 files changed, 60 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index d2b7d2cba7f..d28f05557fe 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -184,6 +184,48 @@ static void exynos5_sromc_config(int flags)
}
}
+static void exynos5_i2c_config(int peripheral, int flags)
+{
+
+ struct exynos5_gpio_part1 *gpio1 =
+ (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+
+ switch (peripheral) {
+ case PERIPH_ID_I2C0:
+ s5p_gpio_cfg_pin(&gpio1->b3, 0, GPIO_FUNC(0x2));
+ s5p_gpio_cfg_pin(&gpio1->b3, 1, GPIO_FUNC(0x2));
+ break;
+ case PERIPH_ID_I2C1:
+ s5p_gpio_cfg_pin(&gpio1->b3, 2, GPIO_FUNC(0x2));
+ s5p_gpio_cfg_pin(&gpio1->b3, 3, GPIO_FUNC(0x2));
+ break;
+ case PERIPH_ID_I2C2:
+ s5p_gpio_cfg_pin(&gpio1->a0, 6, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(&gpio1->a0, 7, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C3:
+ s5p_gpio_cfg_pin(&gpio1->a1, 2, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(&gpio1->a1, 3, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C4:
+ s5p_gpio_cfg_pin(&gpio1->a2, 0, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(&gpio1->a2, 1, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C5:
+ s5p_gpio_cfg_pin(&gpio1->a2, 2, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(&gpio1->a2, 3, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C6:
+ s5p_gpio_cfg_pin(&gpio1->b1, 3, GPIO_FUNC(0x4));
+ s5p_gpio_cfg_pin(&gpio1->b1, 4, GPIO_FUNC(0x4));
+ break;
+ case PERIPH_ID_I2C7:
+ s5p_gpio_cfg_pin(&gpio1->b2, 2, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(&gpio1->b2, 3, GPIO_FUNC(0x3));
+ break;
+ }
+}
+
static int exynos5_pinmux_config(int peripheral, int flags)
{
switch (peripheral) {
@@ -201,6 +243,16 @@ static int exynos5_pinmux_config(int peripheral, int flags)
case PERIPH_ID_SROMC:
exynos5_sromc_config(flags);
break;
+ case PERIPH_ID_I2C0:
+ case PERIPH_ID_I2C1:
+ case PERIPH_ID_I2C2:
+ case PERIPH_ID_I2C3:
+ case PERIPH_ID_I2C4:
+ case PERIPH_ID_I2C5:
+ case PERIPH_ID_I2C6:
+ case PERIPH_ID_I2C7:
+ exynos5_i2c_config(peripheral, flags);
+ break;
default:
debug("%s: invalid peripheral %d", __func__, peripheral);
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
index 5db25aa88a7..b861d7d5842 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -30,6 +30,14 @@
*
*/
enum periph_id {
+ PERIPH_ID_I2C0,
+ PERIPH_ID_I2C1,
+ PERIPH_ID_I2C2,
+ PERIPH_ID_I2C3,
+ PERIPH_ID_I2C4,
+ PERIPH_ID_I2C5,
+ PERIPH_ID_I2C6,
+ PERIPH_ID_I2C7,
PERIPH_ID_SDMMC0,
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,