diff options
| author | Bo Shen <voice.shen@atmel.com> | 2013-04-15 16:02:58 +0800 |
|---|---|---|
| committer | Bo Shen <voice.shen@atmel.com> | 2013-04-18 11:05:45 +0800 |
| commit | adf2f66dbe8840a7bdc09db0e5af67ba36268b14 (patch) | |
| tree | 48009d3ed0453a1171f14ff2047209480c4b473a | |
| parent | c1515d14eae4ee3495ede5a8bb49911c600786e4 (diff) | |
Revert "at91: clock: remove chip macro for plla div2."
The bit 12 of mckr in at91sam9g20 is used for processor clock divisor
while not like at91sam9g45/9m10g45, at91sam9n12, at91sam9x5 used for
PLLA divisor
So commit fe1d568 (at91: clock: remove chip macro for plla div2)
will cause error operation on at91sam9g20
Signed-off-by: Bo Shen <voice.shen@atmel.com>
| -rw-r--r-- | arch/arm/cpu/arm926ejs/at91/clock.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c index 3098beb3194..99e69563547 100644 --- a/arch/arm/cpu/arm926ejs/at91/clock.c +++ b/arch/arm/cpu/arm926ejs/at91/clock.c @@ -154,12 +154,11 @@ int at91_clock_init(unsigned long main_clock) * For now, assume this parentage won't change. */ mckr = readl(&pmc->mckr); - - /* plla divisor by 2, Only for AT91SAM9G45, 9M10G45, 9X5, 9N12 */ - /* For other AT91 chip, the bit 12 of MCKR is reserved, default is 0 */ - if (mckr & (1 << 12)) - gd->plla_rate_hz >>= 1; - +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \ + || defined(CONFIG_AT91SAM9X5) + /* plla divisor by 2 */ + gd->plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12)); +#endif gd->mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK); freq = gd->mck_rate_hz; |