Enable OF_CONTROL for Alex.

This change makes the Alex u-boot use configuration settings
coming from the device tree supplied by coreboot through the
coreboot table.

The device tree now includes the necessary console configuration
information.

Code is added to retrieve the device tree pointer from the
coreboot table, the appropriate coreboot structures and tag
values are being duplicated in
arch/i386/include/asm/ic/coreboot/tables.h. The pointer to the
FDT is added to the global data structure, it is initialized as
soon as it is retrieved from the coreboot table.

For some reason placing the global data structure anywhere but in
the .data segment causes the system to crash. This phenomenon
will be investigated shortly, this commit is an intermediate step
to get the device tree handover used by other coreboot/u-boot
contributors.

Core retrieving the device tree from CBFS is not needed anymore
and gets removed.

BUG=chrome-os-partner:5248
TEST=manual
 . build the new image and program it on Alex
 . restart the target, observe the console output

The target boots all the way to u-boot prompt.

Change-Id: I087cf70362ede0873be37fa5a98aa66a0b979d8f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://gerrit.chromium.org/gerrit/6132
Reviewed-by: Stefan Reinauer <reinauer@google.com>

10 files changed, 79 insertions, 48 deletions

diff --git a/arch/x86/cpu/coreboot/tables.c b/arch/x86/cpu/coreboot/tables.c
index e693f4457db..2cb4a426ab6 100644
--- a/arch/x86/cpu/coreboot/tables.c
+++ b/arch/x86/cpu/coreboot/tables.c
@@ -28,6 +28,7 @@
  * SUCH DAMAGE.
  */
 
+#include <common.h>
 #include <asm/ic/coreboot/ipchecksum.h>
 #include <asm/ic/coreboot/sysinfo.h>
 #include <asm/ic/coreboot/tables.h>
@@ -116,6 +117,11 @@ static void cb_parse_gpios(unsigned char *ptr, struct sysinfo_t *info)
 		info->gpios[i] = gpios->gpios[i];
 }
 
+static void cb_parse_fdt(unsigned char *ptr, struct sysinfo_t *info)
+{
+	info->sys_fdt = (struct fdt_header *)(((struct cb_fdt *)ptr) + 1);
+}
+
 static void cb_parse_framebuffer(unsigned char *ptr, struct sysinfo_t *info)
 {
 	info->framebuffer = (struct cb_framebuffer *)ptr;
@@ -216,6 +222,10 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
 			break;
 		case CB_TAG_GPIO:
 			cb_parse_gpios(ptr, info);
+			break;
+		case CB_TAG_FDT:
+			cb_parse_fdt(ptr, info);
+			break;
 		}
 
 		ptr += rec->size;
diff --git a/arch/x86/include/asm/ic/coreboot/sysinfo.h b/arch/x86/include/asm/ic/coreboot/sysinfo.h
index 86caaa339de..e02735346bd 100644
--- a/arch/x86/include/asm/ic/coreboot/sysinfo.h
+++ b/arch/x86/include/asm/ic/coreboot/sysinfo.h
@@ -32,6 +32,9 @@
 
 #include <compiler.h>
 #include <asm/ic/coreboot/tables.h>
+#ifdef CONFIG_OF_CONTROL
+#include <fdt.h>
+#endif
 
 /* Allow a maximum of 16 memory range definitions. */
 #define SYSINFO_MAX_MEM_RANGES 16
@@ -75,6 +78,9 @@ struct sysinfo_t {
 	struct cb_gpio gpios[SYSINFO_MAX_GPIOS];
 
 	unsigned long *mbtable; /** Pointer to the multiboot table */
+#ifdef CONFIG_OF_CONTROL
+	struct fdt_header *sys_fdt;
+#endif
 };
 
 extern struct sysinfo_t lib_sysinfo;
diff --git a/arch/x86/include/asm/ic/coreboot/tables.h b/arch/x86/include/asm/ic/coreboot/tables.h
index e9a0c7ba968..b581e7285f3 100644
--- a/arch/x86/include/asm/ic/coreboot/tables.h
+++ b/arch/x86/include/asm/ic/coreboot/tables.h
@@ -181,6 +181,13 @@ struct cb_gpios {
 	struct cb_gpio gpios[0];
 };
 
+#define CB_TAG_FDT	0x0014
+struct cb_fdt {
+	uint32_t tag;
+	uint32_t size;	/* size of the entire entry */
+	/* the actual FDT gets placed here */
+};
+
 #define CB_TAG_CMOS_OPTION_TABLE 0x00c8
 struct cb_cmos_option_table {
 	u32 tag;
diff --git a/arch/x86/lib/board.c b/arch/x86/lib/board.c
index c882a55bd7e..2acd7a725e0 100644
--- a/arch/x86/lib/board.c
+++ b/arch/x86/lib/board.c
@@ -56,8 +56,17 @@
  */
 #undef	XTRN_DECLARE_GLOBAL_DATA_PTR
 #define XTRN_DECLARE_GLOBAL_DATA_PTR	/* empty = allocate here */
+#ifdef CONFIG_OF_CONTROL
+/*
+ * Place it in the initialized data segment, we were started by a bootstrap
+ * which already intialized memory.
+ */
+static gd_t gd_before_relocation = { .env_buf = { 0x20 } };
+DECLARE_GLOBAL_DATA_PTR = &gd_before_relocation;
+#else
+/* place it at a fixed location */
 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
-
+#endif
 
 /* Exports from the Linker Script */
 extern ulong __text_start;
@@ -187,8 +196,6 @@ init_fnc_t *init_sequence_r[] = {
 	NULL,
 };
 
-gd_t *gd;
-
 static int calculate_relocation_address(void)
 {
 	void *text_start = &__text_start;
@@ -264,6 +271,16 @@ void board_init_f(ulong boot_flags)
 {
 	init_fnc_t **init_fnc_ptr;
 
+	/*
+	 * TODO(vbendeb): find the reason for the crash and fix it. Then the
+	 * below two lines will be removed.
+	 *
+	 * This is a hack to work around the problem with the system crashing
+	 * when the gd is located at a fixed address in memory. We use the
+	 * structure located in the .data segment instead, and make it look as
+	 * if it was initialized by the assembler startup code.
+	 */
+	memset(gd, 0, sizeof(*gd));
 	gd->flags = boot_flags;
 
 	for (init_fnc_ptr = init_sequence_f; *init_fnc_ptr; ++init_fnc_ptr) {
@@ -273,6 +290,8 @@ void board_init_f(ulong boot_flags)
 
 	gd->flags |= GD_FLG_RELOC;
 
+	printf("Relocating to %p\n", (void *)gd->relocaddr);
+
 	/* Enter the relocated U-Boot! */
 	relocate_code(gd->start_addr_sp, gd, gd->relocaddr);
 
@@ -297,8 +316,6 @@ void board_init_r(gd_t *id, ulong dest_addr)
 	/* compiler optimization barrier needed for GCC >= 3.4 */
 	__asm__ __volatile__("": : :"memory");
 
-	gd->blob = NULL;
-
 	gd->bd = &bd_data;
 	memset (gd->bd, 0, sizeof (bd_t));
 	show_boot_progress(0x22);
diff --git a/board/chromebook-x86/coreboot/coreboot.c b/board/chromebook-x86/coreboot/coreboot.c
index e660ddbca40..aee296dc030 100644
--- a/board/chromebook-x86/coreboot/coreboot.c
+++ b/board/chromebook-x86/coreboot/coreboot.c
@@ -51,6 +51,8 @@ int cpu_init_f(void)
 	if (ret != 0) {
 		printf("Failed to parse coreboot tables.\n");
 	}
+	gd->blob = lib_sysinfo.sys_fdt;
+
 	return ret;
 }
 
@@ -61,40 +63,6 @@ int board_early_init_f(void)
 
 int board_early_init_r(void)
 {
-#if defined CONFIG_CMD_CBFS && defined CONFIG_OF_CONTROL
-	CbfsFile file;
-	void *dtb;
-	u32 size;
-
-	file_cbfs_init(0xffffffff);
-	if (file_cbfs_result != CBFS_SUCCESS) {
-		printf("%s.\n", file_cbfs_error());
-		goto cbfs_failed;
-	}
-	file = file_cbfs_find("u-boot.dtb");
-	if (!file) {
-		if (file_cbfs_result != CBFS_FILE_NOT_FOUND)
-			printf("%s.\n", file_cbfs_error());
-		goto cbfs_failed;
-	}
-	size = file_cbfs_size(file);
-	if (file_cbfs_result != CBFS_SUCCESS) {
-		printf("%s.\n", file_cbfs_error());
-		goto cbfs_failed;
-	}
-	dtb = malloc(size);
-	if (!dtb) {
-		printf("Bad allocation!\n");
-		goto cbfs_failed;
-	}
-	if (size != file_cbfs_read(file, dtb, size)) {
-		free(dtb);
-		printf("%s.\n", file_cbfs_error());
-		goto cbfs_failed;
-	}
-	gd->blob = dtb;
-cbfs_failed:
-#endif /* CONFIG_CMD_CBFS && CONFIG_OF_CONTROL */
 	return 0;
 }
 
diff --git a/board/chromebook-x86/coreboot/x86-alex.dts b/board/chromebook-x86/coreboot/x86-alex.dts
index fb5fe903f2a..bd90d185f1c 100644
--- a/board/chromebook-x86/coreboot/x86-alex.dts
+++ b/board/chromebook-x86/coreboot/x86-alex.dts
@@ -3,7 +3,28 @@
 / {
         #address-cells = <1>;
         #size-cells = <1>;
+	model = "Google Alex";
+	compatible = "google,alex", "intel,atom-pineview";
+
+	config {
+	       silent_console = <0>;
+	};
+
+	aliases {
+		console = "/serial@e0401000";
+	};
+
+	serial@e0401000 {
+		compatible = "ns16550";
+		reg = <0xe0401000 0x40>;
+		id = <1>;
+		reg-shift = <1>;
+		baudrate = <115200>;
+		clock-frequency = <4000000>;
+		multiplier = <1>;
+		status = "ok";
+	};
+
         chosen { };
-        aliases { };
         memory { device_type = "memory"; reg = <0 0>; };
 };
diff --git a/common/cmd_vboot_twostop.c b/common/cmd_vboot_twostop.c
index 44a30b615af..7f1db7b8a26 100644
--- a/common/cmd_vboot_twostop.c
+++ b/common/cmd_vboot_twostop.c
@@ -149,7 +149,7 @@ twostop_init_cparams(struct twostop_fmap *fmap, void *gbb,
 	return 0;
 }
 
-#ifdef CONFIG_OF_CONTROL
+#if defined(CONFIG_OF_CONTROL) && defined(CONFIG_TEGRA2)
 static uintptr_t
 get_current_sp(void)
 {
@@ -163,7 +163,7 @@ get_current_sp(void)
 static void
 wipe_unused_memory(crossystem_data_t *cdata, VbCommonParams *cparams)
 {
-#ifdef CONFIG_OF_CONTROL
+#if defined(CONFIG_OF_CONTROL) && defined(CONFIG_TEGRA2)
 	int fb_size, lcd_line_length;
 	memory_wipe_t wipe;
 	struct fdt_memory config;
@@ -194,9 +194,6 @@ wipe_unused_memory(crossystem_data_t *cdata, VbCommonParams *cparams)
 			    (uintptr_t)gd->fb_base + fb_size);
 
 	memory_wipe_execute(&wipe);
-#else
-	printf("wipe_unused_memory depends on fdt_decode_memory which"
-		" isn't configured\n");
 #endif
 }
 
diff --git a/common/fdt_decode.c b/common/fdt_decode.c
index 666f36d309b..147ef45e049 100644
--- a/common/fdt_decode.c
+++ b/common/fdt_decode.c
@@ -285,7 +285,7 @@ int fdt_decode_uart_console(const void *blob, struct fdt_uart *uart,
 	uart->compat = fdt_decode_lookup(blob, node);
 
 	/* Calculate divisor if required */
-	if (uart->divisor == -1)
+	if ((uart->divisor == -1) && (uart->clock_freq != -1))
 		fdt_decode_uart_calc_divisor(uart);
 	return 0;
 }
diff --git a/common/main.c b/common/main.c
index 2f9302dbba0..6e45d39a4a9 100644
--- a/common/main.c
+++ b/common/main.c
@@ -285,8 +285,8 @@ static __inline__ int abortboot(int bootdelay)
  * printing the error message to console.
  */
 
-#ifdef CONFIG_OF_CONTROL
-
+#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0) && \
+	defined(CONFIG_OF_CONTROL)
 static void secure_boot_cmd(char *cmd)
 {
 	cmd_tbl_t *cmdtp;
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index 2e8bd39b8ba..3a1eafca9a3 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -74,6 +74,7 @@
  * Serial Configuration
  */
 #define CONFIG_SERIAL_MULTI
+#define CONFIG_SYS_NS16550
 #define CONFIG_BAUDRATE			9600
 #define CONFIG_SYS_BAUDRATE_TABLE	{300, 600, 1200, 2400, 4800, \
 					 9600, 19200, 38400, 115200}
@@ -315,4 +316,8 @@
 #define CONFIG_LZMA		1
 #define CONFIG_SPLASH_SCREEN	1
 
+	/* FDT stuff */
+#define CONFIG_OF_LIBFDT
+#define CONFIG_OF_CONTROL
+
 #endif	/* __CONFIG_H */