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authorStefan Roese <sr@denx.de>2008-06-02 17:37:28 +0200
committerStefan Roese <sr@denx.de>2008-06-03 20:22:19 +0200
commitbbeff30cbd1c5d551eb0ad1c2239ec01844c0b0a (patch)
tree48f48eadf87f5bc67d2673b7f1ba58a77e882dc2
parent192f90e272b3989ee7b4a666d1fdab831f20f8d2 (diff)
ppc4xx: Remove superfluous dram_init() call or replace it by initdram()
Historically the 405 U-Boot port had a dram_init() call in early init stage. This function was still called from start.S and most of the time coded in assembler. This is not needed anymore (since a long time) and boards should implement the common initdram() function in C instead. This patch now removed the dram_init() call from start.S and removes the empty implementations that are scattered through most of the 405 board ports. Some older board ports really implement this dram_init() though. These are: csb272 csb472 ERIC EXBITGEN W7OLMC W7OLMG I changed those boards to call this assembler dram_init() function now from their board specific initdram() instead. This *should* work, but please test again on those platforms. And it is perhaps a good idea that those boards use some common 405 SDRAM initialization code from cpu/ppc4xx at some time. So further patches welcome here. Signed-off-by: Stefan Roese <sr@denx.de>
-rw-r--r--board/amcc/acadia/memory.c15
-rw-r--r--board/amcc/bubinga/bubinga.c16
-rw-r--r--board/amcc/makalu/makalu.c5
-rw-r--r--board/amcc/walnut/walnut.c16
-rw-r--r--board/amcc/yosemite/yosemite.c52
-rw-r--r--board/amirix/ap1000/init.S4
-rw-r--r--board/cray/L1/init.S11
-rw-r--r--board/csb272/csb272.c9
-rw-r--r--board/csb472/csb472.c9
-rw-r--r--board/eric/eric.c8
-rw-r--r--board/esd/ar405/ar405.c22
-rw-r--r--board/esd/canbt/canbt.c19
-rw-r--r--board/exbitgen/exbitgen.c9
-rw-r--r--board/g2000/g2000.c35
-rw-r--r--board/jse/init.S10
-rw-r--r--board/ml2/init.S4
-rw-r--r--board/mpl/mip405/init.S13
-rw-r--r--board/mpl/pip405/init.S13
-rw-r--r--board/netstal/hcu4/hcu4.c9
-rw-r--r--board/netstal/hcu5/sdram.c26
-rw-r--r--board/netstal/mcu25/mcu25.c9
-rw-r--r--board/w7o/w7o.c8
-rw-r--r--board/xilinx/ml300/init.S4
-rw-r--r--cpu/ppc4xx/sdram.c10
-rw-r--r--cpu/ppc4xx/start.S6
25 files changed, 56 insertions, 286 deletions
diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c
index 709d41e41aa..3dec3159a59 100644
--- a/board/amcc/acadia/memory.c
+++ b/board/amcc/acadia/memory.c
@@ -33,14 +33,6 @@
extern void board_pll_init_f(void);
-/*
- * sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
- */
-void sdram_init(void)
-{
- return;
-}
-
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
static void cram_bcr_write(u32 wr_val)
{
@@ -116,10 +108,3 @@ long int initdram(int board_type)
return (CFG_MBYTES_RAM << 20);
}
-
-#ifndef CONFIG_NAND_SPL
-int testdram(void)
-{
- return (0);
-}
-#endif
diff --git a/board/amcc/bubinga/bubinga.c b/board/amcc/bubinga/bubinga.c
index 66e7509da89..9d508b8937e 100644
--- a/board/amcc/bubinga/bubinga.c
+++ b/board/amcc/bubinga/bubinga.c
@@ -66,14 +66,6 @@ int checkboard(void)
return (0);
}
-/*
- * sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
- */
-void sdram_init(void)
-{
- return;
-}
-
/* -------------------------------------------------------------------------
initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
the necessary info for SDRAM controller configuration
@@ -85,11 +77,3 @@ long int initdram(int board_type)
ret = spd_sdram();
return ret;
}
-
-int testdram(void)
-{
- /* TODO: XXX XXX XXX */
- printf("test: xxx MB - ok\n");
-
- return (0);
-}
diff --git a/board/amcc/makalu/makalu.c b/board/amcc/makalu/makalu.c
index adf604f3ab3..9baec9af67a 100644
--- a/board/amcc/makalu/makalu.c
+++ b/board/amcc/makalu/makalu.c
@@ -351,8 +351,3 @@ void ft_board_setup(void *blob, bd_t *bd)
fdt_strerror(rc));
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
-
-void sdram_init(void)
-{
- return;
-}
diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c
index 292e02609e2..641987e871c 100644
--- a/board/amcc/walnut/walnut.c
+++ b/board/amcc/walnut/walnut.c
@@ -86,14 +86,6 @@ int checkboard(void)
}
/*
- * sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
- */
-void sdram_init(void)
-{
- return;
-}
-
-/*
* initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
* the necessary info for SDRAM controller configuration
*/
@@ -101,11 +93,3 @@ long int initdram(int board_type)
{
return spd_sdram();
}
-
-int testdram(void)
-{
- /* TODO: XXX XXX XXX */
- printf("test: xxx MB - ok\n");
-
- return (0);
-}
diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c
index 212fab8d08e..83455375def 100644
--- a/board/amcc/yosemite/yosemite.c
+++ b/board/amcc/yosemite/yosemite.c
@@ -200,7 +200,7 @@ int checkboard(void)
}
/*************************************************************************
- * sdram_init -- doesn't use serial presence detect.
+ * initdram -- doesn't use serial presence detect.
*
* Assumes: 256 MB, ECC, non-registered
* PLB @ 133 MHz
@@ -281,7 +281,7 @@ void sdram_tr1_set(int ram_address, int* tr1_value)
*tr1_value = (first_good + last_bad) / 2;
}
-void sdram_init(void)
+long int initdram(int board)
{
register uint reg;
int tr1_bank1, tr1_bank2;
@@ -327,57 +327,11 @@ void sdram_init(void)
sdram_tr1_set(0x00000000, &tr1_bank1);
sdram_tr1_set(0x08000000, &tr1_bank2);
- mtsdram(mem_tr1, (((tr1_bank1+tr1_bank2)/2) | 0x80800800) );
-}
+ mtsdram(mem_tr1, (((tr1_bank1+tr1_bank2)/2) | 0x80800800));
-/*************************************************************************
- * long int initdram
- *
- ************************************************************************/
-long int initdram(int board)
-{
- sdram_init();
return CFG_SDRAM_BANKS * (CFG_KBYTES_SDRAM * 1024); /* return bytes */
}
-#if defined(CFG_DRAM_TEST)
-int testdram(void)
-{
- unsigned long *mem = (unsigned long *)0;
- const unsigned long kend = (1024 / sizeof(unsigned long));
- unsigned long k, n;
-
- mtmsr(0);
-
- for (k = 0; k < CFG_KBYTES_SDRAM;
- ++k, mem += (1024 / sizeof(unsigned long))) {
- if ((k & 1023) == 0) {
- printf("%3d MB\r", k / 1024);
- }
-
- memset(mem, 0xaaaaaaaa, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0xaaaaaaaa) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
-
- memset(mem, 0x55555555, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0x55555555) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
- }
- printf("SDRAM test passes\n");
- return 0;
-}
-#endif
-
/*************************************************************************
* pci_pre_init
*
diff --git a/board/amirix/ap1000/init.S b/board/amirix/ap1000/init.S
index 3aaa5c2f1a5..65f13e17a64 100644
--- a/board/amirix/ap1000/init.S
+++ b/board/amirix/ap1000/init.S
@@ -28,7 +28,3 @@
.globl ext_bus_cntlr_init
ext_bus_cntlr_init:
blr
-
- .globl sdram_init
-sdram_init:
- blr
diff --git a/board/cray/L1/init.S b/board/cray/L1/init.S
index 72a10d3a1bf..4b6b3f40030 100644
--- a/board/cray/L1/init.S
+++ b/board/cray/L1/init.S
@@ -134,14 +134,3 @@ ext_bus_cntlr_init:
mtdcr ebccfgd,r4
blr
-
-/*----------------------------------------------------------------------------- */
-/* Function: sdram_init */
-/* Description: Configures SDRAM memory banks. */
-/* NOTE: for CrayL1 we have ECC memory, so enable it. */
-/*....now done in C in L1.c:init_sdram for readability. */
-/*----------------------------------------------------------------------------- */
- .globl sdram_init
-
-sdram_init:
- blr
diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c
index 24c6f0d9869..640412d10d1 100644
--- a/board/csb272/csb272.c
+++ b/board/csb272/csb272.c
@@ -27,6 +27,8 @@
#include <miiphy.h>
#include <ppc4xx_enet.h>
+void sdram_init(void);
+
/*
* Configuration data for AMIS FS6377-01 Programmable 3-PLL Clock Generator
*
@@ -124,6 +126,13 @@ long initdram (int board_type)
ulong bank_size;
ulong tmp;
+ /*
+ * ToDo: Move the asm init routine sdram_init() to this C file,
+ * or even better use some common ppc4xx code available
+ * in cpu/ppc4xx
+ */
+ sdram_init();
+
tot_size = 0;
mtdcr (memcfga, mem_mb0cf);
diff --git a/board/csb472/csb472.c b/board/csb472/csb472.c
index 833bbce923d..1fbf17f9441 100644
--- a/board/csb472/csb472.c
+++ b/board/csb472/csb472.c
@@ -27,6 +27,8 @@
#include <miiphy.h>
#include <ppc4xx_enet.h>
+void sdram_init(void);
+
/*
* board_early_init_f: do early board initialization
*
@@ -92,6 +94,13 @@ long initdram (int board_type)
ulong bank_size;
ulong tmp;
+ /*
+ * ToDo: Move the asm init routine sdram_init() to this C file,
+ * or even better use some common ppc4xx code available
+ * in cpu/ppc4xx
+ */
+ sdram_init();
+
tot_size = 0;
mtdcr (memcfga, mem_mb0cf);
diff --git a/board/eric/eric.c b/board/eric/eric.c
index 5413ae15c75..14ba9b0a413 100644
--- a/board/eric/eric.c
+++ b/board/eric/eric.c
@@ -31,6 +31,8 @@
#define PPC405GP_GPIO0_ODR 0xef600718 /* GPIO Open Drain */
#define PPC405GP_GPIO0_IR 0xef60071c /* GPIO Input */
+void sdram_init(void);
+
int board_early_init_f (void)
{
@@ -127,6 +129,12 @@ long int initdram (int board_type)
int TotalSize;
#endif
+ /*
+ * ToDo: Move the asm init routine sdram_init() to this C file,
+ * or even better use some common ppc4xx code available
+ * in cpu/ppc4xx
+ */
+ sdram_init();
#ifdef CONFIG_ERIC
/*
diff --git a/board/esd/ar405/ar405.c b/board/esd/ar405/ar405.c
index dfead3363c2..3abcfe690e9 100644
--- a/board/esd/ar405/ar405.c
+++ b/board/esd/ar405/ar405.c
@@ -190,28 +190,6 @@ int checkboard (void)
return 0;
}
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
#if 1 /* test-only: some internal test routines... */
/*
diff --git a/board/esd/canbt/canbt.c b/board/esd/canbt/canbt.c
index 055a3977306..30fa605abb6 100644
--- a/board/esd/canbt/canbt.c
+++ b/board/esd/canbt/canbt.c
@@ -181,22 +181,3 @@ int checkboard (void)
return 0;
}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- return (16 * 1024 * 1024);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/exbitgen/exbitgen.c b/board/exbitgen/exbitgen.c
index 39a97225f8c..49031cfce66 100644
--- a/board/exbitgen/exbitgen.c
+++ b/board/exbitgen/exbitgen.c
@@ -3,6 +3,8 @@
#include <common.h>
#include "exbitgen.h"
+void sdram_init(void);
+
/* ************************************************************************ */
int board_early_init_f (void)
/* ------------------------------------------------------------------------ --
@@ -83,6 +85,13 @@ long int initdram (int board_type)
ulong bank_size;
ulong tmp;
+ /*
+ * ToDo: Move the asm init routine sdram_init() to this C file,
+ * or even better use some common ppc4xx code available
+ * in cpu/ppc4xx
+ */
+ sdram_init();
+
tot_size = 0;
mtdcr (memcfga, mem_mb0cf);
diff --git a/board/g2000/g2000.c b/board/g2000/g2000.c
index 2dfd87c78e5..9fcab748498 100644
--- a/board/g2000/g2000.c
+++ b/board/g2000/g2000.c
@@ -149,41 +149,6 @@ long int initdram (int board_type)
}
-#if 1 /* test-only */
-void sdram_init(void)
-{
- init_sdram_static_settings();
-}
-#endif
-
-
-#if 0 /* test-only */
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-#endif
-
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-
#if defined(CONFIG_CMD_NAND)
#include <linux/mtd/nand_legacy.h>
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
diff --git a/board/jse/init.S b/board/jse/init.S
index 231cd1caf56..c564ed3c94e 100644
--- a/board/jse/init.S
+++ b/board/jse/init.S
@@ -93,13 +93,3 @@ ext_bus_cntlr_init:
mtdcr ebccfgd,r4
blr
-
-
-/*----------------------------------------------------------------------- */
-/* Function: sdram_init */
-/* Description: This function is called by cpu/ppc4xx/start.S code */
-/* to get the SDRAM initialized. */
-/*----------------------------------------------------------------------- */
- .globl sdram_init
-sdram_init:
- blr
diff --git a/board/ml2/init.S b/board/ml2/init.S
index 80f98c5bd90..9064d3b669b 100644
--- a/board/ml2/init.S
+++ b/board/ml2/init.S
@@ -28,7 +28,3 @@
.globl ext_bus_cntlr_init
ext_bus_cntlr_init:
blr
-
- .globl sdram_init
-sdram_init:
- blr
diff --git a/board/mpl/mip405/init.S b/board/mpl/mip405/init.S
index 3351b5b840e..f00a871dfd5 100644
--- a/board/mpl/mip405/init.S
+++ b/board/mpl/mip405/init.S
@@ -178,19 +178,6 @@ ext_bus_cntlr_init:
nop /* pass2 DCR errata #8 */
blr
-/*-----------------------------------------------------------------------------
- * Function: sdram_init
- * Description: Configures the internal SRAM memory. and setup the
- * Stackpointer in it.
- *----------------------------------------------------------------------------- */
- .globl sdram_init
-
-sdram_init:
-
-
- blr
-
-
#if defined(CONFIG_BOOT_PCI)
.section .bootpg,"ax"
.globl _start_pci
diff --git a/board/mpl/pip405/init.S b/board/mpl/pip405/init.S
index 39f2ea534ae..838432525de 100644
--- a/board/mpl/pip405/init.S
+++ b/board/mpl/pip405/init.S
@@ -175,19 +175,6 @@
nop /* pass2 DCR errata #8 */
blr
-/*-----------------------------------------------------------------------------
- * Function: sdram_init
- * Description: Configures the internal SRAM memory. and setup the
- * Stackpointer in it.
- *----------------------------------------------------------------------------- */
- .globl sdram_init
-
-sdram_init:
-
-
- blr
-
-
#if defined(CONFIG_BOOT_PCI)
.section .bootpg,"ax"
.globl _start_pci
diff --git a/board/netstal/hcu4/hcu4.c b/board/netstal/hcu4/hcu4.c
index dc526fcd7aa..42c7c16cdf0 100644
--- a/board/netstal/hcu4/hcu4.c
+++ b/board/netstal/hcu4/hcu4.c
@@ -121,15 +121,6 @@ void hcu_led_set(u32 value)
}
/*
- * sdram_init - Dummy implementation for start.S, spd_sdram or initdram
- * used for HCUx
- */
-void sdram_init(void)
-{
- return;
-}
-
-/*
* hcu_get_slot
*/
u32 hcu_get_slot(void)
diff --git a/board/netstal/hcu5/sdram.c b/board/netstal/hcu5/sdram.c
index 6b1b53a4d05..d8817b831af 100644
--- a/board/netstal/hcu5/sdram.c
+++ b/board/netstal/hcu5/sdram.c
@@ -40,28 +40,6 @@
void hcu_led_set(u32 value);
void dcbz_area(u32 start_address, u32 num_bytes);
-#define DDR_DCR_BASE 0x10
-#define ddrcfga (DDR_DCR_BASE+0x0) /* DDR configuration address reg */
-#define ddrcfgd (DDR_DCR_BASE+0x1) /* DDR configuration data reg */
-
-#define DDR0_01_INT_MASK_MASK 0x000000FF
-#define DDR0_00_INT_ACK_ALL 0x7F000000
-#define DDR0_01_INT_MASK_ALL_ON 0x000000FF
-#define DDR0_01_INT_MASK_ALL_OFF 0x00000000
-
-#define DDR0_17_DLLLOCKREG_MASK 0x00010000 /* Read only */
-#define DDR0_17_DLLLOCKREG_UNLOCKED 0x00000000
-#define DDR0_17_DLLLOCKREG_LOCKED 0x00010000
-
-#define DDR0_22 0x16
-/* ECC */
-#define DDR0_22_CTRL_RAW_MASK 0x03000000
-#define DDR0_22_CTRL_RAW_ECC_DISABLE 0x00000000 /* ECC not enabled */
-#define DDR0_22_CTRL_RAW_ECC_CHECK_ONLY 0x01000000 /* ECC no correction */
-#define DDR0_22_CTRL_RAW_NO_ECC_RAM 0x02000000 /* Not a ECC RAM*/
-#define DDR0_22_CTRL_RAW_ECC_ENABLE 0x03000000 /* ECC correcting on */
-#define DDR0_03_CASLAT_DECODE(n) ((((unsigned long)(n))>>16)&0x7)
-
#define ECC_RAM 0x03267F0B
#define NO_ECC_RAM 0x00267F0B
@@ -111,11 +89,11 @@ static int wait_for_dlllock(void)
/* -----------------------------------------------------------+
* Wait for the DCC master delay line to finish calibration
* ----------------------------------------------------------*/
- mtdcr(ddrcfga, DDR0_17);
+ mtdcr(memcfga, DDR0_17);
val = DDR0_17_DLLLOCKREG_UNLOCKED;
while (wait != 0xffff) {
- val = mfdcr(ddrcfgd);
+ val = mfdcr(memcfgd);
if ((val & DDR0_17_DLLLOCKREG_MASK) ==
DDR0_17_DLLLOCKREG_LOCKED)
/* dlllockreg bit on */
diff --git a/board/netstal/mcu25/mcu25.c b/board/netstal/mcu25/mcu25.c
index 2b21444e2d2..07891f6785a 100644
--- a/board/netstal/mcu25/mcu25.c
+++ b/board/netstal/mcu25/mcu25.c
@@ -128,15 +128,6 @@ void hcu_led_set(u32 value)
}
/*
- * sdram_init - Dummy implementation for start.S, spd_sdram or initdram
- * used for HCUx
- */
-void sdram_init(void)
-{
- return;
-}
-
-/*
* hcu_get_slot
*/
u32 hcu_get_slot(void)
diff --git a/board/w7o/w7o.c b/board/w7o/w7o.c
index c56c269daec..7a3d63a4bf3 100644
--- a/board/w7o/w7o.c
+++ b/board/w7o/w7o.c
@@ -31,6 +31,7 @@
#include <watchdog.h>
unsigned long get_dram_size (void);
+void sdram_init(void);
/*
* Macros to transform values
@@ -153,6 +154,13 @@ int checkboard (void)
long int initdram (int board_type)
{
+ /*
+ * ToDo: Move the asm init routine sdram_init() to this C file,
+ * or even better use some common ppc4xx code available
+ * in cpu/ppc4xx
+ */
+ sdram_init();
+
return get_dram_size ();
}
diff --git a/board/xilinx/ml300/init.S b/board/xilinx/ml300/init.S
index f753df851aa..a282c9ae228 100644
--- a/board/xilinx/ml300/init.S
+++ b/board/xilinx/ml300/init.S
@@ -42,7 +42,3 @@
.globl ext_bus_cntlr_init
ext_bus_cntlr_init:
blr
-
- .globl sdram_init
-sdram_init:
- blr
diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c
index 901d650cea1..c7771addaac 100644
--- a/cpu/ppc4xx/sdram.c
+++ b/cpu/ppc4xx/sdram.c
@@ -164,7 +164,7 @@ static ulong compute_rtr(ulong speed, ulong rows, ulong refresh)
/*
* Autodetect onboard SDRAM on 405 platforms
*/
-void sdram_init(void)
+long int initdram(int board_type)
{
ulong speed;
ulong sdtr1;
@@ -232,9 +232,15 @@ void sdram_init(void)
mtsdram(mem_mcopt1, 0);
}
#endif
- return;
+
+ /*
+ * OK, size detected -> all done
+ */
+ return mb0cf[i].size;
}
}
+
+ return 0;
}
#else /* CONFIG_440 */
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index 25ee36932f9..426bf3c6f9a 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -217,7 +217,6 @@
.extern ext_bus_cntlr_init
- .extern sdram_init
#ifdef CONFIG_NAND_U_BOOT
.extern reconfig_tlb0
#endif
@@ -1119,11 +1118,6 @@ _start:
stw r0, +12(r1) /* Save return addr (underflow vect) */
#endif /* CFG_INIT_DCACHE_CS */
- /*----------------------------------------------------------------------- */
- /* Initialize SDRAM Controller */
- /*----------------------------------------------------------------------- */
- bl sdram_init
-
#ifdef CONFIG_NAND_SPL
bl nand_boot_common /* will not return */
#else