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authorSimon Glass <sjg@chromium.org>2017-06-14 21:28:48 -0600
committerSimon Glass <sjg@chromium.org>2017-07-11 10:08:19 -0600
commit32e9ec1f8812ffe5874a2e3a0a1b8fe85c489ab8 (patch)
tree60ba9f2abbb2fd4a40c7c78a6c279445863ab452
parent7337fcd8c0aeee0a90eb2e986bde5eb7177b8552 (diff)
x86: Move link to use driver model for SCSI
As a demonstration of how to use SCSI with driver model, move link over to use this. This patch needs more work, but illustrates the concept. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-rw-r--r--arch/x86/cpu/ivybridge/sata.c22
-rw-r--r--configs/chromebook_link64_defconfig2
-rw-r--r--configs/chromebook_link_defconfig2
-rw-r--r--configs/chromebox_panther_defconfig2
4 files changed, 27 insertions, 1 deletions
diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c
index 0f5e190425..462b7c09dd 100644
--- a/arch/x86/cpu/ivybridge/sata.c
+++ b/arch/x86/cpu/ivybridge/sata.c
@@ -6,6 +6,7 @@
*/
#include <common.h>
+#include <ahci.h>
#include <dm.h>
#include <fdtdec.h>
#include <asm/io.h>
@@ -208,6 +209,20 @@ static void bd82x6x_sata_enable(struct udevice *dev)
dm_pci_write_config16(dev, 0x90, map);
}
+static int bd82x6x_sata_bind(struct udevice *dev)
+{
+ struct udevice *scsi_dev;
+ int ret;
+
+ if (gd->flags & GD_FLG_RELOC) {
+ ret = ahci_bind_scsi(dev, &scsi_dev);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static int bd82x6x_sata_probe(struct udevice *dev)
{
struct udevice *pch;
@@ -219,8 +234,12 @@ static int bd82x6x_sata_probe(struct udevice *dev)
if (!(gd->flags & GD_FLG_RELOC))
bd82x6x_sata_enable(dev);
- else
+ else {
bd82x6x_sata_init(dev, pch);
+ ret = ahci_probe_scsi(dev);
+ if (ret)
+ return ret;
+ }
return 0;
}
@@ -234,5 +253,6 @@ U_BOOT_DRIVER(ahci_ivybridge_drv) = {
.name = "ahci_ivybridge",
.id = UCLASS_AHCI,
.of_match = bd82x6x_ahci_ids,
+ .bind = bd82x6x_sata_bind,
.probe = bd82x6x_sata_probe,
};
diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig
index 8fb4712258..557919c5d8 100644
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -58,6 +58,8 @@ CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_BLK=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index 9c0f8602f9..3105fed469 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -41,6 +41,8 @@ CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_BLK=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig
index 51a934fe7a..30d4019856 100644
--- a/configs/chromebox_panther_defconfig
+++ b/configs/chromebox_panther_defconfig
@@ -37,6 +37,8 @@ CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_BLK=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
CONFIG_SPI_FLASH=y