diff options
author | Wolfgang Denk <wd@denx.de> | 2010-06-13 18:38:23 +0200 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2010-06-23 23:24:11 +0200 |
commit | ee80fa7b6e96a43d4270700cddc884e00cdd99fd (patch) | |
tree | 07cff0ade8bd9c595b4ed462a33a450083e81fc2 | |
parent | f35f3968c21bc8d01958ad1f92fe30e6ccc9c318 (diff) |
Get rid of bogus CONFIG_SYS_BUS_HZ and CONFIG_SYS_CONFIG_BUS_CLK definitions
CONFIG_SYS_BUS_HZ has not really been used anywhere except to be
redined as CONFIG_SYS_BUS_CLK; in addition, the mpc7448hpc2 had the
bogus CONFIG_SYS_CONFIG_BUS_CLK setting which duplicated the
funtionality. Change all this to use CONFIG_SYS_BUS_CLK consistently.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Frank Gottschling <fgottschling@eltec.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Eran Man <eran@nbase.co.il>
Cc: Stefan Roese <sr@denx.de>
Cc: Nye Liu <nyet@zumanetworks.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>
-rw-r--r-- | arch/powerpc/cpu/74xx_7xx/cpu.c | 14 | ||||
-rw-r--r-- | board/Marvell/db64360/sdram_init.c | 12 | ||||
-rw-r--r-- | board/Marvell/db64460/sdram_init.c | 12 | ||||
-rw-r--r-- | board/evb64260/mpsc.c | 2 | ||||
-rw-r--r-- | include/configs/BAB7xx.h | 5 | ||||
-rw-r--r-- | include/configs/CPCI750.h | 3 | ||||
-rw-r--r-- | include/configs/DB64360.h | 3 | ||||
-rw-r--r-- | include/configs/DB64460.h | 3 | ||||
-rw-r--r-- | include/configs/ELPPC.h | 5 | ||||
-rw-r--r-- | include/configs/EVB64260.h | 3 | ||||
-rw-r--r-- | include/configs/P3G4.h | 3 | ||||
-rw-r--r-- | include/configs/PCIPPC2.h | 3 | ||||
-rw-r--r-- | include/configs/PCIPPC6.h | 3 | ||||
-rw-r--r-- | include/configs/ZUMA.h | 4 | ||||
-rw-r--r-- | include/configs/mpc7448hpc2.h | 2 | ||||
-rw-r--r-- | include/configs/p3mx.h | 6 | ||||
-rw-r--r-- | include/configs/ppmc7xx.h | 4 |
17 files changed, 35 insertions, 52 deletions
diff --git a/arch/powerpc/cpu/74xx_7xx/cpu.c b/arch/powerpc/cpu/74xx_7xx/cpu.c index 3c172779b19..92487020c71 100644 --- a/arch/powerpc/cpu/74xx_7xx/cpu.c +++ b/arch/powerpc/cpu/74xx_7xx/cpu.c @@ -277,19 +277,17 @@ do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* * For the 7400 the TB clock runs at 1/4 the cpu bus speed. */ -#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SYS_CONFIG_BUS_CLK) +#if defined(CONFIG_AMIGAONEG3SE) || !defined(CONFIG_SYS_BUS_CLK) +#define CONFIG_SYS_BUS_CLK gd->bus_clk +#endif + unsigned long get_tbclk(void) { - return (gd->bus_clk / 4); + return CONFIG_SYS_BUS_CLK / 4; } -#else /* ! CONFIG_AMIGAONEG3SE and !CONFIG_SYS_CONFIG_BUS_CLK*/ -unsigned long get_tbclk (void) -{ - return CONFIG_SYS_BUS_HZ / 4; -} -#endif /* CONFIG_AMIGAONEG3SE or CONFIG_SYS_CONFIG_BUS_CLK*/ /* ------------------------------------------------------------------------- */ + #if defined(CONFIG_WATCHDOG) #if !defined(CONFIG_PCIPPC2) && !defined(CONFIG_BAB7xx) void diff --git a/board/Marvell/db64360/sdram_init.c b/board/Marvell/db64360/sdram_init.c index d0817d7e206..d52d3f0e52d 100644 --- a/board/Marvell/db64360/sdram_init.c +++ b/board/Marvell/db64360/sdram_init.c @@ -1290,37 +1290,37 @@ int setup_sdram (AUX_MEM_DIMM_INFO * info) case 0x0: case 0x80: /* refresh period is 15.625 usec */ sdram_config_reg = - (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_HZ) + (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x1: case 0x81: /* refresh period is 3.9 usec */ sdram_config_reg = - (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x2: case 0x82: /* refresh period is 7.8 usec */ sdram_config_reg = - (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x3: case 0x83: /* refresh period is 31.3 usec */ sdram_config_reg = - (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x4: case 0x84: /* refresh period is 62.5 usec */ sdram_config_reg = - (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x5: case 0x85: /* refresh period is 125 usec */ sdram_config_reg = - (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; default: /* refresh period undefined */ diff --git a/board/Marvell/db64460/sdram_init.c b/board/Marvell/db64460/sdram_init.c index 6d6b1264432..e328d8ff134 100644 --- a/board/Marvell/db64460/sdram_init.c +++ b/board/Marvell/db64460/sdram_init.c @@ -1289,37 +1289,37 @@ int setup_sdram (AUX_MEM_DIMM_INFO * info) case 0x0: case 0x80: /* refresh period is 15.625 usec */ sdram_config_reg = - (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_HZ) + (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x1: case 0x81: /* refresh period is 3.9 usec */ sdram_config_reg = - (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x2: case 0x82: /* refresh period is 7.8 usec */ sdram_config_reg = - (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x3: case 0x83: /* refresh period is 31.3 usec */ sdram_config_reg = - (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x4: case 0x84: /* refresh period is 62.5 usec */ sdram_config_reg = - (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x5: case 0x85: /* refresh period is 125 usec */ sdram_config_reg = - (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; default: /* refresh period undefined */ diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c index 8c4a4c89902..bee04fd5347 100644 --- a/board/evb64260/mpsc.c +++ b/board/evb64260/mpsc.c @@ -390,7 +390,7 @@ galbrg_set_baudrate(int channel, int rate) #if defined(CONFIG_ZUMA_V2) || defined(CONFIG_P3G4) /* from tclk */ - clock = (CONFIG_SYS_BUS_HZ/(16*rate)) - 1; + clock = (CONFIG_SYS_BUS_CLK/(16*rate)) - 1; #else clock = (3686400/(16*rate)) - 1; #endif diff --git a/include/configs/BAB7xx.h b/include/configs/BAB7xx.h index 40a1c40cc4a..4d83786767d 100644 --- a/include/configs/BAB7xx.h +++ b/include/configs/BAB7xx.h @@ -436,9 +436,8 @@ extern unsigned char scsi_sym53c8xx_ccf; extern unsigned long bab7xx_get_bus_freq (void); extern unsigned long bab7xx_get_gclk_freq (void); #endif -#define CONFIG_SYS_BUS_HZ bab7xx_get_bus_freq() -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ -#define CONFIG_SYS_CPU_CLK bab7xx_get_gclk_freq() +#define CONFIG_SYS_BUS_CLK bab7xx_get_bus_freq() +#define CONFIG_SYS_CPU_CLK bab7xx_get_gclk_freq() /* * For booting Linux, the board info and command line data diff --git a/include/configs/CPCI750.h b/include/configs/CPCI750.h index 1c8c68b3e47..f2d51f75eeb 100644 --- a/include/configs/CPCI750.h +++ b/include/configs/CPCI750.h @@ -234,8 +234,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ -#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } diff --git a/include/configs/DB64360.h b/include/configs/DB64360.h index 160871b24e2..910933ad586 100644 --- a/include/configs/DB64360.h +++ b/include/configs/DB64360.h @@ -318,8 +318,7 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ /*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */ -#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP 7 /* define the SDRAM cycle count */ #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP 50 /* for 400MHZ -> 5.0 ns, for 133MHZ -> 7.50 ns */ diff --git a/include/configs/DB64460.h b/include/configs/DB64460.h index 06fd157ad22..765eaaf0fb5 100644 --- a/include/configs/DB64460.h +++ b/include/configs/DB64460.h @@ -256,8 +256,7 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ /*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */ -#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP 7 /* define the SDRAM cycle count */ #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP 50 /* for 200MHZ -> 5.0 ns, 166MHZ -> 6.0, 133MHZ -> 7.50 ns */ diff --git a/include/configs/ELPPC.h b/include/configs/ELPPC.h index d2aa8b92e47..84d27b67a92 100644 --- a/include/configs/ELPPC.h +++ b/include/configs/ELPPC.h @@ -314,9 +314,8 @@ /* * Speed settings are board specific */ -#define CONFIG_SYS_BUS_HZ 100000000 -#define CONFIG_SYS_CPU_CLK 400000000 -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 100000000 +#define CONFIG_SYS_CPU_CLK 400000000 /* * For booting Linux, the board info and command line data diff --git a/include/configs/EVB64260.h b/include/configs/EVB64260.h index bf41c13bdfb..09035363481 100644 --- a/include/configs/EVB64260.h +++ b/include/configs/EVB64260.h @@ -141,8 +141,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ -#define CONFIG_SYS_BUS_HZ 100000000 /* 100 MHz */ -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 100000000 /* 100 MHz */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } diff --git a/include/configs/P3G4.h b/include/configs/P3G4.h index 971338a466a..890170d1d41 100644 --- a/include/configs/P3G4.h +++ b/include/configs/P3G4.h @@ -168,8 +168,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ -#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz */ -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h index 99a8c4a6466..c30ac785a81 100644 --- a/include/configs/PCIPPC2.h +++ b/include/configs/PCIPPC2.h @@ -194,9 +194,8 @@ * For the detail description refer to the PCIPPC2 user's manual. */ #define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_BUS_HZ 100000000 /* bus speed - 100 mhz */ +#define CONFIG_SYS_BUS_CLK 100000000 /* bus speed - 100 mhz */ #define CONFIG_SYS_CPU_CLK 300000000 -#define CONFIG_SYS_BUS_CLK 100000000 /* * For booting Linux, the board info and command line data diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h index 66e6d24817d..bc674804497 100644 --- a/include/configs/PCIPPC6.h +++ b/include/configs/PCIPPC6.h @@ -196,9 +196,8 @@ * For the detail description refer to the PCIPPC2 user's manual. */ #define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_BUS_HZ 100000000 /* bus speed - 100 mhz */ +#define CONFIG_SYS_BUS_CLK 100000000 /* bus speed - 100 mhz */ #define CONFIG_SYS_CPU_CLK 300000000 -#define CONFIG_SYS_BUS_CLK 100000000 /* * For booting Linux, the board info and command line data diff --git a/include/configs/ZUMA.h b/include/configs/ZUMA.h index b73aaa817b4..fcc47a99ec3 100644 --- a/include/configs/ZUMA.h +++ b/include/configs/ZUMA.h @@ -164,9 +164,7 @@ #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ -#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz */ - -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h index be12186aca0..497ea422063 100644 --- a/include/configs/mpc7448hpc2.h +++ b/include/configs/mpc7448hpc2.h @@ -46,7 +46,7 @@ #define CONFIG_IDENT_STRING " Freescale MPC7448 HPC II" #define CONFIG_SYS_OCN_CLK 133000000 /* 133 MHz */ -#define CONFIG_SYS_CONFIG_BUS_CLK 133000000 +#define CONFIG_SYS_BUS_CLK 133000000 #define CONFIG_SYS_CLK_SPREAD /* Enable Spread-Spectrum Clock generation */ diff --git a/include/configs/p3mx.h b/include/configs/p3mx.h index 0749037163b..17ec08fdd6a 100644 --- a/include/configs/p3mx.h +++ b/include/configs/p3mx.h @@ -44,14 +44,12 @@ #define CONFIG_750FX /* 750GL/GX/FX */ #define CONFIG_HIGH_BATS /* High BATs supported */ #define CONFIG_SYS_BOARD_NAME "P3M750" -#define CONFIG_SYS_BUS_HZ 100000000 -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 100000000 #define CONFIG_SYS_TCLK 100000000 #elif defined (CONFIG_P3M7448) #define CONFIG_74xx #define CONFIG_SYS_BOARD_NAME "P3M7448" -#define CONFIG_SYS_BUS_HZ 133333333 -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133333333 #define CONFIG_SYS_TCLK 133333333 #endif #define CONFIG_SYS_GT_DUAL_CPU /* also for JTAG even with one cpu */ diff --git a/include/configs/ppmc7xx.h b/include/configs/ppmc7xx.h index 0fd86356814..04779c40583 100644 --- a/include/configs/ppmc7xx.h +++ b/include/configs/ppmc7xx.h @@ -355,12 +355,10 @@ /* * Clocks config * - * CONFIG_SYS_BUS_HZ - Bus clock frequency in Hz - * CONFIG_SYS_BUS_CLK - As above (?) + * CONFIG_SYS_BUS_CLK - Bus clock frequency in Hz * CONFIG_SYS_HZ - Decrementer freq in Hz */ -#define CONFIG_SYS_BUS_HZ CONFIG_BUS_CLK #define CONFIG_SYS_BUS_CLK CONFIG_BUS_CLK #define CONFIG_SYS_HZ 1000 |