arm: Tegra3: clear IO_RESET bit in pinmux registers

Based on Tegra3 TRM, once E_18V bits in PMC are programmed, all IO_RESETs
need to be cleared on LV blocks. If not, GPIO settings on related LV pins
will always be set to low even if it is set to high. Specifically, it is
observed that when IO_RESET bit is not cleared in VI_D4 pinmux register,
the output of GPIO on VI_D4 (PL.02) is always low. That causes LVDS shutdown
all the time.  Also needed for SDMMC4 pins when booting from SPI.

BUG=none
TEST=built and booted on Waluigi, read/write SD/MMC data OK

Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Change-Id: Iaf84dc39375a49ceb3284dd1d48a8af3a0145175
Reviewed-on: https://gerrit.chromium.org/gerrit/11495
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>

1 files changed, 30 insertions, 30 deletions

diff --git a/board/nvidia/cardhu/pinmux-config-common.h b/board/nvidia/cardhu/pinmux-config-common.h
index 93fe8101ae9..122b960dbf6 100644
--- a/board/nvidia/cardhu/pinmux-config-common.h
+++ b/board/nvidia/cardhu/pinmux-config-common.h
@@ -48,11 +48,11 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define VI_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define LV_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
 	{							\
 		.pingroup	= PINGRP_##_pingroup,		\
 		.func		= PMUX_FUNC_##_mux,		\
-		.pull		= PMUX_PULL_##_pull,			\
+		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
 		.io		= PMUX_PIN_##_io,		\
 		.lock		= PMUX_PIN_LOCK_##_lock,	\
@@ -80,17 +80,17 @@ static struct pingroup_config tegra3_pinmux_common[] = {
 	DEFAULT_PINMUX(SDMMC3_DAT7,     RSVD1,           NORMAL,     NORMAL,     INPUT),
 
 	/* SDMMC4 pinmux */
-	DEFAULT_PINMUX(SDMMC4_CLK,      SDMMC4,          NORMAL,     NORMAL,     INPUT),
-	DEFAULT_PINMUX(SDMMC4_CMD,      SDMMC4,          UP,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT0,     SDMMC4,          UP,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT1,     SDMMC4,          UP,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT2,     SDMMC4,          UP,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT3,     SDMMC4,          UP,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT4,     SDMMC4,          UP,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT5,     SDMMC4,          UP,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT6,     SDMMC4,          UP,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT7,     SDMMC4,          UP,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(SDMMC4_RST_N,    RSVD1,           DOWN,  NORMAL,     INPUT),
+	LV_PINMUX(SDMMC4_CLK,	SDMMC4,	NORMAL,	NORMAL,	INPUT,	DISABLE,	DISABLE),
+	LV_PINMUX(SDMMC4_CMD,	SDMMC4,	UP,	NORMAL,	INPUT,	DISABLE,        DISABLE),
+	LV_PINMUX(SDMMC4_DAT0,	SDMMC4,	UP,	NORMAL,	INPUT,	DISABLE,        DISABLE),
+	LV_PINMUX(SDMMC4_DAT1,	SDMMC4,	UP,	NORMAL,	INPUT,	DISABLE,        DISABLE),
+	LV_PINMUX(SDMMC4_DAT2,	SDMMC4,	UP,	NORMAL,	INPUT,	DISABLE,        DISABLE),
+	LV_PINMUX(SDMMC4_DAT3,	SDMMC4,	UP,	NORMAL,	INPUT,	DISABLE,        DISABLE),
+	LV_PINMUX(SDMMC4_DAT4,	SDMMC4,	UP,	NORMAL,	INPUT,	DISABLE,        DISABLE),
+	LV_PINMUX(SDMMC4_DAT5,	SDMMC4,	UP,	NORMAL,	INPUT,	DISABLE,        DISABLE),
+	LV_PINMUX(SDMMC4_DAT6,	SDMMC4,	UP,	NORMAL,	INPUT,	DISABLE,        DISABLE),
+	LV_PINMUX(SDMMC4_DAT7,	SDMMC4,	UP,	NORMAL,	INPUT,	DISABLE,        DISABLE),
+	LV_PINMUX(SDMMC4_RST_N,	RSVD1,	DOWN,	NORMAL,	INPUT,	DISABLE,	DISABLE),
 
 	/* I2C1 pinmux */
 	I2C_PINMUX(GEN1_I2C_SCL,	I2C1,		NORMAL,	NORMAL,	INPUT,	DISABLE,	ENABLE),
@@ -174,16 +174,15 @@ static struct pingroup_config tegra3_pinmux_common[] = {
 	DEFAULT_PINMUX(LCD_DC1,         DISPA,        NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(CRT_HSYNC,       CRT,             NORMAL,    NORMAL,     OUTPUT),
 	DEFAULT_PINMUX(CRT_VSYNC,       CRT,             NORMAL,    NORMAL,     OUTPUT),
-	DEFAULT_PINMUX(VI_D0,           RSVD1,           NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(VI_D1,           SDMMC2,          NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(VI_D2,           SDMMC2,          NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(VI_D3,           SDMMC2,          NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(VI_D4,           VI,              NORMAL,    NORMAL,     OUTPUT),
-	DEFAULT_PINMUX(VI_D5,           SDMMC2,          NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(VI_D7,           SDMMC2,          NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(VI_D10,          RSVD1,           NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(VI_MCLK,         VI,              UP,   NORMAL,     INPUT),
-
+	LV_PINMUX(VI_D0,	RSVD1,	NORMAL,	NORMAL,	INPUT,	DISABLE,	DISABLE),
+	LV_PINMUX(VI_D1,	SDMMC2,	NORMAL,	NORMAL,	INPUT,	DISABLE,	DISABLE),
+	LV_PINMUX(VI_D2,	SDMMC2,	NORMAL,	NORMAL,	INPUT,	DISABLE,	DISABLE),
+	LV_PINMUX(VI_D3,	SDMMC2,	NORMAL,	NORMAL,	INPUT,	DISABLE,	DISABLE),
+	LV_PINMUX(VI_D4,	VI,	NORMAL,	NORMAL,	OUTPUT,	DISABLE,	DISABLE),
+	LV_PINMUX(VI_D5,	SDMMC2,	NORMAL,	NORMAL,	INPUT,	DISABLE,	DISABLE),
+	LV_PINMUX(VI_D7,	SDMMC2,	NORMAL,	NORMAL,	INPUT,	DISABLE,	DISABLE),
+	LV_PINMUX(VI_D10,	RSVD1,	NORMAL,	NORMAL,	INPUT,	DISABLE,	DISABLE),
+	LV_PINMUX(VI_MCLK,	VI,	UP,	NORMAL,	INPUT,	DISABLE,	DISABLE),
 	DEFAULT_PINMUX(UART2_RXD,       IRDA,            NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(UART2_TXD,       IRDA,            NORMAL,    NORMAL,     OUTPUT),
 	DEFAULT_PINMUX(UART2_RTS_N,     UARTB,           NORMAL,    NORMAL,     OUTPUT),
@@ -284,7 +283,7 @@ static struct pingroup_config tegra3_pinmux_common[] = {
 	/* SDMMC1 CD gpio */
 	DEFAULT_PINMUX(GMI_IORDY,       RSVD1,           UP,   NORMAL,     INPUT),
 	/* SDMMC1 WP gpio */
-	DEFAULT_PINMUX(VI_D11,          RSVD1,           UP,   NORMAL,     INPUT),
+	LV_PINMUX(VI_D11,		RSVD1,		UP,	NORMAL,	INPUT,	DISABLE,	DISABLE),
 
 	/* Touch panel GPIO */
 	/* Touch IRQ */
@@ -300,12 +299,12 @@ static struct pingroup_config tegra3_pinmux_common[] = {
 	DEFAULT_PINMUX(SDMMC3_DAT5,     SDMMC3,          UP,   NORMAL,     INPUT),
 	DEFAULT_PINMUX(SDMMC3_DAT4,     SDMMC3,          UP,   NORMAL,     INPUT),
 
-	VI_PINMUX(VI_D6,           VI,              NORMAL,    NORMAL,     OUTPUT, DISABLE, DISABLE),
-	VI_PINMUX(VI_D8,           SDMMC2,          NORMAL,    NORMAL,     INPUT,  DISABLE, DISABLE),
-	VI_PINMUX(VI_D9,           SDMMC2,          NORMAL,    NORMAL,     INPUT,  DISABLE, DISABLE),
-	VI_PINMUX(VI_PCLK,         RSVD1,           UP,   TRISTATE,   INPUT,  DISABLE, DISABLE),
-	VI_PINMUX(VI_HSYNC,        RSVD1,           NORMAL,    NORMAL,     INPUT,  DISABLE, DISABLE),
-	VI_PINMUX(VI_VSYNC,        RSVD1,           NORMAL,    NORMAL,     INPUT,  DISABLE, DISABLE),
+	LV_PINMUX(VI_D6,           VI,              NORMAL,    NORMAL,     OUTPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D8,           SDMMC2,          NORMAL,    NORMAL,     INPUT,  DISABLE, DISABLE),
+	LV_PINMUX(VI_D9,           SDMMC2,          NORMAL,    NORMAL,     INPUT,  DISABLE, DISABLE),
+	LV_PINMUX(VI_PCLK,         RSVD1,           UP,   TRISTATE,   INPUT,  DISABLE, DISABLE),
+	LV_PINMUX(VI_HSYNC,        RSVD1,           NORMAL,    NORMAL,     INPUT,  DISABLE, DISABLE),
+	LV_PINMUX(VI_VSYNC,        RSVD1,           NORMAL,    NORMAL,     INPUT,  DISABLE, DISABLE),
 };
 
 #if 0 // jz
@@ -371,3 +370,4 @@ static struct pingroup_config unused_pins_lowpower[] = {
 };
 
 #endif /* PINMUX_CONFIG_COMMON_H */
+