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authorBin Meng <bmeng.cn@gmail.com>2015-02-04 16:26:10 +0800
committerSimon Glass <sjg@chromium.org>2015-02-06 12:07:45 -0700
commitd8b1d225129298f3320530730c781a11e839c21c (patch)
treeb9f21f846074ec8e8113ad400129619cc26d41a5
parentb162257d4f175b59ebedd9c2db930d29317ffe16 (diff)
x86: galileo: Add GPIO support
Quark SoC has a legacy GPIO block in the legacy bridge (D0:F31), which is just the same one found in other x86 chipset. Since we programmed the GPIO register block base address, we should be able to enable the GPIO support on Intel Galileo board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/x86/dts/galileo.dts14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index d462221a9d..2f60aeb82d 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -65,4 +65,18 @@
};
};
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x20>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x20 0x20>;
+ bank-name = "B";
+ };
+
};