CHROMIUM: rename is_cold_boot to is_processor_reset

The predicate function is_cold_boot() is in fact telling you whether we
are booting from a processor reset.

BUG=chrome-os-partner:5100
TEST=build cleanly

Change-Id: I70f56448dd1b327426cf759854c35e20e0b4cfcf
Reviewed-on: http://gerrit.chromium.org/gerrit/4644
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Tested-by: Che-Liang Chiou <clchiou@chromium.org>

7 files changed, 26 insertions, 16 deletions

diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c
index 75fdf7c22f5..6d589143281 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.c
+++ b/arch/arm/cpu/armv7/tegra2/ap20.c
@@ -42,7 +42,7 @@ struct clk_pll_table {
 };
 
 /* ~0=uninitialized/unknown, 0=false, 1=true */
-int is_tegra2_cold_boot = 0xffffffff;
+uint32_t is_tegra2_processor_reset = 0xffffffff;
 
 /*
  * Timing tables for each SOC for all four oscillator options.
@@ -387,7 +387,7 @@ void tegra2_start(void)
 
 	/* FIXME: should have ap20's L2 disabled too? */
 
-	/* Init is_tegra2_cold_boot */
-	is_tegra2_cold_boot = check_is_tegra2_cold_boot();
+	/* Init is_tegra2_processor_reset */
+	is_tegra2_processor_reset = check_is_tegra2_processor_reset();
 }
 
diff --git a/arch/arm/cpu/armv7/tegra2/clock.c b/arch/arm/cpu/armv7/tegra2/clock.c
index 0e8acf1d3be..7227e5850af 100644
--- a/arch/arm/cpu/armv7/tegra2/clock.c
+++ b/arch/arm/cpu/armv7/tegra2/clock.c
@@ -902,7 +902,7 @@ int clock_verify(void)
 	return 0;
 }
 
-int check_is_tegra2_cold_boot(void)
+uint32_t check_is_tegra2_processor_reset(void)
 {
 	u32 base_reg;
 	struct clk_pll *pll;
diff --git a/arch/arm/include/asm/arch-tegra2/clock.h b/arch/arm/include/asm/arch-tegra2/clock.h
index 28a5b95ee73..99d9bf12c07 100644
--- a/arch/arm/include/asm/arch-tegra2/clock.h
+++ b/arch/arm/include/asm/arch-tegra2/clock.h
@@ -348,8 +348,8 @@ unsigned clock_adjust_periph_pll_div(enum periph_id periph_id,
  */
 unsigned clock_get_rate(enum clock_id clkid);
 
-/* Return 1=cold boot; 0=not cold boot */
-int check_is_tegra2_cold_boot(void);
+/* Return 1=processor reset; 0=not */
+uint32_t check_is_tegra2_processor_reset(void);
 
 /*
  * Checks that clocks are valid and prints a warning if not
diff --git a/board/chromebook-x86/chromeos/power_management.c b/board/chromebook-x86/chromeos/power_management.c
index a7482e384b8..1c92f35fbdf 100644
--- a/board/chromebook-x86/chromeos/power_management.c
+++ b/board/chromebook-x86/chromeos/power_management.c
@@ -13,9 +13,9 @@
 #include <chromeos/power_management.h>
 #include <common.h>
 
-int is_cold_boot(void)
+int is_processor_reset(void)
 {
-	printf("is_cold_boot used but not implemented.\n");
+	printf("is_processor_reset used but not implemented.\n");
 	return 1;
 }
 
diff --git a/board/nvidia/chromeos/power_management.c b/board/nvidia/chromeos/power_management.c
index 32723fa4add..c41d4ceede9 100644
--- a/board/nvidia/chromeos/power_management.c
+++ b/board/nvidia/chromeos/power_management.c
@@ -22,13 +22,15 @@
 #define PMIC_I2C_DEVICE_ADDRESS	0x34
 #define TPS6586X_SUPPLYENE	0x14
 
-extern int is_tegra2_cold_boot;
+extern uint32_t is_tegra2_processor_reset;
 
-int is_cold_boot(void)
+int is_processor_reset(void)
 {
-	if (is_tegra2_cold_boot == ~0U)
-		VBDEBUG(PREFIX "error: is_tegra2_cold_boot uninitialized\n");
-	return is_tegra2_cold_boot ? 1 : 0;
+	if (is_tegra2_processor_reset == ~0U) {
+		VBDEBUG(PREFIX "error: is_tegra2_processor_reset "
+				"uninitialized\n");
+	}
+	return is_tegra2_processor_reset ? 1 : 0;
 }
 
 /* This function never returns */
diff --git a/common/cmd_vboot_twostop.c b/common/cmd_vboot_twostop.c
index 2bb6b4f2c4a..593b6e5723d 100644
--- a/common/cmd_vboot_twostop.c
+++ b/common/cmd_vboot_twostop.c
@@ -683,8 +683,16 @@ int do_vboot_twostop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	 */
 	lcd_clear();
 
-	/* If it is a cold boot, we are in read-only firmware */
-	if (is_cold_boot())
+	/*
+	 * A processor reset jumps to the reset entry point (which is the
+	 * read-only firmware), otherwise we have entered U-Boot from a
+	 * software jump.
+	 *
+	 * Note: If a read-only firmware is loaded to memory not because of a
+	 * processor reset, this instance of read-only firmware should go to the
+	 * readwrite firmware code path.
+	 */
+	if (is_processor_reset())
 		selection = twostop_boot(fdt);
 	else
 		selection = twostop_readwrite_main_firmware(fdt);
diff --git a/include/chromeos/power_management.h b/include/chromeos/power_management.h
index c45e89fd5ea..f56d3d6bccb 100644
--- a/include/chromeos/power_management.h
+++ b/include/chromeos/power_management.h
@@ -13,7 +13,7 @@
 #ifndef CHROMEOS_POWER_MANAGEMENT_H_
 #define CHROMEOS_POWER_MANAGEMENT_H_
 
-int is_cold_boot(void);
+int is_processor_reset(void);
 
 /* Tell PMIC to cold reboot the whole system */
 void cold_reboot(void);