diff options
| author | Michal Simek <michal.simek@xilinx.com> | 2018-11-30 10:20:43 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-11-30 10:45:26 +0100 |
| commit | ebcc1a223e05cc3c387f2bed75112f969a1b62f4 (patch) | |
| tree | 8ba760d3511a7a14c76dcc36a9bae3f6a621bb44 | |
| parent | f5ed777d29f92b7808abdeff59fec4c196886a91 (diff) | |
arm64: zynqmp: Wire mini-emmc1 configuration with zcu102
For testing purpose use zcu102 which has SD at controller 1 and this can
be used for testing this mini configuration.
U-Boot 2018.11-00279-gdc482e7ee092 (Nov 30 2018 - 10:22:56 +0100)
Model: ZynqMP MINI EMMC1
Board: Xilinx ZynqMP
DRAM: 512 MiB
EL Level: EL3
MMC: sdhci@ff170000: 0
In: dcc
Out: dcc
Err: dcc
ZynqMP>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| l--------- | board/xilinx/zynqmp/zynqmp-mini-emmc1 | 1 | ||||
| -rw-r--r-- | configs/xilinx_zynqmp_mini_emmc1_defconfig | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/board/xilinx/zynqmp/zynqmp-mini-emmc1 b/board/xilinx/zynqmp/zynqmp-mini-emmc1 new file mode 120000 index 00000000000..5a70cd2f5e1 --- /dev/null +++ b/board/xilinx/zynqmp/zynqmp-mini-emmc1 @@ -0,0 +1 @@ +zynqmp-zcu102-rev1.0
\ No newline at end of file diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 32b00e25303..74ea3a864e1 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_ENV_SIZE=0x80 +CONFIG_SPL=y # CONFIG_CMD_ZYNQMP is not set CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y @@ -43,11 +44,14 @@ CONFIG_CMD_MMC=y # CONFIG_MP is not set CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" # CONFIG_NET is not set +CONFIG_SPL_DM=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y |