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authorStefan Roese <sr@denx.de>2015-11-25 07:37:00 +0100
committerStefan Roese <sr@denx.de>2016-01-14 14:08:59 +0100
commit6451223a8d1dc57cf0edc7f41799ec79468959c8 (patch)
tree6306c2811e990823363a157f960127d495ea84ac
parentcdf1d240badefc787ef0dc440b9ea6554b97416b (diff)
arm: mvebu: Add DM and OF_CONTROL support to SPL
This patch adds full DM support to the SPL on MVEBU. Currently only serial is supported. Other drivers will follow. This patch also adds the necessary config values for the DEBUG UART to the MVEBU defconfig files. This came in handy while implementing this DM support. Additionally, the mvebu specific SPL linker script is removed and this common one is used instead: arch/arm/cpu/u-boot-spl.lds This common linker script already handles all special cases. No need to reinvent the wheel for MVEBU here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/dts/armada-370-xp.dtsi1
-rw-r--r--arch/arm/dts/armada-388-gp.dts1
-rw-r--r--arch/arm/dts/armada-xp-gp.dts1
-rw-r--r--arch/arm/mach-mvebu/include/mach/config.h5
-rw-r--r--arch/arm/mach-mvebu/include/mach/soc.h2
-rw-r--r--arch/arm/mach-mvebu/spl.c28
-rw-r--r--arch/arm/mach-mvebu/u-boot-spl.lds57
-rw-r--r--board/Marvell/db-88f6820-gp/kwbimage.cfg2
-rw-r--r--board/Marvell/db-mv784mp-gp/kwbimage.cfg2
-rw-r--r--board/maxbcm/kwbimage.cfg2
-rw-r--r--configs/db-88f6820-gp_defconfig6
-rw-r--r--configs/db-mv784mp-gp_defconfig6
-rw-r--r--configs/maxbcm_defconfig6
-rw-r--r--include/configs/db-88f6820-gp.h8
-rw-r--r--include/configs/db-mv784mp-gp.h8
-rw-r--r--include/configs/maxbcm.h6
17 files changed, 66 insertions, 77 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9bd6cf1d807..b886d014011 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -118,6 +118,8 @@ config ARCH_MVEBU
select OF_SEPARATE
select DM
select DM_SERIAL
+ select SPL_DM
+ select SPL_OF_CONTROL
config TARGET_DEVKIT3250
bool "Support devkit3250"
diff --git a/arch/arm/dts/armada-370-xp.dtsi b/arch/arm/dts/armada-370-xp.dtsi
index a718866ba52..0b2a78d3930 100644
--- a/arch/arm/dts/armada-370-xp.dtsi
+++ b/arch/arm/dts/armada-370-xp.dtsi
@@ -141,6 +141,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
+ u-boot,dm-pre-reloc;
rtc@10300 {
compatible = "marvell,orion-rtc";
diff --git a/arch/arm/dts/armada-388-gp.dts b/arch/arm/dts/armada-388-gp.dts
index fd4f6fd8a2e..f576e938265 100644
--- a/arch/arm/dts/armada-388-gp.dts
+++ b/arch/arm/dts/armada-388-gp.dts
@@ -122,6 +122,7 @@
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
+ u-boot,dm-pre-reloc;
};
/* GE1 CON15 */
diff --git a/arch/arm/dts/armada-xp-gp.dts b/arch/arm/dts/armada-xp-gp.dts
index bf724ca96a3..ca5f8bb2101 100644
--- a/arch/arm/dts/armada-xp-gp.dts
+++ b/arch/arm/dts/armada-xp-gp.dts
@@ -148,6 +148,7 @@
internal-regs {
serial@12000 {
status = "okay";
+ u-boot,dm-pre-reloc;
};
serial@12100 {
status = "okay";
diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h
index 3281d90cda7..3d188275733 100644
--- a/arch/arm/mach-mvebu/include/mach/config.h
+++ b/arch/arm/mach-mvebu/include/mach/config.h
@@ -90,9 +90,4 @@
#define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14)
#define CONFIG_SYS_TIMER_RATE 25000000
-/* Common SPL configuration */
-#ifndef CONFIG_SPL_LDSCRIPT
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-mvebu/u-boot-spl.lds"
-#endif
-
#endif /* __MVEBU_CONFIG_H */
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 22abde080e1..800f5d55a25 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -49,8 +49,6 @@
#define CONFIG_SYS_PL310_BASE MVEBU_L2_CACHE_BASE
#define MVEBU_SPI_BASE (MVEBU_REGISTER(0x10600))
#define MVEBU_TWSI_BASE (MVEBU_REGISTER(0x11000))
-#define MVEBU_UART0_BASE (MVEBU_REGISTER(0x12000))
-#define MVEBU_UART1_BASE (MVEBU_REGISTER(0x12100))
#define MVEBU_MPP_BASE (MVEBU_REGISTER(0x18000))
#define MVEBU_GPIO0_BASE (MVEBU_REGISTER(0x18100))
#define MVEBU_GPIO1_BASE (MVEBU_REGISTER(0x18140))
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 0ab729aa5d8..4eeef2dcdaa 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -1,10 +1,13 @@
/*
- * Copyright (C) 2014 Stefan Roese <sr@denx.de>
+ * Copyright (C) 2014-2015 Stefan Roese <sr@denx.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <dm.h>
+#include <debug_uart.h>
+#include <fdtdec.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
@@ -31,6 +34,8 @@ u32 spl_boot_mode(void)
void board_init_f(ulong dummy)
{
+ int ret;
+
#ifndef CONFIG_MVEBU_BOOTROM_UARTBOOT
/*
* Only call arch_cpu_init() when not returning to the
@@ -51,6 +56,27 @@ void board_init_f(ulong dummy)
*/
board_early_init_f();
+ /* Example code showing how to enable the debug UART on MVEBU */
+#ifdef EARLY_UART
+ /*
+ * Debug UART can be used from here if required:
+ *
+ * debug_uart_init();
+ * printch('a');
+ * printhex8(0x1234);
+ * printascii("string");
+ */
+#endif
+
+ ret = spl_init();
+ if (ret) {
+ debug("spl_init() failed: %d\n", ret);
+ hang();
+ }
+
+ /* Use special translation offset for SPL */
+ dm_set_translation_offset(0xd0000000 - 0xf1000000);
+
preloader_console_init();
timer_init();
diff --git a/arch/arm/mach-mvebu/u-boot-spl.lds b/arch/arm/mach-mvebu/u-boot-spl.lds
deleted file mode 100644
index eee1db49eed..00000000000
--- a/arch/arm/mach-mvebu/u-boot-spl.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * (C) Copyright 2010
- * Texas Instruments, <www.ti.com>
- * Aneesh V <aneesh@ti.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
- LENGTH = CONFIG_SPL_MAX_SIZE }
-MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
- LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- .text :
- {
- __start = .;
- arch/arm/cpu/armv7/start.o (.text*)
- *(.text*)
- *(.vectors)
- } >.sram
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
-
- . = ALIGN(4);
- .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*_i2c_*)));
- } >.sram
-
- . = ALIGN(4);
- __image_copy_end = .;
-
- .end :
- {
- *(.__end)
- }
-
- .bss :
- {
- . = ALIGN(4);
- __bss_start = .;
- *(.bss*)
- . = ALIGN(4);
- __bss_end = .;
- } >.sdram
-}
diff --git a/board/Marvell/db-88f6820-gp/kwbimage.cfg b/board/Marvell/db-88f6820-gp/kwbimage.cfg
index cc057925566..1f748db37c1 100644
--- a/board/Marvell/db-88f6820-gp/kwbimage.cfg
+++ b/board/Marvell/db-88f6820-gp/kwbimage.cfg
@@ -9,4 +9,4 @@ VERSION 1
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
-BINARY spl/u-boot-spl.bin 0000005b 00000068
+BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068
diff --git a/board/Marvell/db-mv784mp-gp/kwbimage.cfg b/board/Marvell/db-mv784mp-gp/kwbimage.cfg
index cc057925566..1f748db37c1 100644
--- a/board/Marvell/db-mv784mp-gp/kwbimage.cfg
+++ b/board/Marvell/db-mv784mp-gp/kwbimage.cfg
@@ -9,4 +9,4 @@ VERSION 1
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
-BINARY spl/u-boot-spl.bin 0000005b 00000068
+BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068
diff --git a/board/maxbcm/kwbimage.cfg b/board/maxbcm/kwbimage.cfg
index cc057925566..1f748db37c1 100644
--- a/board/maxbcm/kwbimage.cfg
+++ b/board/maxbcm/kwbimage.cfg
@@ -9,4 +9,4 @@ VERSION 1
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
-BINARY spl/u-boot-spl.bin 0000005b 00000068
+BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index cdcd34cb478..111f3a14216 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_DB_88F6820_GP=y
CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
CONFIG_SPL=y
@@ -7,9 +8,14 @@ CONFIG_SPL=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_TRANSLATE=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xd0012000
+CONFIG_DEBUG_UART_CLOCK=250000000
+CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 4c4329dc783..d8c667a3a70 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_DB_MV784MP_GP=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
CONFIG_SPL=y
@@ -7,10 +8,15 @@ CONFIG_SPL=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_TRANSLATE=y
CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xd0012000
+CONFIG_DEBUG_UART_CLOCK=250000000
+CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index 921c6c43670..7506fbf1016 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -1,14 +1,20 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MAXBCM=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_TRANSLATE=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xd0012000
+CONFIG_DEBUG_UART_CLOCK=250000000
+CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
index 3673e5e3687..dfc243d146d 100644
--- a/include/configs/db-88f6820-gp.h
+++ b/include/configs/db-88f6820-gp.h
@@ -104,11 +104,13 @@
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
+#ifndef CONFIG_SPL_BUILD
#define CONFIG_PCI
#define CONFIG_PCI_MVEBU
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_E1000 /* enable Intel E1000 support for testing */
+#endif
#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
#define CONFIG_SYS_ALT_MEMTEST
@@ -139,9 +141,9 @@
#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
-#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
- CONFIG_SPL_BSS_MAX_SIZE)
-#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10)
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MALLOC_SIMPLE
+#endif
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index ab6e5a5bce1..d0f9f897b36 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -101,11 +101,13 @@
#endif /* CONFIG_CMD_IDE */
/* PCIe support */
+#ifndef CONFIG_SPL_BUILD
#define CONFIG_PCI
#define CONFIG_PCI_MVEBU
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_E1000 /* enable Intel E1000 support for testing */
+#endif
/* NAND */
#define CONFIG_SYS_NAND_USE_FLASH_BBT
@@ -139,9 +141,9 @@
#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
-#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
- CONFIG_SPL_BSS_MAX_SIZE)
-#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10)
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MALLOC_SIMPLE
+#endif
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index da49243ebfa..682ce765f70 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -91,9 +91,9 @@
#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
-#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
- CONFIG_SPL_BSS_MAX_SIZE)
-#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10)
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MALLOC_SIMPLE
+#endif
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)