sunxi: A64: enable USB support

Mostly by adding MACH_SUN50I to some existing #ifdefs enable support
for the the HCI0 USB host controller on the A64.
Fix up some minor 64-bit hiccups on the way.
Add the bare minimum DT bits to the A64 .dtsi and enable the controllers
and the PHY on the Pine64.
This is limited to the first USB controller at the moment, which is
connected to the lower USB socket on the Pine64 board.
[Andre: remove unneeded defines, enable OHCI, add commit message]

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

8 files changed, 56 insertions, 6 deletions

diff --git a/arch/arm/dts/sun50i-a64-pine64-common.dtsi b/arch/arm/dts/sun50i-a64-pine64-common.dtsi
index c0fde440f5..9ec81c65e7 100644
--- a/arch/arm/dts/sun50i-a64-pine64-common.dtsi
+++ b/arch/arm/dts/sun50i-a64-pine64-common.dtsi
@@ -79,3 +79,15 @@
 	pinctrl-0 = <&i2c1_pins>;
 	status = "okay";
 };
+
+&usbphy {
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index 7d0dc76a11..bef0d00be8 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -653,5 +653,34 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 		};
+
+		usbphy: phy@1c1b810 {
+			compatible = "allwinner,sun50i-a64-usb-phy",
+				     "allwinner,sun8i-a33-usb-phy";
+			reg = <0x01c1b810 0x14>, <0x01c1b800 0x4>;
+			reg-names = "phy_ctrl", "pmu1";
+			status = "disabled";
+			#phy-cells = <1>;
+		};
+
+		ehci1: usb@01c1b000 {
+			compatible = "allwinner,sun50i-a64-ehci",
+				     "generic-ehci";
+			reg = <0x01c1b000 0x100>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			phys = <&usbphy 1>;
+			phy-names = "usb";
+			status = "disabled";
+		};
+
+		ohci1: usb@01c1b400 {
+			compatible = "allwinner,sun50i-a64-ohci",
+				     "generic-ohci";
+			reg = <0x01c1b400 0x100>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			phys = <&usbphy 1>;
+			phy-names = "usb";
+			status = "enabled";
+		};
 	};
 };
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 5f93830915..7232f6d927 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -56,7 +56,7 @@
 #define SUNXI_USB2_BASE			0x01c1c000
 #endif
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-#ifdef CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
 #define SUNXI_USBPHY_BASE		0x01c19000
 #define SUNXI_USB0_BASE			0x01c1a000
 #define SUNXI_USB1_BASE			0x01c1b000
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c
index bd1bbee410..278587b493 100644
--- a/arch/arm/mach-sunxi/usb_phy.c
+++ b/arch/arm/mach-sunxi/usb_phy.c
@@ -146,12 +146,13 @@ __maybe_unused static void usb_phy_write(struct sunxi_usb_phy *phy, int addr,
 	}
 }
 
-#if defined CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
 static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)
 {
+#if defined CONFIG_MACH_SUN8I_H3
 	if (phy->id == 0)
 		clrbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01);
-
+#endif
 	clrbits_le32(phy->base + REG_PMU_UNK_H3, 0x02);
 }
 #elif defined CONFIG_MACH_SUN8I_A83T
diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig
index 348cbd4841..6d0198f02c 100644
--- a/configs/pine64_plus_defconfig
+++ b/configs/pine64_plus_defconfig
@@ -11,3 +11,4 @@ CONFIG_CONSOLE_MUX=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_FPGA is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
index f2d83e34bc..5bb97ff45b 100644
--- a/drivers/usb/host/ehci-sunxi.c
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -45,10 +45,10 @@ static int ehci_usb_probe(struct udevice *dev)
 	 * clocks resp. phys.
 	 */
 	priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
-#ifdef CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
 	extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
 #endif
-	priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST;
+	priv->phy_index = ((uintptr_t)hccr - SUNXI_USB1_BASE) / BASE_DIST;
 	priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
 	extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
 	priv->phy_index++; /* Non otg phys start at 1 */
@@ -63,7 +63,7 @@ static int ehci_usb_probe(struct udevice *dev)
 	sunxi_usb_phy_init(priv->phy_index);
 	sunxi_usb_phy_power_on(priv->phy_index);
 
-	hcor = (struct ehci_hcor *)((uint32_t)hccr +
+	hcor = (struct ehci_hcor *)((uintptr_t)hccr +
 				    HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 
 	return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
@@ -98,6 +98,7 @@ static const struct udevice_id ehci_usb_ids[] = {
 	{ .compatible = "allwinner,sun8i-a83t-ehci", },
 	{ .compatible = "allwinner,sun8i-h3-ehci",  },
 	{ .compatible = "allwinner,sun9i-a80-ehci", },
+	{ .compatible = "allwinner,sun50i-a64-ehci", },
 	{ }
 };
 
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index 2a1e8bf1e8..a44656e3c7 100644
--- a/drivers/usb/host/ohci-sunxi.c
+++ b/drivers/usb/host/ohci-sunxi.c
@@ -101,6 +101,7 @@ static const struct udevice_id ohci_usb_ids[] = {
 	{ .compatible = "allwinner,sun8i-a83t-ohci", },
 	{ .compatible = "allwinner,sun8i-h3-ohci",  },
 	{ .compatible = "allwinner,sun9i-a80-ohci", },
+	{ .compatible = "allwinner,sun50i-a64-ohci", },
 	{ }
 };
 
diff --git a/include/configs/sun50i.h b/include/configs/sun50i.h
index 0fdb4c7b99..3e5708b493 100644
--- a/include/configs/sun50i.h
+++ b/include/configs/sun50i.h
@@ -11,6 +11,11 @@
  * A64 specific configuration
  */
 
+#ifdef CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_SUNXI
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#endif
+
 #define CONFIG_SUNXI_USB_PHYS	1
 
 #define COUNTER_FREQUENCY	CONFIG_TIMER_CLK_FREQ