diff options
| author | Keerthy <j-keerthy@ti.com> | 2017-06-02 15:00:31 +0530 |
|---|---|---|
| committer | Jaehoon Chung <jh80.chung@samsung.com> | 2017-06-09 20:25:16 +0900 |
| commit | fc69d472621b5c7513bcb8b4e1fe58ca8f5e035a (patch) | |
| tree | 756376f5f7faee007ddc06ed7aed6524eb31982b | |
| parent | e395b8848ac3a432faa70b4ba3bcbcbcc91ca555 (diff) | |
board: ti: AM43XX: Add ddr voltage rail configuration
Add ddr voltage rail (dcdc3) configuration. Set the dcdc3
DDR supply to 1.35V.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
| -rw-r--r-- | board/ti/am43xx/board.c | 7 | ||||
| -rw-r--r-- | include/power/tps65218.h | 1 |
2 files changed, 8 insertions, 0 deletions
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index f44103d4d6..a25902813e 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -421,6 +421,13 @@ void scale_vcores_generic(u32 m) printf("%s failure\n", __func__); return; } + + /* Set DCDC3 (DDR) voltage */ + if (tps65218_voltage_update(TPS65218_DCDC3, + TPS65218_DCDC3_VOLT_SEL_1350MV)) { + printf("%s failure\n", __func__); + return; + } } void scale_vcores_idk(u32 m) diff --git a/include/power/tps65218.h b/include/power/tps65218.h index e3538e21f0..43b9c9aa52 100644 --- a/include/power/tps65218.h +++ b/include/power/tps65218.h @@ -63,6 +63,7 @@ enum { #define TPS65218_DCDC_VOLT_SEL_1200MV 0x23 #define TPS65218_DCDC_VOLT_SEL_1260MV 0x29 #define TPS65218_DCDC_VOLT_SEL_1330MV 0x30 +#define TPS65218_DCDC3_VOLT_SEL_1350MV 0x12 #define TPS65218_CC_STAT (BIT(0) | BIT(1)) #define TPS65218_STATE (BIT(2) | BIT(3)) |