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authorChe-Liang Chiou <clchiou@chromium.org>2011-05-09 11:42:02 +0800
committerSimon Glass <sjg@chromium.org>2011-08-29 10:39:20 -0700
commitfc8594e72004eef00d69845a0061a59cf269f742 (patch)
treed1983299c5c6c79441e94b26a808abcc8522c726
parent3a269b4769092aaebf88bf54a477d563127c8ef4 (diff)
Remove TPM functions and x86-specific CPU state
The removed TPM functions are implemented in verified boot reference library (vboot_reference), and so this commit removes the implementation of these functions in u-boot. This commit also removes codes that are related to x86-specific CPU state (S3 resume). BUG=none TEST=CROSS_COMPILE=armv7a-cros-linux-gnueabi- ./MAKEALL chromeos Cherry-pick: 75707bc Change-Id: Id4a967b9dd16549bb26adbe27ce96caa713bfe30 Reviewed-on: http://gerrit.chromium.org/gerrit/515 Tested-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
-rw-r--r--board/nvidia/chromeos/Makefile2
-rw-r--r--board/nvidia/chromeos/gpio.c2
-rw-r--r--board/nvidia/chromeos/tpm_driver.c20
-rw-r--r--common/cmd_cros.c2
-rw-r--r--common/cmd_cros_bootstub.c33
-rw-r--r--common/cmd_cros_normal_firmware.c2
-rw-r--r--common/cmd_cros_rec.c2
-rw-r--r--include/chromeos/gpio.h (renamed from include/chromeos/hardware_interface.h)17
-rw-r--r--lib/chromeos/os_storage.c2
9 files changed, 11 insertions, 71 deletions
diff --git a/board/nvidia/chromeos/Makefile b/board/nvidia/chromeos/Makefile
index e68d1f1d26c..b1d3bd1b70c 100644
--- a/board/nvidia/chromeos/Makefile
+++ b/board/nvidia/chromeos/Makefile
@@ -38,9 +38,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)libchromeos_hardware_interface.a
-COBJS-$(CONFIG_CHROMEOS) += cpu_state.o
COBJS-$(CONFIG_CHROMEOS) += gpio.o
-COBJS-$(CONFIG_CHROMEOS) += tpm_driver.o
COBJS := $(COBJS-y)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/nvidia/chromeos/gpio.c b/board/nvidia/chromeos/gpio.c
index 8111b6b1d9a..64a93f4a9b2 100644
--- a/board/nvidia/chromeos/gpio.c
+++ b/board/nvidia/chromeos/gpio.c
@@ -39,7 +39,7 @@
#include <common.h>
#include "../../common/lcd/gpinit/gpinit.h"
-#include <chromeos/hardware_interface.h>
+#include <chromeos/gpio.h>
#define GPIO_ACTIVE_HIGH 0
#define GPIO_ACTIVE_LOW 1
diff --git a/board/nvidia/chromeos/tpm_driver.c b/board/nvidia/chromeos/tpm_driver.c
deleted file mode 100644
index f3e7916e9ca..00000000000
--- a/board/nvidia/chromeos/tpm_driver.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- */
-
-/* Implementation of per-board TPM driver functions */
-
-#include <chromeos/hardware_interface.h>
-
-/* TODO Replace dummy functions below with real implementation. */
-
-/* Returns 0 if success, nonzero if error. */
-int initialize_tpm(void) { return 0; }
-int lock_tpm(void) { return 0; }
-int lock_tpm_rewritable_firmware_index(void) { return 0; }
diff --git a/common/cmd_cros.c b/common/cmd_cros.c
index 2440a7ffe3a..6deab3171b5 100644
--- a/common/cmd_cros.c
+++ b/common/cmd_cros.c
@@ -17,7 +17,7 @@
#include <chromeos/firmware_storage.h>
#include <chromeos/fmap.h>
#include <chromeos/gbb_bmpblk.h>
-#include <chromeos/hardware_interface.h>
+#include <chromeos/gpio.h>
#include <chromeos/load_firmware_helper.h>
#include <chromeos/vboot_nvstorage_helper.h>
#include <chromeos/os_storage.h>
diff --git a/common/cmd_cros_bootstub.c b/common/cmd_cros_bootstub.c
index a970c50959e..2565e35db5e 100644
--- a/common/cmd_cros_bootstub.c
+++ b/common/cmd_cros_bootstub.c
@@ -14,7 +14,7 @@
#include <command.h>
#include <malloc.h>
#include <chromeos/firmware_storage.h>
-#include <chromeos/hardware_interface.h>
+#include <chromeos/gpio.h>
#include <chromeos/load_firmware_helper.h>
#include <chromeos/vboot_nvstorage_helper.h>
@@ -74,7 +74,6 @@ int do_cros_bootstub(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
firmware_storage_t file;
VbNvContext nvcxt;
uint64_t boot_flags = 0;
- uint32_t debug_reset_mode = 0;
uint32_t recovery_request = 0;
uint32_t reason = VBNV_RECOVERY_NOT_REQUESTED;
uint8_t *firmware_data;
@@ -88,16 +87,7 @@ int do_cros_bootstub(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
if (is_firmware_write_protect_gpio_asserted())
WARN_ON_FAILURE(file.lock_device(file.context));
- if (initialize_tpm()) {
- debug(PREFIX "init tpm failed\n");
- reason = VBNV_RECOVERY_RO_TPM_ERROR;
- goto RECOVERY;
- }
-
- if (read_nvcontext(&nvcxt) ||
- VbNvGet(&nvcxt, VBNV_DEBUG_RESET_MODE,
- &debug_reset_mode) ||
- VbNvGet(&nvcxt, VBNV_RECOVERY_REQUEST,
+ if (read_nvcontext(&nvcxt) || VbNvGet(&nvcxt, VBNV_RECOVERY_REQUEST,
&recovery_request)) {
debug(PREFIX "fail to read nvcontext\n");
reason = VBNV_RECOVERY_US_UNSPECIFIED;
@@ -111,19 +101,6 @@ int do_cros_bootstub(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
goto RECOVERY;
}
- if (is_s3_resume() && !debug_reset_mode) {
- if (lock_tpm()) {
- debug(PREFIX "lock tpm failed\n");
- reason = VBNV_RECOVERY_RO_TPM_ERROR;
- goto RECOVERY;
- }
-
- /* TODO Jump to S3 resume pointer and should never return */
- return 0;
- /* reason = VBNV_RECOVERY_RO_S3_RESUME; */
- /* goto RECOVERY; */
- }
-
if (recovery_request != VBNV_RECOVERY_NOT_REQUESTED) {
debug(PREFIX "boot recovery cookie set\n");
reason = recovery_request;
@@ -148,12 +125,6 @@ int do_cros_bootstub(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
goto RECOVERY;
}
- if (lock_tpm_rewritable_firmware_index()) {
- debug(PREFIX "lock tpm rewritable firmware index failed\n");
- reason = VBNV_RECOVERY_RO_TPM_ERROR;
- goto RECOVERY;
- }
-
if (status == LOAD_FIRMWARE_SUCCESS) {
jump_to_firmware((void (*)(void)) firmware_data);
} else if (status == LOAD_FIRMWARE_REBOOT) {
diff --git a/common/cmd_cros_normal_firmware.c b/common/cmd_cros_normal_firmware.c
index 0b37a507a28..eab9c004b5a 100644
--- a/common/cmd_cros_normal_firmware.c
+++ b/common/cmd_cros_normal_firmware.c
@@ -16,8 +16,8 @@
#include <malloc.h>
#include <mmc.h>
#include <chromeos/firmware_storage.h>
+#include <chromeos/gpio.h>
#include <chromeos/load_firmware_helper.h>
-#include <chromeos/hardware_interface.h>
#include <chromeos/os_storage.h>
#include <chromeos/vboot_nvstorage_helper.h>
diff --git a/common/cmd_cros_rec.c b/common/cmd_cros_rec.c
index 48234af040e..07bb0aeac71 100644
--- a/common/cmd_cros_rec.c
+++ b/common/cmd_cros_rec.c
@@ -20,7 +20,7 @@
#include <chromeos/firmware_storage.h>
#include <chromeos/load_firmware_helper.h>
#include <chromeos/gbb_bmpblk.h>
-#include <chromeos/hardware_interface.h>
+#include <chromeos/gpio.h>
#include <chromeos/os_storage.h>
#include <chromeos/vboot_nvstorage_helper.h>
diff --git a/include/chromeos/hardware_interface.h b/include/chromeos/gpio.h
index 402148f008c..ec94fe6f62e 100644
--- a/include/chromeos/hardware_interface.h
+++ b/include/chromeos/gpio.h
@@ -8,23 +8,14 @@
* Software Foundation.
*/
-/*
- * The minimal hardware interface for Chrome OS verified boot
- */
+/* GPIO interface for Chrome OS verified boot */
-#ifndef __HARDWARE_INTERFACE_H__
-#define __HARDWARE_INTERFACE_H__
-
-int is_s3_resume(void);
+#ifndef __GPIO_H__
+#define __GPIO_H__
/* GPIO accessor functions: returns 0 if false, nonzero if true */
int is_firmware_write_protect_gpio_asserted(void);
int is_recovery_mode_gpio_asserted(void);
int is_developer_mode_gpio_asserted(void);
-/* TPM driver functions: returns 0 if success, nonzero if error. */
-int initialize_tpm(void);
-int lock_tpm(void);
-int lock_tpm_rewritable_firmware_index(void);
-
-#endif /* __HARDWARE_INTERFACE_H__ */
+#endif /* __GPIO_H__ */
diff --git a/lib/chromeos/os_storage.c b/lib/chromeos/os_storage.c
index 6a466c623a6..f75b8d905a3 100644
--- a/lib/chromeos/os_storage.c
+++ b/lib/chromeos/os_storage.c
@@ -11,8 +11,8 @@
#include <common.h>
#include <malloc.h>
#include <part.h>
+#include <chromeos/gpio.h>
#include <chromeos/os_storage.h>
-#include <chromeos/hardware_interface.h>
/* TODO For load fmap; remove when not used */
#include <chromeos/firmware_storage.h>