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authorBin Meng <bmeng.cn@gmail.com>2016-10-09 04:14:18 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-10-12 10:58:24 +0800
commit2d3c573ee6373f4521491f1a38e81245c3a6be57 (patch)
tree4e75dfa2d62db43829a0092128ec054696a6c776
parent3968398eb2d974b4840d7210d8503d7cbd8f4c48 (diff)
x86: coreboot: Convert to use DM coreboot video driver
This converts coreboot to use DM framebuffer driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/x86/cpu/coreboot/Kconfig4
-rw-r--r--arch/x86/dts/bayleybay.dts1
-rw-r--r--arch/x86/dts/broadwell_som-6896.dts1
-rw-r--r--arch/x86/dts/chromebook_link.dts1
-rw-r--r--arch/x86/dts/chromebook_samus.dts1
-rw-r--r--arch/x86/dts/chromebox_panther.dts1
-rw-r--r--arch/x86/dts/coreboot_fb.dtsi5
-rw-r--r--arch/x86/dts/minnowmax.dts1
-rw-r--r--configs/coreboot-x86_defconfig2
-rw-r--r--doc/README.x864
-rw-r--r--drivers/video/Makefile2
-rw-r--r--include/configs/som-6896.h6
12 files changed, 21 insertions, 8 deletions
diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index e0e3c64506..4b3601f66d 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -8,8 +8,4 @@ config CBMEM_CONSOLE
bool
default y
-config VIDEO_COREBOOT
- bool
- default y
-
endif
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index c8907ce44b..18b310d39e 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -14,6 +14,7 @@
/include/ "serial.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
/ {
model = "Intel Bayley Bay";
diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts
index 4bb0a34b5f..3966199085 100644
--- a/arch/x86/dts/broadwell_som-6896.dts
+++ b/arch/x86/dts/broadwell_som-6896.dts
@@ -4,6 +4,7 @@
/include/ "serial.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
/ {
model = "Advantech SOM-6896";
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index fb1b31dc5e..b93234046e 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -7,6 +7,7 @@
/include/ "serial.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
/ {
model = "Google Link";
diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts
index 5dd3e57cb9..52a9ea6622 100644
--- a/arch/x86/dts/chromebook_samus.dts
+++ b/arch/x86/dts/chromebook_samus.dts
@@ -7,6 +7,7 @@
/include/ "serial.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
/ {
model = "Google Samus";
diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index 480b36658e..b25c9194f3 100644
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -4,6 +4,7 @@
/include/ "serial.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
/ {
model = "Google Panther";
diff --git a/arch/x86/dts/coreboot_fb.dtsi b/arch/x86/dts/coreboot_fb.dtsi
new file mode 100644
index 0000000000..7d72f18537
--- /dev/null
+++ b/arch/x86/dts/coreboot_fb.dtsi
@@ -0,0 +1,5 @@
+/ {
+ coreboot-fb {
+ compatible = "coreboot-fb";
+ };
+};
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 1a8a8cc7f1..d51318bdf6 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -13,6 +13,7 @@
/include/ "serial.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
/ {
model = "Intel Minnowboard Max";
diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig
index 378d75fb50..b33c5c4da8 100644
--- a/configs/coreboot-x86_defconfig
+++ b/configs/coreboot-x86_defconfig
@@ -40,5 +40,7 @@ CONFIG_TPM_TIS_LPC=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_COREBOOT=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_TPM=y
diff --git a/doc/README.x86 b/doc/README.x86
index c34f45586b..679955983b 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -381,6 +381,10 @@ To enable video you must enable these options in coreboot:
- Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
- Keep VESA framebuffer
+And include coreboot_fb.dtsi in your board's device tree source file, like:
+
+ /include/ "coreboot_fb.dtsi"
+
At present it seems that for Minnowboard Max, coreboot does not pass through
the video information correctly (it always says the resolution is 0x0). This
works correctly for link though.
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 8a99d24c08..4a4241750d 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -37,7 +37,7 @@ obj-$(CONFIG_S6E63D6) += s6e63d6.o
obj-$(CONFIG_LD9040) += ld9040.o
obj-$(CONFIG_SED156X) += sed156x.o
obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o
-obj-$(CONFIG_VIDEO_COREBOOT) += coreboot_fb.o
+obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o
obj-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
obj-$(CONFIG_VIDEO_IMX25LCDC) += imx25lcdc.o videomodes.o
diff --git a/include/configs/som-6896.h b/include/configs/som-6896.h
index 43a9623f04..d058603b14 100644
--- a/include/configs/som-6896.h
+++ b/include/configs/som-6896.h
@@ -27,9 +27,9 @@
#define CONFIG_ARCH_EARLY_INIT_R
-#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,vga,usbkbd\0" \
- "stdout=serial,vga\0" \
- "stderr=serial,vga\0"
+#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x00ff0000