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authorJames Yang <James.Yang@freescale.com>2013-03-25 07:39:58 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-24 16:54:09 -0500
commitc416faf84f0586028d430bc962822cbfa17cece9 (patch)
tree64ceb1126d3cdcaa60801b68b8b7ba0b94dbb24f
parent9cefbd64b2ec2e320109ec41ec5cf476161c2c78 (diff)
Enable L2 cache parity/ECC error checking
Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
-rw-r--r--arch/powerpc/cpu/mpc85xx/cpu_init.c2
-rw-r--r--arch/powerpc/cpu/mpc85xx/start.S2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 48e6a05d38d..d5b17de7c67 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -337,7 +337,7 @@ int enable_cluster_l2(void)
while ((in_be32(&l2cache->l2csr0)
& (L2CSR0_L2FI|L2CSR0_L2LFC)) != 0)
;
- out_be32(&l2cache->l2csr0, L2CSR0_L2E);
+ out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE);
}
i++;
} while (!(cluster & TP_CLUSTER_EOC));
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 5542d0afb24..87168e202dd 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -734,7 +734,7 @@ enable_l2_cluster_l2:
isync
and. r1, r0, r4
bne 1b
- lis r4, L2CSR0_L2E@h
+ lis r4, (L2CSR0_L2E|L2CSR0_L2PE)@h
sync
stw r4, 0(r3) /* enable L2 */
delete_ccsr_l2_tlb: