MLK-25864 mx7ulp_evk: Update DDR configurations for 352Mhz clock

Current DDR configuration is used for 320Mhz freq, it can work but not
aligned with timing parameters generated from RPA.

Update the DDR configurations with updated timing parameters for 352Mhz

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 9d5dda1e34992284bf0423eed4ebdb4fac50c1e9)

2 files changed, 45 insertions, 42 deletions

diff --git a/board/freescale/mx7ulp_evk/imximage.cfg b/board/freescale/mx7ulp_evk/imximage.cfg
index 62fd79afd6c..cb443c904e6 100644
--- a/board/freescale/mx7ulp_evk/imximage.cfg
+++ b/board/freescale/mx7ulp_evk/imximage.cfg
@@ -79,52 +79,53 @@ DATA 4   0x40AD0098 0x00000180
 DATA 4   0x40AD009C 0x00000180
 
 DATA 4   0x40AD00E0 0x00040000
-DATA 4   0x40AD00E4 0x00040000
 
 DATA 4   0x40AB001C 0x00008000
+DATA 4   0x40AB085C 0x1B3E80AF
 DATA 4   0x40AB0800 0xA1390003
-DATA 4   0x40AB085C 0x0D3900A0
 DATA 4   0x40AB0890 0x00400000
 
-DATA 4   0x40AB0848 0x40404040
-DATA 4   0x40AB0850 0x40404040
 DATA 4   0x40AB081C 0x33333333
 DATA 4   0x40AB0820 0x33333333
 DATA 4   0x40AB0824 0x33333333
 DATA 4   0x40AB0828 0x33333333
 
 DATA 4   0x40AB08C0 0x24922492
+DATA 4   0x40AB0848 0x36363838
+DATA 4   0x40AB0850 0x34323C36
+DATA 4   0x40AB083C 0x20000000
+DATA 4   0x40AB0840 0x00000000
 DATA 4   0x40AB08B8 0x00000800
 
-DATA 4   0x40AB0004 0x00020052
-DATA 4   0x40AB000C 0x292C42F3
-DATA 4   0x40AB0010 0x00100A22
-DATA 4   0x40AB0038 0x00120556
-DATA 4   0x40AB0014 0x00C700DB
+DATA 4   0x40AB000C 0x2D314313
+DATA 4   0x40AB0004 0x00020012
+DATA 4   0x40AB0010 0xB6AE0B22
+DATA 4   0x40AB0014 0x00C70123
 DATA 4   0x40AB0018 0x00211718
 DATA 4   0x40AB002C 0x0F9F26D2
 DATA 4   0x40AB0030 0x009F0E10
+DATA 4   0x40AB0038 0x00150667
 DATA 4   0x40AB0040 0x0000003F
 DATA 4   0x40AB0000 0xC3190000
 
 DATA 4   0x40AB001C 0x00008010
 DATA 4   0x40AB001C 0x00008018
 DATA 4   0x40AB001C 0x003F8030
-DATA 4   0x40AB001C 0x003F8038
 DATA 4   0x40AB001C 0xFF0A8030
-DATA 4   0x40AB001C 0xFF0A8038
-DATA 4   0x40AB001C 0x04028030
-DATA 4   0x40AB001C 0x04028038
 DATA 4   0x40AB001C 0x83018030
-DATA 4   0x40AB001C 0x83018038
+DATA 4   0x40AB001C 0x04028030
 DATA 4   0x40AB001C 0x01038030
+DATA 4   0x40AB001C 0x003F8038
+DATA 4   0x40AB001C 0xFF0A8038
+DATA 4   0x40AB001C 0x83018038
+DATA 4   0x40AB001C 0x04028038
 DATA 4   0x40AB001C 0x01038038
 
-DATA 4   0x40AB083C 0x20000000
+DATA 4   0x40AB083C 0xA0000000
+DATA 4   0x40AB083C 0xA0000000
 
 DATA 4   0x40AB0020 0x00001800
-DATA 4   0x40AB0800 0xA1310000
 DATA 4   0x40AB0004 0x00020052
-DATA 4   0x40AB0404 0x00011006
+DATA 4   0x40AB0404 0x00010106
 DATA 4   0x40AB001C 0x00000000
 #endif
diff --git a/board/freescale/mx7ulp_evk/plugin.S b/board/freescale/mx7ulp_evk/plugin.S
index 2cc93dbdd57..411716435ea 100644
--- a/board/freescale/mx7ulp_evk/plugin.S
+++ b/board/freescale/mx7ulp_evk/plugin.S
@@ -108,23 +108,17 @@ wait2:
 	str r1, [r0, #0x9c]
 	ldr r1, =0x00040000
 	str r1, [r0, #0xe0]
-	ldr r1, =0x00040000
-	str r1, [r0, #0xe4]
 
 	ldr r0, =0x40ab0000
 	ldr r1, =0x00008000
 	str r1, [r0, #0x1c]
+	ldr r1, =0x1B3E80AF
+	str r1, [r0, #0x85c]
 	ldr r1, =0xA1390003
 	str r1, [r0, #0x800]
-	ldr r1, =0x0D3900A0
-	str r1, [r0, #0x85c]
 	ldr r1, =0x00400000
 	str r1, [r0, #0x890]
 
-	ldr r1, =0x40404040
-	str r1, [r0, #0x848]
-	ldr r1, =0x40404040
-	str r1, [r0, #0x850]
 	ldr r1, =0x33333333
 	str r1, [r0, #0x81c]
 	ldr r1, =0x33333333
@@ -136,18 +130,24 @@ wait2:
 
 	ldr r1, =0x24922492
 	str r1, [r0, #0x8c0]
+	ldr r1, =0x36363838
+	str r1, [r0, #0x848]
+	ldr r1, =0x34323C36
+	str r1, [r0, #0x850]
+	ldr r1, =0x20000000
+	str r1, [r0, #0x83c]
+	ldr r1, =0x00000000
+	str r1, [r0, #0x840]
 	ldr r1, =0x00000800
 	str r1, [r0, #0x8b8]
 
-	ldr r1, =0x00020052
-	str r1, [r0, #0x4]
-	ldr r1, =0x292C42F3
+	ldr r1, =0x2D314313
 	str r1, [r0, #0xc]
-	ldr r1, =0x00100A22
+	ldr r1, =0x00020012
+	str r1, [r0, #0x4]
+	ldr r1, =0xB6AE0B22
 	str r1, [r0, #0x10]
-	ldr r1, =0x00120556
-	str r1, [r0, #0x38]
-	ldr r1, =0x00C700DB
+	ldr r1, =0x00C70123
 	str r1, [r0, #0x14]
 	ldr r1, =0x00211718
 	str r1, [r0, #0x18]
@@ -156,6 +156,8 @@ wait2:
 	str r1, [r0, #0x2c]
 	ldr r1, =0x009F0E10
 	str r1, [r0, #0x30]
+	ldr r1, =0x00150667
+	str r1, [r0, #0x38]
 	ldr r1, =0x0000003F
 	str r1, [r0, #0x40]
 	ldr r1, =0xC3190000
@@ -167,35 +169,35 @@ wait2:
 	str r1, [r0, #0x1c]
 	ldr r1, =0x003F8030
 	str r1, [r0, #0x1c]
-	ldr r1, =0x003F8038
-	str r1, [r0, #0x1c]
 	ldr r1, =0xFF0A8030
 	str r1, [r0, #0x1c]
-	ldr r1, =0xFF0A8038
+	ldr r1, =0x83018030
 	str r1, [r0, #0x1c]
 	ldr r1, =0x04028030
 	str r1, [r0, #0x1c]
-	ldr r1, =0x04028038
+	ldr r1, =0x01038030
 	str r1, [r0, #0x1c]
-	ldr r1, =0x83018030
+	ldr r1, =0x003F8038
+	str r1, [r0, #0x1c]
+	ldr r1, =0xFF0A8038
 	str r1, [r0, #0x1c]
 	ldr r1, =0x83018038
 	str r1, [r0, #0x1c]
-	ldr r1, =0x01038030
+	ldr r1, =0x04028038
 	str r1, [r0, #0x1c]
 	ldr r1, =0x01038038
 	str r1, [r0, #0x1c]
 
-	ldr r1, =0x20000000
+	ldr r1, =0xA0000000
+	str r1, [r0, #0x83c]
+	ldr r1, =0xA0000000
 	str r1, [r0, #0x83c]
 
 	ldr r1, =0x00001800
 	str r1, [r0, #0x20]
-	ldr r1, =0xA1310000
-	str r1, [r0, #0x800]
 	ldr r1, =0x00020052
 	str r1, [r0, #0x4]
-	ldr r1, =0x00011006
+	ldr r1, =0x00010106
 	str r1, [r0, #0x404]
 	ldr r1, =0x00000000
 	str r1, [r0, #0x1c]