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| author | Max Krummenacher <max.krummenacher@toradex.com> | 2024-03-19 16:11:46 +0100 |
|---|---|---|
| committer | Francesco Dolcini <francesco.dolcini@toradex.com> | 2024-03-21 14:26:33 +0000 |
| commit | b6f6371633b07db28fa44e6c2d8d0c5fa994da50 (patch) | |
| tree | 72fe3d3aa64a145408fb6dd7c78d974c2d144700 /.gitignore | |
| parent | 5fb5c207a377c5d90a54eac1a42cfee5f15fe364 (diff) | |
arm: dts: ti: verdin-am62: R5: Set memory size to 2gb
The maximum DDR RAM size stuffed on the Verdin AM62 is 2GB,
correct the memory node accordingly.
Commit 3610dbfc37e3 ("ram: k3-ddrss: Set SDRAM_IDX using device private
data, ddr_ram_size") now evaluates the device tree property and limits
DDR access to the specified size. Thus set the maximum stuffed size in
the dts corresponding to what is set in CFG_SYS_SDRAM_SIZE.
If CFG_SYS_SDRAM_SIZE is bigger than what is set in the device tree
SPLs and U-Boot freeze when probing for the DDR size.
Upstream-Status: Pending
The R5 dtb memory node is only needed in downstream TI U-Boot.
All mainline AM62 boards do not set the node, when said commit gets
upstreamed we can follow the pattern TI adds the node to the dtb.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Diffstat (limited to '.gitignore')
0 files changed, 0 insertions, 0 deletions