From c47b41a79ab5e8faec9aea6c4a06c4d1e4d1132f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Christian=20K=C3=B6nig?= Date: Fri, 3 Nov 2017 15:59:25 +0100 Subject: drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Not sure what that should originally been good for, but it doesn't seem to make any sense any more. Signed-off-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/cik.c | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) (limited to 'drivers/gpu/drm/amd/amdgpu/cik.c') diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c index a296f7bbe57c..8ba056a2a5da 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik.c +++ b/drivers/gpu/drm/amd/amdgpu/cik.c @@ -757,72 +757,72 @@ static void cik_init_golden_registers(struct amdgpu_device *adev) case CHIP_BONAIRE: amdgpu_program_register_sequence(adev, bonaire_mgcg_cgcg_init, - (const u32)ARRAY_SIZE(bonaire_mgcg_cgcg_init)); + ARRAY_SIZE(bonaire_mgcg_cgcg_init)); amdgpu_program_register_sequence(adev, bonaire_golden_registers, - (const u32)ARRAY_SIZE(bonaire_golden_registers)); + ARRAY_SIZE(bonaire_golden_registers)); amdgpu_program_register_sequence(adev, bonaire_golden_common_registers, - (const u32)ARRAY_SIZE(bonaire_golden_common_registers)); + ARRAY_SIZE(bonaire_golden_common_registers)); amdgpu_program_register_sequence(adev, bonaire_golden_spm_registers, - (const u32)ARRAY_SIZE(bonaire_golden_spm_registers)); + ARRAY_SIZE(bonaire_golden_spm_registers)); break; case CHIP_KABINI: amdgpu_program_register_sequence(adev, kalindi_mgcg_cgcg_init, - (const u32)ARRAY_SIZE(kalindi_mgcg_cgcg_init)); + ARRAY_SIZE(kalindi_mgcg_cgcg_init)); amdgpu_program_register_sequence(adev, kalindi_golden_registers, - (const u32)ARRAY_SIZE(kalindi_golden_registers)); + ARRAY_SIZE(kalindi_golden_registers)); amdgpu_program_register_sequence(adev, kalindi_golden_common_registers, - (const u32)ARRAY_SIZE(kalindi_golden_common_registers)); + ARRAY_SIZE(kalindi_golden_common_registers)); amdgpu_program_register_sequence(adev, kalindi_golden_spm_registers, - (const u32)ARRAY_SIZE(kalindi_golden_spm_registers)); + ARRAY_SIZE(kalindi_golden_spm_registers)); break; case CHIP_MULLINS: amdgpu_program_register_sequence(adev, kalindi_mgcg_cgcg_init, - (const u32)ARRAY_SIZE(kalindi_mgcg_cgcg_init)); + ARRAY_SIZE(kalindi_mgcg_cgcg_init)); amdgpu_program_register_sequence(adev, godavari_golden_registers, - (const u32)ARRAY_SIZE(godavari_golden_registers)); + ARRAY_SIZE(godavari_golden_registers)); amdgpu_program_register_sequence(adev, kalindi_golden_common_registers, - (const u32)ARRAY_SIZE(kalindi_golden_common_registers)); + ARRAY_SIZE(kalindi_golden_common_registers)); amdgpu_program_register_sequence(adev, kalindi_golden_spm_registers, - (const u32)ARRAY_SIZE(kalindi_golden_spm_registers)); + ARRAY_SIZE(kalindi_golden_spm_registers)); break; case CHIP_KAVERI: amdgpu_program_register_sequence(adev, spectre_mgcg_cgcg_init, - (const u32)ARRAY_SIZE(spectre_mgcg_cgcg_init)); + ARRAY_SIZE(spectre_mgcg_cgcg_init)); amdgpu_program_register_sequence(adev, spectre_golden_registers, - (const u32)ARRAY_SIZE(spectre_golden_registers)); + ARRAY_SIZE(spectre_golden_registers)); amdgpu_program_register_sequence(adev, spectre_golden_common_registers, - (const u32)ARRAY_SIZE(spectre_golden_common_registers)); + ARRAY_SIZE(spectre_golden_common_registers)); amdgpu_program_register_sequence(adev, spectre_golden_spm_registers, - (const u32)ARRAY_SIZE(spectre_golden_spm_registers)); + ARRAY_SIZE(spectre_golden_spm_registers)); break; case CHIP_HAWAII: amdgpu_program_register_sequence(adev, hawaii_mgcg_cgcg_init, - (const u32)ARRAY_SIZE(hawaii_mgcg_cgcg_init)); + ARRAY_SIZE(hawaii_mgcg_cgcg_init)); amdgpu_program_register_sequence(adev, hawaii_golden_registers, - (const u32)ARRAY_SIZE(hawaii_golden_registers)); + ARRAY_SIZE(hawaii_golden_registers)); amdgpu_program_register_sequence(adev, hawaii_golden_common_registers, - (const u32)ARRAY_SIZE(hawaii_golden_common_registers)); + ARRAY_SIZE(hawaii_golden_common_registers)); amdgpu_program_register_sequence(adev, hawaii_golden_spm_registers, - (const u32)ARRAY_SIZE(hawaii_golden_spm_registers)); + ARRAY_SIZE(hawaii_golden_spm_registers)); break; default: break; -- cgit v1.2.3