From 52f2a8906bac798f01d353c591747069616bfe21 Mon Sep 17 00:00:00 2001 From: Scott Williams Date: Wed, 10 Aug 2011 14:18:37 -0700 Subject: ARM: tegra: timer: Save TWD counter instead of load register In tegra_twd_suspend(), save the remaining count rather than the initial count of the timer. Also catch invalid TWD configurations during suspend/restore (e.g., enabled with a zero count). BUG 862605 Change-Id: I05bf9e37f922a2b0a48cff23f1aa94ec8e8e039e Signed-off-by: Scott Williams Rebase-Id: R6c7e5ae1220faee4564cd751fa6c94f7404ddc27 --- arch/arm/mach-tegra/timer.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-tegra/timer.c') diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index e49d03e508a1..74dee1cd8ffd 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c @@ -189,12 +189,19 @@ static struct syscore_ops tegra_timer_syscore_ops = { void tegra_twd_suspend(struct tegra_twd_context *context) { context->twd_ctrl = readl(twd_base + TWD_TIMER_CONTROL); - context->twd_load = readl(twd_base + TWD_TIMER_LOAD); + context->twd_load = readl(twd_base + TWD_TIMER_COUNTER); + if ((context->twd_load == 0) && (context->twd_ctrl & + (TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE))) { + WARN("%s: TWD enabled but counter was 0\n", __func__); + context->twd_load = 1; + } __raw_writel(0, twd_base + TWD_TIMER_CONTROL); } void tegra_twd_resume(struct tegra_twd_context *context) { + BUG_ON((context->twd_load == 0) && (context->twd_ctrl & + (TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE))); writel(context->twd_load, twd_base + TWD_TIMER_LOAD); writel(context->twd_ctrl, twd_base + TWD_TIMER_CONTROL); } -- cgit v1.2.3