From eed0de27726a55f145490619510c8ec58c9dc767 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Wed, 4 Jul 2012 18:32:32 +0530 Subject: ARM: OMAP4: Add local timer support for Device Tree Add cortex-a9 local timer support for all OMAP4 based SOCs using DT. Signed-off-by: Santosh Shilimkar Acked-by: Felipe Balbi Signed-off-by: Benoit Cousson --- arch/arm/mach-omap2/timer.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/mach-omap2/timer.c') diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 2ff6d41ec6c6..31f9c936125f 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include @@ -386,6 +387,11 @@ static void __init omap4_timer_init(void) if (omap_rev() != OMAP4430_REV_ES1_0) { int err; + if (of_have_populated_dt()) { + twd_local_timer_of_register(); + return; + } + err = twd_local_timer_register(&twd_local_timer); if (err) pr_err("twd_local_timer_register failed %d\n", err); -- cgit v1.2.3 From a032d33b65c89a781c871fd1def595fa6a69b52a Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 3 Aug 2012 09:21:10 -0600 Subject: ARM: OMAP: clean up some smatch warnings, fix some printk(KERN_ERR ... Resolve the following warnings from smatch: arch/arm/mach-omap2/gpmc.c:282 gpmc_cs_set_timings() info: why not propagate 'div' from gpmc_cs_calc_divider() instead of -1? arch/arm/mach-omap2/serial.c:328 omap_serial_init_port() error: 'pdev' dereferencing possible ERR_PTR() arch/arm/mach-omap2/timer.c:213 omap2_gp_clockevent_init() Error invalid range 4096 to -1 arch/arm/mach-omap2/gpio.c:63 omap2_gpio_dev_init() warn: possible memory leak of 'pdata' arch/arm/mach-omap2/omap_hwmod.c:1478 _assert_hardreset() warn: assigning -22 to unsigned variable 'ret' arch/arm/mach-omap2/omap_hwmod.c:1487 _assert_hardreset() warn: 4294963201 is more than 255 (max '(ret)' can be) so this is always the same. arch/arm/mach-omap2/omap_hwmod.c:1545 _read_hardreset() warn: assigning -22 to unsigned variable 'ret' arch/arm/mach-omap2/omap_hwmod.c:1554 _read_hardreset() warn: 4294963201 is more than 255 (max '(ret)' can be) so this is always the same. arch/arm/mach-omap2/dpll3xxx.c:629 omap3_clkoutx2_recalc() error: we previously assumed 'pclk' could be null (see line 627) arch/arm/mach-omap2/board-n8x0.c:422 n8x0_mmc_late_init() Error invalid range 14 to 13 arch/arm/mach-omap1/leds-h2p2-debug.c:71 h2p2_dbg_leds_event() error: potentially derefencing uninitialized 'fpga'. arch/arm/plat-omap/mux.c:79 omap_cfg_reg() Error invalid range 4096 to -1 Thanks to Tony Lindgren for pointing out that BUG() can be disabled. The changes in the first version that removed the subsequent return() after BUG() states have been dropped. Signed-off-by: Paul Walmsley Cc: Tony Lindgren --- arch/arm/mach-omap2/timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2/timer.c') diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 2ff6d41ec6c6..7e688c7c85bb 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -211,7 +211,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); BUG_ON(res); - omap2_gp_timer_irq.dev_id = (void *)&clkev; + omap2_gp_timer_irq.dev_id = &clkev; setup_irq(clkev.irq, &omap2_gp_timer_irq); __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); -- cgit v1.2.3 From 7d7e1eba7e92c2f9c76db80adc24836e7a114bfb Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 27 Aug 2012 17:43:01 -0700 Subject: ARM: OMAP2+: Prepare for irqs.h removal As the interrupts should only be defined in the platform_data, and eventually coming from device tree, there's no need to define them in header files. Let's remove the hardcoded references to irqs.h and fix up the includes so we don't rely on headers included in irqs.h. Note that we're defining OMAP_INTC_START as 0 to the interrupts. This will be needed when we enable SPARSE_IRQ. For some drivers we need to add #include for now until these drivers are fixed to remove cpu_is_omapxxxx() usage. While at it, sort som of the includes the standard way, and add the trailing commas where they are missing in the related data structures. Note that for drivers/staging/tidspbridge we just define things locally. Cc: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/timer.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-omap2/timer.c') diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 2ff6d41ec6c6..3bdaf9877e0b 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -38,14 +38,17 @@ #include #include -#include #include #include -#include "common.h" + #include #include +#include #include +#include + +#include "common.h" #include "powerdomain.h" /* Parent clocks, eventually these will come from the clock framework */ @@ -373,8 +376,7 @@ OMAP_SYS_TIMER(3_am33xx) #ifdef CONFIG_ARCH_OMAP4 #ifdef CONFIG_LOCAL_TIMERS static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, - OMAP44XX_LOCAL_TWD_BASE, - OMAP44XX_IRQ_LOCALTIMER); + OMAP44XX_LOCAL_TWD_BASE, 29 + OMAP_INTC_START); #endif static void __init omap4_timer_init(void) -- cgit v1.2.3 From dbc04161048dd5e5c3c58546688a0cc0854051e9 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 31 Aug 2012 10:59:07 -0700 Subject: ARM: OMAP: Split plat/hardware.h, use local soc.h for omap2+ As the plat and mach includes need to disappear for single zImage work, we need to remove plat/hardware.h. Do this by splitting plat/hardware.h into omap1 and omap2+ specific files. The old plat/hardware.h already has omap1 only defines, so it gets moved to mach/hardware.h for omap1. For omap2+, we use the local soc.h that for now just includes the related SoC headers to keep this patch more readable. Note that the local soc.h still includes plat/cpu.h that can be dealt with in later patches. Let's also include plat/serial.h from common.h for all the board-*.c files. This allows making the include files local later on without patching these files again. Note that only minimal changes are done in this patch for the drivers/watchdog/omap_wdt.c driver to keep things compiling. Further patches are needed to eventually remove cpu_is_omap usage in the drivers. Also only minimal changes are done to sound/soc/omap/* to remove the unneeded includes and to define OMAP44XX_MCPDM_L3_BASE locally so there's no need to include omap44xx.h. While at it, also sort some of the includes in the standard way. Cc: linux-watchdog@vger.kernel.org Cc: alsa-devel@alsa-project.org Cc: Peter Ujfalusi Cc: Jarkko Nikula Cc: Liam Girdwood Acked-by: Wim Van Sebroeck Acked-by: Mark Brown Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/timer.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2/timer.c') diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 3bdaf9877e0b..25cbe73b0cd7 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -46,8 +46,7 @@ #include #include -#include - +#include "soc.h" #include "common.h" #include "powerdomain.h" -- cgit v1.2.3 From fa6d79d27614223d82418023b7f5300f1a1530d3 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Mon, 13 Aug 2012 14:24:24 +0530 Subject: ARM: OMAP: Add initialisation for the real-time counter. The real time counter also called master counter, is a free-running counter. It produces the count used by the CPU local timer peripherals in the MPU cluster. The timer counts at a rate of 6.144 MHz. The ratio registers needs to be configured based on system clock only onetime. After initialisation, hardware takes care of adjusting the clock in different low power modes to keep counter rate constant. Signed-off-by: Santosh Shilimkar --- arch/arm/mach-omap2/timer.c | 90 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 89 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2/timer.c') diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 2ba4f57dda86..026fcfff6698 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -69,6 +69,11 @@ #define OMAP3_SECURE_TIMER 1 #endif +#define REALTIME_COUNTER_BASE 0x48243200 +#define INCREMENTER_NUMERATOR_OFFSET 0x10 +#define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14 +#define NUMERATOR_DENUMERATOR_MASK 0xfffff000 + /* Clockevent code */ static struct omap_dm_timer clkev; @@ -346,6 +351,84 @@ static void __init omap2_clocksource_init(int gptimer_id, omap2_gptimer_clocksource_init(gptimer_id, fck_source); } +#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER +/* + * The realtime counter also called master counter, is a free-running + * counter, which is related to real time. It produces the count used + * by the CPU local timer peripherals in the MPU cluster. The timer counts + * at a rate of 6.144 MHz. Because the device operates on different clocks + * in different power modes, the master counter shifts operation between + * clocks, adjusting the increment per clock in hardware accordingly to + * maintain a constant count rate. + */ +static void __init realtime_counter_init(void) +{ + void __iomem *base; + static struct clk *sys_clk; + unsigned long rate; + unsigned int reg, num, den; + + base = ioremap(REALTIME_COUNTER_BASE, SZ_32); + if (!base) { + pr_err("%s: ioremap failed\n", __func__); + return; + } + sys_clk = clk_get(NULL, "sys_clkin_ck"); + if (!sys_clk) { + pr_err("%s: failed to get system clock handle\n", __func__); + iounmap(base); + return; + } + + rate = clk_get_rate(sys_clk); + /* Numerator/denumerator values refer TRM Realtime Counter section */ + switch (rate) { + case 1200000: + num = 64; + den = 125; + break; + case 1300000: + num = 768; + den = 1625; + break; + case 19200000: + num = 8; + den = 25; + break; + case 2600000: + num = 384; + den = 1625; + break; + case 2700000: + num = 256; + den = 1125; + break; + case 38400000: + default: + /* Program it for 38.4 MHz */ + num = 4; + den = 25; + break; + } + + /* Program numerator and denumerator registers */ + reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) & + NUMERATOR_DENUMERATOR_MASK; + reg |= num; + __raw_writel(reg, base + INCREMENTER_NUMERATOR_OFFSET); + + reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) & + NUMERATOR_DENUMERATOR_MASK; + reg |= den; + __raw_writel(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET); + + iounmap(base); +} +#else +static inline void __init realtime_counter_init(void) +{} +#endif + #define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \ clksrc_nr, clksrc_src) \ static void __init omap##name##_timer_init(void) \ @@ -403,7 +486,12 @@ OMAP_SYS_TIMER(4) #endif #ifdef CONFIG_SOC_OMAP5 -OMAP_SYS_TIMER_INIT(5, 1, OMAP4_CLKEV_SOURCE, 2, OMAP4_MPU_SOURCE) +static void __init omap5_timer_init(void) +{ + omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); + omap2_clocksource_init(2, OMAP4_MPU_SOURCE); + realtime_counter_init(); +} OMAP_SYS_TIMER(5) #endif -- cgit v1.2.3 From 3c7c5dab44d6c8861bc86dab924353d8d40344f8 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Mon, 13 Aug 2012 14:39:03 +0530 Subject: ARM: OMAP5: Enable arch timer support Enable Cortex A15 generic timer support for OMAP5 based SOCs. The CPU local timers run on the free running real time counter clock. Acked-by: Benoit Cousson Signed-off-by: Santosh Shilimkar --- arch/arm/mach-omap2/timer.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/mach-omap2/timer.c') diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 026fcfff6698..2c5a45d8ca8c 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -41,6 +41,7 @@ #include #include #include +#include #include "common.h" #include #include @@ -488,9 +489,15 @@ OMAP_SYS_TIMER(4) #ifdef CONFIG_SOC_OMAP5 static void __init omap5_timer_init(void) { + int err; + omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); omap2_clocksource_init(2, OMAP4_MPU_SOURCE); realtime_counter_init(); + + err = arch_timer_of_register(); + if (err) + pr_err("%s: arch_timer_register failed %d\n", __func__, err); } OMAP_SYS_TIMER(5) #endif -- cgit v1.2.3