From 8f668fbbd571bbd5187a9a0eae150b768fc388ac Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Wed, 25 Dec 2013 16:01:30 +0400 Subject: USB: c67x00: add proper delays to HPI read/write According to CY7C67300 specification HPI read and write cycle duration Tcyc must be at least 6T long, where T is 1/48MHz, which is 125ns. Without this delay fast host processor cannot write to chip registers. Add proper ndelay to hpi_{read,write}_reg. Signed-off-by: Max Filippov Acked-by: Peter Korsgaard Signed-off-by: Greg Kroah-Hartman --- drivers/usb/c67x00/c67x00-ll-hpi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/usb/c67x00/c67x00-ll-hpi.c b/drivers/usb/c67x00/c67x00-ll-hpi.c index 3a1ca4dfc83a..cd2c6ed67493 100644 --- a/drivers/usb/c67x00/c67x00-ll-hpi.c +++ b/drivers/usb/c67x00/c67x00-ll-hpi.c @@ -22,6 +22,7 @@ */ #include +#include #include #include #include @@ -73,13 +74,22 @@ struct c67x00_lcp_int_data { #define HPI_ADDR 2 #define HPI_STATUS 3 +/* + * According to CY7C67300 specification (tables 140 and 141) HPI read and + * write cycle duration Tcyc must be at least 6T long, where T is 1/48MHz, + * which is 125ns. + */ +#define HPI_T_CYC_NS 125 + static inline u16 hpi_read_reg(struct c67x00_device *dev, int reg) { + ndelay(HPI_T_CYC_NS); return __raw_readw(dev->hpi.base + reg * dev->hpi.regstep); } static inline void hpi_write_reg(struct c67x00_device *dev, int reg, u16 value) { + ndelay(HPI_T_CYC_NS); __raw_writew(value, dev->hpi.base + reg * dev->hpi.regstep); } -- cgit v1.2.3