From b272cc769ac22014c0c60f2ebac46a2ae01300bf Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Thu, 27 Oct 2011 16:27:33 +0800 Subject: ASoC: wm8940: Fix mask for setting BCLKDIV According to the datasheet: BCLK is controlled by BIT[4:2] of WM8940_CLOCK(06h) register. Signed-off-by: Chris Paulson-Ellis Signed-off-by: Axel Lin Signed-off-by: Mark Brown --- sound/soc/codecs/wm8940.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8940.c b/sound/soc/codecs/wm8940.c index dc5cb3150857..de9ec9b8b7d9 100644 --- a/sound/soc/codecs/wm8940.c +++ b/sound/soc/codecs/wm8940.c @@ -621,7 +621,7 @@ static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai, switch (div_id) { case WM8940_BCLKDIV: - reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFEF3; + reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFE3; ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2)); break; case WM8940_MCLKDIV: -- cgit v1.2.3 From b01a3d69f85c0af0934451e0f5457f2f6e7f3e63 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Thu, 27 Oct 2011 16:35:49 +0800 Subject: ASoC: tlv320aic23: Clear TLV320AIC23_MS_MASTER bit for slave mode According to the datasheet: Digital Audio Interface Format (07h) register: BIT6: Master/slave mode 0: Slave 1: Master Current code sets TLV320AIC23_MS_MASTER bit for master mode, but does not clear it for slave mode. Signed-off-by: Axel Lin Signed-off-by: Mark Brown --- sound/soc/codecs/tlv320aic23.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/tlv320aic23.c b/sound/soc/codecs/tlv320aic23.c index ab27dbcd1262..336de8f69a02 100644 --- a/sound/soc/codecs/tlv320aic23.c +++ b/sound/soc/codecs/tlv320aic23.c @@ -430,6 +430,7 @@ static int tlv320aic23_set_dai_fmt(struct snd_soc_dai *codec_dai, iface_reg |= TLV320AIC23_MS_MASTER; break; case SND_SOC_DAIFMT_CBS_CFS: + iface_reg &= ~TLV320AIC23_MS_MASTER; break; default: return -EINVAL; -- cgit v1.2.3 From 68e47981437686e58de1edc616d6c3043e01f07e Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Thu, 27 Oct 2011 16:38:42 +0800 Subject: ASoC: tlv320aic3x: Clear BIT_CLK_MASTER and WORD_CLK_MASTER bits for for slave mode According to the datasheet: Page0 / Register8: Audio Serial Data interface Control Register A BIT 7: Bit Clock Directional Control 0: Bit clock is an input (slave mode) 1: Bit clock is an output (master mode) BIT 6: Word Clock Directional Control 0: Word clock is an input (slave mode) 1: Word clock is an output (master mode) Current code sets BIT_CLK_MASTER and WORD_CLK_MASTER bits for master mode, but does not clear these bits for slave mode. Signed-off-by: Axel Lin Signed-off-by: Mark Brown --- sound/soc/codecs/tlv320aic3x.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c index 7a49390bc30d..87d5ef188e29 100644 --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c @@ -1023,6 +1023,7 @@ static int aic3x_set_dai_fmt(struct snd_soc_dai *codec_dai, break; case SND_SOC_DAIFMT_CBS_CFS: aic3x->master = 0; + iface_areg &= ~(BIT_CLK_MASTER | WORD_CLK_MASTER); break; default: return -EINVAL; -- cgit v1.2.3 From 04c57163c8edfbc50e022737014069998ba4fc5f Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Fri, 28 Oct 2011 11:08:01 +0800 Subject: ASoC: wm8711: Fix wrong mask for setting input audio data bit length select The Input Audio Data Bit Length Select is controlled by BIT[3:2] of WM8711_IFACE(07h) register. Current code incorrectly masks BIT[1:0] which is for Audio Data Format Select. Signed-off-by: Axel Lin Signed-off-by: Mark Brown Cc: stable@kernel.org --- sound/soc/codecs/wm8711.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8711.c b/sound/soc/codecs/wm8711.c index 8d0347cf0e9a..8ba49d867ac7 100644 --- a/sound/soc/codecs/wm8711.c +++ b/sound/soc/codecs/wm8711.c @@ -151,7 +151,7 @@ static int wm8711_hw_params(struct snd_pcm_substream *substream, { struct snd_soc_codec *codec = dai->codec; struct wm8711_priv *wm8711 = snd_soc_codec_get_drvdata(codec); - u16 iface = snd_soc_read(codec, WM8711_IFACE) & 0xfffc; + u16 iface = snd_soc_read(codec, WM8711_IFACE) & 0xfff3; int i = get_coeff(wm8711->sysclk, params_rate(params)); u16 srate = (coeff_div[i].sr << 2) | (coeff_div[i].bosr << 1) | coeff_div[i].usb; -- cgit v1.2.3 From d558cfc30064a97c2c65dbd2b3a4f5a1dea7ec1b Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Fri, 28 Oct 2011 15:17:56 +0800 Subject: ASoC: Leave input audio data bit length settings untouched in wm8711_set_dai_fmt Current implementation in wm8711_set_dai_fmt always clear BIT[3:2] (the Input Audio Data Bit Length Select) of WM8711_IFACE(07h) register. Input Audio Data Bit Length Select bits are set by wm8711_hw_params, we should leave BIT[3:2] untouched in wm8711_set_dai_fmt. Signed-off-by: Axel Lin Signed-off-by: Mark Brown Cc: stable@kernel.org --- sound/soc/codecs/wm8711.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8711.c b/sound/soc/codecs/wm8711.c index 8ba49d867ac7..076bdb9930a1 100644 --- a/sound/soc/codecs/wm8711.c +++ b/sound/soc/codecs/wm8711.c @@ -232,7 +232,7 @@ static int wm8711_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) { struct snd_soc_codec *codec = codec_dai->codec; - u16 iface = 0; + u16 iface = snd_soc_read(codec, WM8711_IFACE) & 0x000c; /* set master/slave audio interface */ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { -- cgit v1.2.3 From 5a7c5f26df3c0122814dfa1c13ef6dfbdbffdb86 Mon Sep 17 00:00:00 2001 From: Hong Xu Date: Fri, 28 Oct 2011 15:36:39 +0800 Subject: ASoC: WM8904: Set `invert' bit for Capture Switch Set `invert' bit for Capture Switch. Otherwise analogue is muted when Capture Switch is ON. Signed-off-by: Hong Xu Signed-off-by: Mark Brown Cc: stable@kernel.org --- sound/soc/codecs/wm8904.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c index 9fc8f4c0a9a9..285ef87e6704 100644 --- a/sound/soc/codecs/wm8904.c +++ b/sound/soc/codecs/wm8904.c @@ -867,7 +867,7 @@ SOC_ENUM("Right Capture Mode", rin_mode), SOC_DOUBLE_R("Capture Volume", WM8904_ANALOGUE_LEFT_INPUT_0, WM8904_ANALOGUE_RIGHT_INPUT_0, 0, 31, 0), SOC_DOUBLE_R("Capture Switch", WM8904_ANALOGUE_LEFT_INPUT_0, - WM8904_ANALOGUE_RIGHT_INPUT_0, 7, 1, 0), + WM8904_ANALOGUE_RIGHT_INPUT_0, 7, 1, 1), SOC_SINGLE("High Pass Filter Switch", WM8904_ADC_DIGITAL_0, 4, 1, 0), SOC_ENUM("High Pass Filter Mode", hpf_mode), -- cgit v1.2.3 From 64964e82644e9f809dc83019186c21ed5b70aa56 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 31 Oct 2011 19:02:13 +0000 Subject: ASoC: Fix return value of wm5100_gpio_direction_out() We can't just pass back the return value of snd_soc_update_bits() as it will be 1 if a bit changed rather than zero. Signed-off-by: Mark Brown --- sound/soc/codecs/wm5100.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm5100.c b/sound/soc/codecs/wm5100.c index 5d88c99aaea6..42d9039a49e9 100644 --- a/sound/soc/codecs/wm5100.c +++ b/sound/soc/codecs/wm5100.c @@ -2361,13 +2361,17 @@ static int wm5100_gpio_direction_out(struct gpio_chip *chip, { struct wm5100_priv *wm5100 = gpio_to_wm5100(chip); struct snd_soc_codec *codec = wm5100->codec; - int val; + int val, ret; val = (1 << WM5100_GP1_FN_SHIFT) | (!!value << WM5100_GP1_LVL_SHIFT); - return snd_soc_update_bits(codec, WM5100_GPIO_CTRL_1 + offset, - WM5100_GP1_FN_MASK | WM5100_GP1_DIR | - WM5100_GP1_LVL, val); + ret = snd_soc_update_bits(codec, WM5100_GPIO_CTRL_1 + offset, + WM5100_GP1_FN_MASK | WM5100_GP1_DIR | + WM5100_GP1_LVL, val); + if (ret < 0) + return ret; + else + return 0; } static int wm5100_gpio_get(struct gpio_chip *chip, unsigned offset) -- cgit v1.2.3 From 4f4488abc97c1c27ff029f887944e6a6da1f5733 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 1 Nov 2011 13:36:10 +0000 Subject: ASoC: Ensure WM8962 PLL registers are reset The WM8962 has a separate software reset for the PLL registers. Ensure that these are reset also on startup. Signed-off-by: Mark Brown Cc: stable@kernel.org --- sound/soc/codecs/wm8962.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index f60dfa16545e..32d931f1122c 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -1961,7 +1961,13 @@ static int wm8962_readable_register(struct snd_soc_codec *codec, unsigned int re static int wm8962_reset(struct snd_soc_codec *codec) { - return snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243); + int ret; + + ret = snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243); + if (ret != 0) + return ret; + + return snd_soc_write(codec, WM8962_PLL_SOFTWARE_RESET, 0); } static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0); -- cgit v1.2.3 From 2af8de8c39cf58e5a5e40a9d5d71332da98e6ba7 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 1 Nov 2011 13:53:37 +0000 Subject: ASoC: Ensure the WM8962 oscillator and PLLs start up disabled Since there is no current software control for these they would otherwise be left enabled, consuming power. Signed-off-by: Mark Brown Cc: stable@kernel.org --- sound/soc/codecs/wm8962.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 32d931f1122c..a0c895b2d53b 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -4035,6 +4035,11 @@ static int wm8962_probe(struct snd_soc_codec *codec) snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); + /* Ensure that the oscillator and PLLs are disabled */ + snd_soc_update_bits(codec, WM8962_PLL2, + WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, + 0); + regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); if (pdata) { -- cgit v1.2.3 From 0b7dd6ad92b6cace35dc5d06d6e236c2751c85dc Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 1 Nov 2011 13:53:54 +0000 Subject: ASoC: Ensure we always delay for WM8962 FLL when starting from SYSCLK Signed-off-by: Mark Brown Cc: stable@kernel.org --- sound/soc/codecs/wm8962.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index a0c895b2d53b..91d3c6dbeba3 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -2366,15 +2366,14 @@ static int sysclk_event(struct snd_soc_dapm_widget *w, snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1, WM8962_FLL_ENA, WM8962_FLL_ENA); - if (wm8962->irq) { - timeout = msecs_to_jiffies(5); - timeout = wait_for_completion_timeout(&wm8962->fll_lock, - timeout); - - if (timeout == 0) - dev_err(codec->dev, - "Timed out starting FLL\n"); - } + + timeout = msecs_to_jiffies(5); + timeout = wait_for_completion_timeout(&wm8962->fll_lock, + timeout); + + if (wm8962->irq && timeout == 0) + dev_err(codec->dev, + "Timed out starting FLL\n"); } break; -- cgit v1.2.3