Age | Commit message (Collapse) | Author |
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While setup, there is a time the serial port is running on a
predefined speed (115200). When data arrived during this phase at
a lower baudrate (e.g. 9600), a lot of overrun and break error
messages were shown. Due to those messages, the terminal setup
never finished, and thus never reached the selected baudrate (e.g.
9600). By choosing a lower baudrate at the startup (9600), a lot
less (if any at all) messages are shown and those initialization
always succeeds.
Another solution would be to disable those messages completely.
However, while normal mode its good to have those UART error
messages.
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The irq request flag sometimes does not get reset or is asserted
immediately, but iir does not indicated this, if so ISR is entered with
iir set to 0xc1, i.e. no irq pending.
Try enabling the transmit register empty interrupt, iir becomes 0xc2,
irq gets de-asserted and ier is reverted by the regular code flow in
the ISR.
We try this every 4096 spurious irq.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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-add compilation flag to treat warning as error
bug 949219
Change-Id: I1b4eb4a38abbf6140ab5929bb51eec469b96b710
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/118024
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
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Adds the IrDA transceiver handling support to tegra_hsuart driver based on
the platform data.
Bug 999895
Change-Id: Ia475639d97c540d014c7128ef392fa394a5b26ad
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/114927
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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It is not necessary that all platform do register platform
data for tegra HS uart. platfrom_data pointer should
be checked before accessing it.
Added a check for same.
bug 995731
Change-Id: I2dbbaa4387157b92b29bc7b8eacefad23372427e
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/106451
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Disable the interrupts when the baudrate or any uart
configuration. This will avoid the interrupt to be call
when configuration is getting change.
bug 984164
bug 969087
Change-Id: Id008964773237726a0ec4a04c428d3975bf3ebd9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/104476
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: David Yu (Engrg-SW) <davyu@nvidia.com>
Tested-by: David Yu (Engrg-SW) <davyu@nvidia.com>
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Merges of dma changes from mainline reported conflict and
it was not got resolved properly.
Fix the resolution issue.
Change-Id: I7edc5effc0b9a61363e77e6cc39eb62e315396d0
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/102590
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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Fix section mismatch warnings derived from
tegra_uart_platform_driver.
Bug 984436
Change-Id: Iec737f28b0a7ce3ae521ad788e6ca5a101675c52
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/102237
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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BT Filetransfer have some issue.
This reverts commit e8c243d5d09d1a552b66df7a8a0a0313047ebbac.
Bug 982630
Change-Id: I6e76d44e076874569518fa881e427918d3e546f2
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/101914
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to hide new parameter from current users of affected interfaces.
Convert current users to use new wrappers instead of direct calls.
Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269].
Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
cherry-picked from mainline commit
16052827d98fbc13c31ebad560af4bd53e2b4dd5
Change-Id: I929a49556539621a0546829e88b3caa498c94be2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94463
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To terminate request from dma, use the tegra_dma_cancel() inplace of
tegra_dma_dequeue().
The api tegra_dma_dequeue() is getting to be obsolete.
Change-Id: I2e2c5d68dee64da02370beca6f61c650049402a2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91753
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
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WAR to enable console prints when console service is not started
for port type TEGRA.
Bug 958959
Change-Id: I51e582d16195171f1f8bae9324e2ddece4638281
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/92814
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Joshua Cha <joshuac@nvidia.com>
Tested-by: Joshua Cha <joshuac@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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When the driver is not built as a module, use postcore_initcall
instead of module_init. This allows us to get the console prints
very early during the kernel boot process.
Bug 928931
Change-Id: Icbf60476f76486511237b72f5c53656ff7931676
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76518
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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When doing the cat /proc/tty/driver/tegra_uart, the serial
core display the message as
0: uart:unknown port:00000000 irq:68 tx:0 rx:0 CTS|DSR|CD|RI
4: uart:unknown port:00000000 irq:123 tx:0 rx:0 CTS|DSR|CD|RI
This is because the correct port type and iotype are not getting
set in tegra serial driver.
Setting these parameter to proper to display the information as
1: uart:TEGRA_UART mmio:0x70006040 irq:69 tx:0 rx:0 CTS|DSR|CD|RI
2: uart:TEGRA_UART mmio:0x70006200 irq:78 tx:477 rx:1603 RTS|CTS|DTR|DSR|CD|RI
3: uart:TEGRA_UART mmio:0x70006300 irq:122 tx:0 rx:0 CTS|DSR|CD|RI
4: uart:TEGRA_UART mmio:0x70006400 irq:123 tx:0 rx:0 CTS|DSR|CD|RI
bug 889724
Change-Id: Ia095623c53d1a3840c4d3759141cdf23cc2d4547
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89122
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Call dma sync single api's to maintain coherency between
CPU, dma and device in data transfers.
Bug 935876
Bug 918880
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Change-Id: I45d7d998b1d091e726c1bfb512c8b0b087d7452e
Reviewed-on: http://git-master/r/86054
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Fixing build warning.
Cleaning up check patch error and warning.
Re-arranging function to avoid prototype definition of static
functions.
Change-Id: I034f0ca5a1cc2d4c05a79df9df553b87b47d64e2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/85092
Reviewed-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
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This reverts commit 944a82b32d44bae0acb56abf5fec33a1c696c362.
Bug 934678
Change-Id: Icf6cbc2cd8dc22dcd3126f2da19923e7076c0071
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/79710
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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commit 26aa38cafae0dbef3b2fe75ea487c83313c36d45 upstream.
There was an error on the jsm driver that would cause it to be unable to
recover after a second error is detected.
At the first error, the device recovers properly:
[72521.485691] EEH: Detected PCI bus error on device 0003:02:00.0
[72521.485695] EEH: This PCI device has failed 1 times in the last hour:
...
[72532.035693] ttyn3 at MMIO 0x0 (irq = 49) is a jsm
[72532.105689] jsm: Port 3 added
However, at the second error, it cascades until EEH disables the device:
[72631.229549] Call Trace:
...
[72641.725687] jsm: Port 3 added
[72641.725695] EEH: Detected PCI bus error on device 0003:02:00.0
[72641.725698] EEH: This PCI device has failed 3 times in the last hour:
It was caused because the PCI state was not being saved after the first
restore. Therefore, at the second recovery the PCI state would not be
restored.
Signed-off-by: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com>
Signed-off-by: Breno Leitao <brenohl@br.ibm.com>
Acked-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I17d5be5ce4b8acc1c881290d19933405b3e476b9
Reviewed-on: http://git-master/r/79677
Reviewed-by: Automatic_Commit_Validation_User
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commit ef605fdb33883d687cff5ba75095a91b313b4966 upstream.
Protect against pl011_console_write() and the interrupt for
the console UART running concurrently on different CPUs.
Otherwise the console_write could spin for a long time
waiting for the UART to become not busy, while the other
CPU continuously services UART interrupts and keeps the
UART busy.
The checks for sysrq and oops_in_progress are taken
from 8250.c.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Reviewed-by: Bibek Basu <bibek.basu@stericsson.com>
Reviewed-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I0874bd94d979a5f3a61922ec5fb4c092d7e40874
Reviewed-on: http://git-master/r/79676
Reviewed-by: Automatic_Commit_Validation_User
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Add runtime PM support for tegra uart high speed driver.
Bug 887359
Reviewed-on: http://git-master/r/76805
Change-Id: I3439435eb40d36d66182a19011791399b6e65655
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78713
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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The dma client should use the tegra_dma_dequeue_req() for
dequeue the dma request.
Change-Id: I1bfdca4810a61cb9f9699dabafb2ba045d2c6bd5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77803
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
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Linux 3.1.9
Conflicts:
Makefile
Change-Id: I22227ab33ba7ddaba8e6fe049393c58a83d73648
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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commit dbf1115d3f8c7052788aa4e6e46abd27f3b3eeba upstream.
Patch to fix a spinlock lockup in the driver that sometimes happens when the
tasklet starts.
Signed-off-by: Claudio Scordino <claudio@evidence.eu.com>
Signed-off-by: Dave Bender <codehero@gmail.com>
Tested-by: Dave Bender <codehero@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Add HW loopback support for testing purpose.
Bug 845036
Bug 921090
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Change-Id: I202781ed0b42c1bed2b9aad9576cf74cb938f9e6
Reviewed-on: http://git-master/r/73149
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Wait tx fifo to be empty on close for the time it is require
to make fifo empty.
bug 921225
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: I0ea2ec488e975833103218d86e8dc37aec79ef88
Reviewed-on: http://git-master/r/72858
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
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Move allocation of RX dma buffer to startup to avoid data corruption.
Bug 902813
Change-Id: I3bf751c01543c9d6eca08b2942b4f62bc9115775
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/71937
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Bug 913493
Change-Id: I05eaa030a0d959eb0bac1344f754ce73a479be9a
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/69710
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Timeout increased as boards were failing with default timeout
Bug 908560
Reviewed-on: http://git-master/r/67575
(cherry picked from commit 05732fb6906147708b0c04bfa853b138199151ac)
Change-Id: Ic2419717a81b521213f0135ddf8e78f23792b107
Signed-off-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-on: http://git-master/r/68424
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Recently wake_peer op was added to uart_ops. Add this op for
tegra_hsuart allowing a platform to implement peer specific wakeup.
BUG 781303
Original-Change-Id: Icfbac324815d7737c0e0820e57a2e8d844855ba0
Reviewed-on: http://git-master/r/17993
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Rd83c46d3b1d061308a67e3d7af2db38b632c3df6
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Conflicts:
arch/arm/mach-tegra/Kconfig
arch/arm/mach-tegra/board-ventana.c
drivers/misc/Kconfig
drivers/video/tegra/dc/hdmi.c
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
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If tx empty is not available because there is no peer device or
no response due to HW malfunction, we have infinite loop in
checking tx empty condition.
To enter suspend mode, retry timeout count is added.
Bug 901950
Change-Id: Ic3827faccba3509456e5e695e74d7394b12029a5
Reviewed-on: http://git-master/r/64426
Tested-by: Joshua Cha <joshuac@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R3e2d6323b031559c74621595447cc0d02187d1da
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These changes have no effect if CONFIG_GCOV_KERNEL is not set in
defconfig. It is easier to trigger GCOV for kernel if this patch
is in by only setting the before mentioned flag.
Change-Id: I8aade309da2da62c4b3889bd84e4123ba8f182da
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/62999
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Rebase-Id: R4c238f707f1db600f188ae83426336753992b7be
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Allowing 2% error in calculated baudrate when finding the best clock
source uart controller.
bug 896117
Change-Id: I08260a4d9c24d8303a1e176e8a871c90dfbe0825
Reviewed-on: http://git-master/r/62980
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rfc09a6aa7b2abf126ded97c87e8b46138cf30d18
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Increasing RX DMA buffer size to 16K.
Bug 819411
Reviewed-on: http://git-master/r/49810
(cherry picked from commit 642eac7b9c8994b42d32a0c3794d0bb2194e62c0)
Change-Id: I529c1216597227fe1c10ffb34b95fc66de1c5340
Reviewed-on: http://git-master/r/62414
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R9f774269c0b45dda4fc12aadd7b85eeeea7a7626
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Avoid mutex_lock to be called in spin_lock conetxt.
Bug 890147
Reviewed-on: http://git-master/r/59545
(cherry picked from commit 7ebaaea25400d3708b6f3ac3585b61b65ab99a17)
Change-Id: I189dbf1ff3da5e7580b3688680565762fa457f6e
Reviewed-on: http://git-master/r/61871
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R167aaab6105b997d4a019c064ee5297e1982c5bb
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This was a bad merge - this code goes in tegra_uart_set_mctrl, not
tegra_set_mctrl
Bug 870346
Change-Id: Icd7d723b55113b61968b9a5729283b20c81797f2
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/50542
Reviewed-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Rebase-Id: Rc2b15fa4d970dbb7e7e8d9fc078f70587455c5d1
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If tx dma is aborted due to some reason like flush buffer, avoiding
lock in tx dma complete callback to avoid the recursive locking.
The caller have already hold the lock in this case.
bug 860574
Original-Change-Id: Iac63fb89ba03a3a89f55b43e823526ecf09d8a1f
Reviewed-on: http://git-master/r/48420
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: Rd6c0d476be4cef51b948e24ae02db80756e876bb
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Add proper check for uart state in public api to make sure client
driver would not access UART registers when it is in invalid state.
Bug 827693
Original-Change-Id: Icfaed824d98023206dacd0346a90e34f2fc6935e
Reviewed-on: http://git-master/r/46923
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R9fc0c9d47aae00785b92617ac6b03ab743fcb07d
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This reverts commit 62bdeb8d6d8f307ddfe81a42ce92c58f3fe51dff.
Reverting this change according to the ASIC recommendations.
Bug 847599
Original-Change-Id: I81156a57092b0e3043abc15310ce1d544c64b6f1
Reviewed-on: http://git-master/r/46592
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R075014a99e05988ed41ea4b7b8d3ad901e4ac5b4
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TX fifo should be checked before writing into it, if it is full then stop
writing.
Bug 847599
Original-Change-Id: I12c654e3709fe42ec3494d90ac4fa256a790e9b5
Reviewed-on: http://git-master/r/46351
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R6e82e11cfa4924b4ceb06fb753905e328f6a4dcd
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Add 30 micro seconds delay after TX DMA burst complete, to make
sure DMA burst completed before writing to tx fifo.
Bug 847599
Original-Change-Id: Ifcc1f3f208f8c2396ef410bedfa1158643b94015
Reviewed-on: http://git-master/r/44933
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Tested-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R16d2c723f934b72ee770795d988c8ef9659c55e2
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-Disabling modem status interrupts for tegra based UART.
-Removed duplicate declaration of PORT_TEGRA.
Bug 840111
Original-Change-Id: I926c200ce66e926186e5295bc1ead8c6ecf70891
Reviewed-on: http://git-master/r/39788
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Jack Zhou <jazhou@nvidia.com>
Tested-by: Jack Zhou <jazhou@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Krishna Monian <kmonian@nvidia.com>
Rebase-Id: Ra34db21ae6dfbffea27b466cb90cfa4eb4717ac2
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Added support for auto control of RTS.
Bug 825938
Original-Change-Id: Ic5ffde2252ab0f0ffb9001994863f3d4ed5d1173
Reviewed-on: http://git-master/r/39356
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: Rb21ef7c26a2f8644ab81171b41ba4275e38023b0
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Finding the best clock source for uart controller which can
generate the clock rate having minimum error between requested
baudrate and configured baudrate.
bug 837140
bug 836059
Original-Change-Id: I4e751b238612a21d894ee8e6611886ab6e832a36
Reviewed-on: http://git-master/r/37635
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: Rbcfe08c513308bf003ad20c06085499da5d71b66
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Change SOC conditionals to make them more forward-looking.
Original-Change-Id: Ib60db4e690c2f396afdec962616d735548b5a8a9
Reviewed-on: http://git-master/r/32706
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: R76b6fcc3d93e57451c6d93b62c6d6ec57a919fa5
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By changing the dma allocation API to take the client name, it is easy
to track who is allocated the DMA channels when we run out of the
DMA channels.
Original-Change-Id: I016011cfd74089fed0da1bc0f121800017ce124a
Reviewed-on: http://git-master/r/28031
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Original-Change-Id: I048bcb87f95ee6d8ad2fdce993a1758dc5071666
Rebase-Id: Rf9f122630cf489a1c02e6c70d5c19fd518e329b1
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The clk_get() api returns valid pointer in case of scucess otherwise
returns error pointer.
Hence checking the retrun pointer using macro IS_ERR_OR_NULL() to
detect any error.
Original-Change-Id: I92a62dc2c22c243e2aa35d7a10f88b6170b02f34
Reviewed-on: http://git-master/r/27876
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I402141a3230b35292bdd31f9c0a7fb3bf261cbee
Rebase-Id: R9d5306d715004a6963a85059f13f97c34a5cc06e
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Original-Change-Id: I2ffeaf6f8dfeb279b40ca6f69f6c9157401a746a
Rebase-Id: R465d62b7bd05f9838ec842968be4f2f402e920c2
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Adding support to hs_uart driver to set clock rate according to given
baudrate.
Original-Change-Id: Ia15421bf1db7f46f77b5d63c863703e441f1d3ff
Reviewed-on: http://git-master/r/19233
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Original-Change-Id: I6d1beeb962f446eb0e169d8e316a39b9d7fe78e4
Rebase-Id: R28a0fa4eb5fd34ed555cb2ec02d5aa5132da93c8
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Changed transmit fcr trigger level and load size of serial8250 driver
to 8 bytes.
Bug : 785316
Original-Change-Id: I3aac46b05431d17a76c78fe062363af925b2835c
Reviewed-on: http://git-master/r/17885
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Original-Change-Id: If858d4aa86cc613dc0bbe7cb02c2d7d7778a941f
Rebase-Id: Rf352c971f4a17581be03dab9f2b78686f503d95e
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