summaryrefslogtreecommitdiff
path: root/drivers/net/wireless/ath/ath9k/ar9003_hw.c
AgeCommit message (Collapse)Author
2014-01-03ath9k: Initialize QCA953x INI arraysSujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-01-03ath9k: Fix MAC HW hang check for AR9003Sujith Manoharan
The current method of identifying MAC hangs is convoluted and also, the signatures are wrong and don't apply to all the chips in the AR9003 family. Fix this by cleaning up the code and checking for the correct hang signatures. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-01-03ath9k: Add HW callbacks for MAC/BB hang checksSujith Manoharan
This is required for adding separate hang check routines for AR9002 and AR9003. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-01-03ath9k: Register supported HW hang checksSujith Manoharan
HW hang checks have to be done on a per-chip basis. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-09ath9k: Use a separate TX gain table for WZR-HP-G450HSujith Manoharan
The Buffalo device WZR-HP-G450H uses the index 3 for TX gain, which is set to the high_power table currently. Later variants of the router use the same index, but instead refer to the low_ob_db gain table. This is not handled in the driver since there is no way to distinguish board revisions and the high_power table is used (incorrectly) for the newer variants. By default, devices based on AR9300 using the TX gain index 3 have to use the high_power table. To make sure that WZR-HP-G450H is not broken when the high_power table is updated, use a separate array based on information obtained from the platform data. The current situation where only the original variant of WZR-HP-G450H works properly stays unchanged. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-09ath9k: Initialize baseband for DFS channelsSujith Manoharan
Certain baseband registers require different values to be programmed when operating in a DFS channel to ensure that radar detection works correctly. This is required for AR9300, AR9340 and AR9580. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Fix initvals for freq 2484Sujith Manoharan
This is missing for AR9300, AR9580 and AR9340. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Remove duplicate initvals for AR9462 v2.1Sujith Manoharan
The initvals for AR9462 v2.1 are very similar to v2.0. Identify duplicate arrays and reuse the values from v2.0 to reduce module size. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Attach INI arrays for AR9565 v1.1Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Apply CUS227 specific TX gain valuesSujith Manoharan
CUS227, which is an AR9340 based card used in Qualcomm's Allplay platforms requires a custom TX gain array, based on the index 7. Add suport for this. Cc: Michael Larson <mlarson@qce.qualcomm.com> Cc: Stephen Collmeyer <scollmey@qce.qualcomm.com> Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Remove pcieSerDesWriteSujith Manoharan
This HW config option is always set to true and is not needed. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Add SERDES initvals for AR9462 2.1Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-11-11ath9k: Use correct PCIE initvals for AR9485Sujith Manoharan
Currently, the PLL is turned off for AR9485 when switching to a low power state, but AR9485 has an issue where the card will become unresponsive if left idle for a long time without any traffic. To fix this, force the PLL to always be on using a different initval array, ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1. This is done for most of the AR9485 based cards like HB125, WB225 etc. but certain models require the feature to be turned off. Identify such cards and use default values for them. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-09-26ath9k: Add and use initvals for channel 14Sujith Manoharan
This is missing for AR9565. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-09-26ath9k: Use correct RX gain table for AR9565Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-26ath9k: Fix ASPM workaround usageSujith Manoharan
The PCIE Workaround register (AR_WA/0x4004) is used to handle various hardware quirks. For AR9002 chips, AR_WA_D3_L1_DISABLE is used to prevent the HW from automatically entering L1 state when D3 is enforced. AR_WA_D3_L1_DISABLE has to be enabled for a few AR9280 based cards, mark them based on their PCI subdevice/subvendor IDs and enforce it in ar9002_hw_configpcipowersave(). Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-26ath9k: Fix ASPM for AR9462Sujith Manoharan
If the L1 entrance latency is not calibrated properly in the EEPROM in WB222 boards, there could be problems in connectivity. Check and correct the calibrated value if it doesn't match the optimal value for WB222, 4us. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-22ath9k: Add support for AR9485 1.2Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-27ath9k: Add mix tx gain table for AR9462 2.0Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-24ath9k: Program initvals for AR9462 2.1Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-18ath9k: Program initvals for CUS217Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-18ath9k: Add support for 5G-XLNA/AR9462Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-01-28Merge branch 'master' of ↵John W. Linville
git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless Conflicts: drivers/net/wireless/ath/ath9k/main.c drivers/net/wireless/iwlwifi/dvm/tx.c
2013-01-22ath9k_hw: fix RF bank initializationFelix Fietkau
ar900*_init_mode_regs needs to be called before RF banks are allocated, otherwise the storage size of RF banks isn't known. This patch fixes a memory overrun that can show up as a crash on unloading the module. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-01-11ath9k_hw: add tx gain tables for newer devicesFelix Fietkau
Improves stability on affected devices and also fixes the Tx IQ calibration related regression on some AR9340 devices such as the TP-Link TL-WDR4300. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-01-02ath9k_hw: Fix RX gain initvals for AR9485Sujith Manoharan
Populate iniModesRxGain with the correct initvals array for AR9485 v1.1 Cc: stable@vger.kernel.org Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-11-16ath9k_hw: Program filter coefficients correctlySujith Manoharan
2484 Mhz (Japan) usage requires filter coefficients to be programmed in the CCK TX FIR registers. This is required for AR9331, AR9485 and AR9462. Fix this and also remove a few useless macros and a duplicate variable. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-10-29ath9k_hw: Enable hw PLL power save for AR9565Rajkumar Manoharan
This reduced the power consumption to half in full and network sleep. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-10-29ath9k_hw: Enable hw PLL power save for AR9462Rajkumar Manoharan
This reduced the power consumption to half in full and network sleep. Cc: stable@vger.kernel.org Cc: Paul Stewart <pstew@chromium.org> Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-09-11ath9k_hw: Add AR9565 initvalsSujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-17ath9k_hw: remove redundant arguments to INIT_INI_ARRAYFelix Fietkau
The row/column sizes can be derived from the array argument within the macro itself, which is less error prone. In a few cases the supplied column size was actually wrong. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-17ath9k_hw: fix tx gain tables for AR934xFelix Fietkau
Use the EEPROM information to choose the right tx gain table Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-09ath9k: add mode register initialization code for AR9550Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-09ath9k: add initvals for AR9550Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-13ath9k_hw: Remove BTCOEX initvalsSujith Manoharan
The MAX_TXPWR table for BTCOEX is not needed for AR9462. Programming these values to the HW results in undesirable behavior - for example, large number of delimiter/data underruns are seen in AES-CCMP mode. Also, registers like AR_PCU_MISC_MODE2 return 0xdeadbeef after the BTCOEX_MAX power table is programmed to the HW, and frames being transmitted end up being looped back to the RX engine, an example being beacon frames in IBSS mode. Remove this table for now - this fixes CCMP performance and general IBSS usage. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-03-15ath9k_hw: clean up iniModesAdditionalFelix Fietkau
use iniModesFastClock for 5 ghz fast clock specific settings, and iniAdditional for clock/chip specific initval overrides Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-02-27ath9k: Remove AR9462 v1.0 supportSujith Manoharan
v1.0 chips are not available in the market. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-10-14ath9k: Rename AR9480 into AR9462Rajkumar Manoharan
Renamed to be in sync with Marketing term and to avoid confusion with other chip names. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-10-14ath9k_hw: Rename AR9480 -> AR9462 initvalsRajkumar Manoharan
The AR946/8x chips are 2x2 Dual band with BT support. In order to avoid misleading with other chips and to be in sync with marketing team's term, AR9480 is renamed as AR9462. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-09-16ath9k_hw: Add support for AR946/8x chipsets.Senthil Balasubramanian
This patch adds support for AR946/8x chipets. Signed-off-by: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-09-16ath9k_hw: Split tx/rx gain table initval handlingSenthil Balasubramanian
Split tx/rx gain table initval hanlding part so readability is better and easy to manage the code. Signed-off-by: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-08-26ath9k_hw: add AR9580 supportLuis R. Rodriguez
Here are the AR9580 1.0 initvals checksums using the Atheros initvals-tools [1]. This is useful for when we udate the initvals again with other values. It ensures that we match the same initvals used internally. The tool is documented on the wiki [2]. $ ./initvals -f ar9580-1p0 0x00000000e912711f ar9580_1p0_modes_fast_clock 0x000000004a488fc7 ar9580_1p0_radio_postamble 0x00000000f3888b02 ar9580_1p0_baseband_core 0x0000000003f783bb ar9580_1p0_mac_postamble 0x0000000094be244a ar9580_1p0_low_ob_db_tx_gain_table 0x0000000094be244a ar9580_1p0_high_power_tx_gain_table 0x0000000090be244a ar9580_1p0_lowest_ob_db_tx_gain_table 0x00000000ed9eaac6 ar9580_1p0_baseband_core_txfir_coeff_japan_2484 0x00000000c4d66d1b ar9580_1p0_mac_core 0x00000000e8e9043a ar9580_1p0_mixed_ob_db_tx_gain_table 0x000000003521a300 ar9580_1p0_wo_xlna_rx_gain_table 0x00000000301fc841 ar9580_1p0_soc_postamble 0x00000000a9a06b3a ar9580_1p0_high_ob_db_tx_gain_table 0x00000000a15ccf1b ar9580_1p0_soc_preamble 0x0000000029495000 ar9580_1p0_rx_gain_table 0x0000000037ac0ee8 ar9580_1p0_radio_core 0x00000000603a1b80 ar9580_1p0_baseband_postamble 0x000000003d8b4396 ar9580_1p0_pcie_phy_clkreq_enable_L1 0x00000000398b4396 ar9580_1p0_pcie_phy_clkreq_disable_L1 0x00000000397b4396 ar9580_1p0_pcie_phy_pll_on_clkreq [1] git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/initvals-tool.git [2] http://wireless.kernel.org/en/users/Drivers/ath9k_hw/initvals-tool Cc: David Quan <dquan@qca.qualcomm.com> Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-08-22ath9k: merge common ->config_pci_powersave() checksStanislaw Gruszka
Move common checks into wrapper function. Since ASPM can be only enabled on PCIe devices ->is_pciexpress check is unneeded. Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-08-22ath9k: remove ->config_pci_powersave() redundant argumentStanislaw Gruszka
We always call ->config_pci_powersave() with both restore and power_off arguments equal to 0 or both equal to 1, so merge them into one argument. Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-08-01ath9k: skip ->config_pci_powersave() if PCIe port has ASPM disabledStanislaw Gruszka
We receive many bug reports about system hang during suspend/resume when ath9k driver is in use. Adrian Chadd remarked that this problem happens on systems that have ASPM disabled. To do not hit the bug, skip doing ->config_pci_powersave magic if PCIe downstream port device, which ath9k device is connected to, has ASPM disabled. Bug was introduced by: commit 53bc7aa08b48e5cd745f986731cc7dc24eef2a9f Author: Vivek Natarajan <vnatarajan@atheros.com> Date: Mon Apr 5 14:48:04 2010 +0530 ath9k: Add support for newer AR9285 chipsets. Patch should address: https://bugzilla.kernel.org/show_bug.cgi?id=37462 https://bugzilla.kernel.org/show_bug.cgi?id=37082 https://bugzilla.redhat.com/show_bug.cgi?id=697157 however I did not receive confirmation about that, except from Camilo Mesias, whose system stops hang regularly with this patch (but still hangs from time to time, but this is probably some other bug). Tested-by: Camilo Mesias <camilo@mesias.co.uk> Cc: stable@kernel.org # 2.6.35+ Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-06-22ath9k: initialize rx gain table for AR9330Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-06-22ath9k: initialize tx gain table for AR9330Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-06-22ath9k: initialize mode registers for AR9330Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-05-19ath9k: Drag the driver to the year 2011Sujith Manoharan
The Times They Are a-Changin'. Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-04-25ath9k_hw: Initialize tx and rx gain table from initvals.h for ar9340Vasanthakumar Thiagarajan
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>