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path: root/drivers/net/ethernet/freescale/fec.h
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2018-08-24MLK-18483-02 net: fec: add sleep mode support for i.MX8QM/QXPAndy Duan
Add sleep mode support for i.MX8QM/QXP platforms. Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-17737 net: fec: fix the struct define issueFugang Duan
Fix the cherry pick and merge issue by below commit on kernel 4.9: Fixes: 19b76fd012ce ("net: fec: add stop mode support for dts register set") Reviewed-by: Gao Pan <pandy.gao@nxp.com> Signed-off-by: Fugang Duan <B38611@freescale.com>
2018-08-24MLK-16781 net: fec: add eee mode tx lpi supportFugang Duan
The i.MX8MQ ENET version support IEEE802.3az eee mode, add eee mode tx lpi enable to support ethtool interface. usage: 1. set sleep and wake timer to 5ms: ethtool --set-eee eth0 eee on tx-lpi on tx-timer 5000 2. check the eee mode: ~# ethtool --show-eee eth0 EEE Settings for eth0: EEE status: enabled - active Tx LPI: 5000 (us) Supported EEE link modes: 100baseT/Full 1000baseT/Full Advertised EEE link modes: 100baseT/Full 1000baseT/Full Link partner advertised EEE link modes: 100baseT/Full Note: For realtime case and IEEE1588 ptp case, it should disable EEE mode. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-16023-03: net: fec: add MAC delayed clock feature supportFugang Duan
i.MX8QM/QXP ENET IP version add new feture to generate delayed TXC/RXC as an alternative option to make sure it can work well with various PHYs, which also is useful for MAC-to-MAC case. Add the new feature support. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-16022 net: fec: get mac address from fuseFugang Duan
i.MX8QM/QXP MAC address only can be program by SCU, and A core read fuse enet MAC address by sc APIs interface. i.MX8mScale is inherited from i.MX7D, can directly read fuse in A-core. Add i.MX8QM/QXP/MQ ENET MAC address check from fuse. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-14736 net: fec: move the ahb clock to runtime pmFugang Duan
Some SOC clock have some limits: - ahb clock should be disabled before ipg. - ahb and ipg clocks are required for MAC mii to work. So, move the ahb clock to runtime pm together with ipg clock. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-14805 Revert "MLK-14470 net: fec: let shared mii bus always be active"Fugang Duan
This reverts commit a87bb06a0bc7 that breaks busfreq test case. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-14470 net: fec: let shared mii bus always be activeFugang Duan
Many boards installed with i.MX chip only use two pins for mii bus in two NET MAC system to save two pins. Then one MAC need to share the mii bus with the other one. Since two net interface operation are parallel and separate, we should keep the shared mii bus always be active. So it should keep MAC clocks on. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> (cherry picked from commit: d0f18f7633ed)
2018-08-24MLK-14770 net: fec: revert the patch "net: fec: avoid mac re-inited after ↵Fugang Duan
system resume back" The patch commit:586fbe526860 introduce the issue that suspend/resume is failed on i.MX6SX sabreauto/sdb board. Now revert it. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-14682 net: fec: avoid mac re-inited after system resume backAndy Duan
Function .fec_resume() had called .fec_restart() before phy resume to ensure MAC mii bus can work, but the firth .adjust_link() call .fec_restart() to re-init the MAC again that is not necessary since PHY duplex and speed have no change during suspend status, so remove the unnecessary mac re-inited after resume back. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-14618 net: fec: fixed-link don't need phy fixup settingAndy Duan
In MAC-MAC fixed link case, it don't need phy fixup setting. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-14438-05 net: fec: register Athreos phy AR8031 fixupAndy Duan
Register Athreos PHY AR8031 fixup. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> (cherry picked and merged from commit:676bf1d92b3e6babdab623694fd83d54f881fc2f)
2018-08-24MLK-14438-01 net: fec: add FEC support for NXP i.MX8x chipsAndy Duan
Add FEC support for NXP i.MX8x chips. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-12160 net: fec: disable all irqs during normal suspendFugang Duan
During normal suspend process, disable all irqs to avoid the late TXF interrupt comming after clocks disabled that accessing registers cause system hang. Signed-off-by: Fugang Duan <B38611@freescale.com>
2018-08-23MLK-11307 net: fec: disable timer interrupt when link down and suspendFugang Duan
There exists one issue in Android environment when do power key on/off test that cause system hang. Because suspend function disable enet all clocks while timer interrupt comming that introduces registers access. When link down and suspend, the timer interrupt is not necessary to enable, so disable it. Signed-off-by: Fugang Duan <B38611@freescale.com> Tested-by: Fugang Duan <B38611@freescale.com> Tested-by: Chen Guoyin <B07211@freescale.com> Tested-by: Zhu Wenbo <B52619@freescale.com> (cherry picked from commit: 048f62891bc4936991fd58dbaf4a606a30282404)
2018-08-23MLK-11274 net: fec: add mii bus up_failed flag to reflect the real statusFugang Duan
Add mii bus up_failed flag to reflect the real mii bus status. Signed-off-by: Fugang Duan <B38611@freescale.com> Reported-and-tested-by: Zhang Sanshan <B51434@freescale.com> (cherry picked from commit: ea348e597501d44841a28d8ee099361e89d63520)
2018-08-23MLK-10939-01 net: fec: add stop mode support for dts register setFugang Duan
The current driver support stop mode by calling machine api. The patch add dts support to set gpr register for stop request. After magic pattern comming during system suspend status, system will be waked up, and irq handler will be running, there have enet register access. Since all clocks are disabled in suspend, and clocks are enabled after resume function. But irq handler run before resume function. For imx7d chip, access register need some clocks enabled, otherwise system hang. So the patch also disable wake up irq in the suspend, after resume back enable the irq, which can avoid system hang issue. Signed-off-by: Fugang Duan <B38611@freescale.com> (cherry pick and merge from commit: 8da4f80af0913781a4f9d50917c1dd66180e519d)
2018-08-23MLK-9919 net: fec: reinit MAC0 MII bus for MAC1 use after resume backFugang Duan
i.MX6SX-AI board has two enet MACs (MAC0 and MAC1), they share MAC0 MII bus. When PHY0 don't connect to enet MAC0, MAC0 mii bus probe phy0 failed, and the net interface is set to unattach mode. During suspend resume test, driver don't reinit MAC0 after resume back, so MII bus don't work that causes MAC1 also cannot access PHY1. The patch just is workaround that reinit MAC0 MII bus for MAC1 using. Signed-off-by: Fugang Duan <B38611@freescale.com> (cherry picked from commit: b730adeef4f9b44e302c793cbef35ea74f24fbef)
2018-08-23MLK-11285-01 net: fec: handle WAIT mode issue for imx6qdlShawn Guo
This is a combination of commits 919d46e37e04 (ENGR00265935 net: fec: add pm_qos to avoid cpu enter to wait mode) and 8a12c90c9974 (ENGR00313685-14 net: fec: check workaround for FEC_QUIRK_BUG_WAITMODE) from imx_3.10.y branch. It's added for imx_3.14.y branch to work around imx6qdl issue ERR006687 (ENET: Only the ENET wake-up interrupt request can wake the system from Wait mode). Signed-off-by: Shawn Guo <shawn.guo@freescale.com> (cherry-pick and merge from commit: 4f406fae257cc7945a0e3a425213440bb12ba345)
2016-11-30net: fec: cache statistics while device is downNikita Yushchenko
Execution 'ethtool -S' on fec device that is down causes OOPS on Vybrid board: Unhandled fault: external abort on non-linefetch (0x1008) at 0xe0898200 pgd = ddecc000 [e0898200] *pgd=9e406811, *pte=400d1653, *ppte=400d1453 Internal error: : 1008 [#1] SMP ARM ... Reason of OOPS is that fec_enet_get_ethtool_stats() accesses fec registers while IPG clock is stopped by PM. Fix that by caching statistics in fec_enet_private. Cache is initialized at device probe time, and updated at statistics request time if device is up, and also just before turning device off on down path. Additional locking is not needed, since cached statistics is accessed either before device is registered, or under rtnl_lock(). Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-08-01Merge tag 'armsoc-soc' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Olof Johansson: "Improved and new platform support for various SoCs: New SoC support: - Broadcom BCM23550 - Freescale i.MX7Solo - Qualcomm MDM9615 - Renesas r8a7792 Improvements: - convert clps711x to multiplatform - debug uart improvements for Atmel platforms - Tango platform improvements: HOTPLUG_CPU, Suspend-to-ram - OMAP tweaks and improvements to hwmod - OMAP support for kexec on SMP" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (109 commits) ARM: davinci: fix build break because of undeclared dm365_evm_snd_data ARM: s3c64xx: smartq: Avoid sparse warnings ARM: sti: Implement dummy L2 cache's write_sec ARM: STi: Update machine _namestr to be more generic. arm: meson: explicitly select clk drivers ARM: tango: add Suspend-to-RAM support ARM: hisi: consolidate the hisilicon machine entries ARM: tango: fix CONFIG_HOTPLUG_CPU=n build MAINTAINERS: Update BCM281XX/BCM11XXX/BCM216XX entry MAINTAINERS: Update BCM63XX entry MAINTAINERS: Add NS2 entry MAINTAINERS: Fix nsp false-positives MAINTAINERS: Change L to M for Broadcom ARM/ARM64 SoC entries ARM: debug: Enable DEBUG_BCM_5301X for Northstar Plus SoCs ARM: clps711x: Switch to MULTIPLATFORM ARM: clps711x: Remove boards support ARM: clps711x: Add basic DT support ARM: clps711x: Reduce static map size ARM: SAMSUNG: Constify iomem address passed to s5p_init_cpu ARM: oxnas: Change OX810SE default driver config ...
2016-06-27net: fec: add interrupt coalesc quirk flagFugang Duan
Different i.MX SOC FEC support different features like : - i.MX6Q/DL FEC does not support AVB and interrupt coalesc - i.MX6SX/i.MX7D supports AVB and interrupt coalesc - i.MX6UL/ULL does not support AVB, but support interrupt coalesc So, add new quirk flag to judge the supported features. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-06-12ARM: imx6: disable deeper idle states when FEC is active w/o HW workaroundLucas Stach
The i.MX6 Q/DL has an erratum (ERR006687) that prevents the FEC from waking the CPUs when they are in wait(unclocked) state. As the hardware workaround isn't applicable to all boards, disable the deeper idle state when the workaround isn't present and the FEC is in use. This allows to safely run a kernel with CPUidle enabled on all i.MX6 boards. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: David S. Miller <davem@davemloft.net> (for network changes) Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-05-10net: ethernet: fec: use phydev from struct net_devicePhilippe Reynes
The private structure contain a pointer to phydev, but the structure net_device already contain such pointer. So we can remove the pointer phydev in the private structure, and update the driver to use the one contained in struct net_device. Signed-off-by: Philippe Reynes <tremyfr@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-11net: fec: don't disable FEC_ENET_TS_TIMER interruptTroy Kisky
Only the interrupt routine processes this condition. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-11net: fec: add variable reg_desc_active to speed things upTroy Kisky
There is no need for complex macros every time we need to activate a queue. Also, no need to call skb_get_queue_mapping when we already know which queue it is using. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-11net: fec: add struct bufdesc_propTroy Kisky
This reduces code and gains speed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-11net: fec: stop the "rcv is not +last, " error messagesTroy Kisky
Setting the FTRL register will stop the fec from trying to use multiple receive buffers. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-01-25net: fec: use CONFIG_ARM instead of CONFIG_ARCH_MXC/SOC_IMX28Johannes Berg
As Arnd Bergmann points out, using CONFIG_ARCH_MXC and/or SOC_IMX28 is wrong if some other ARM platform uses this device - the operation of the driver would depend on an unrelated ARM platform that might or might not be set for multi-platform kernels. Prior to my previous patch, any other platforms using it would have been broken already due to having the cbd_datlen/cbd_sc fields in the wrong order, but byte ordering correctly, so no such platforms can exist and work today. In any case, it seems likely that only Freescale SoCs use this part, and those are little-endian on ARM, so CONFIG_ARM is safe for them. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-01-25net: fec: make driver endian-safeJohannes Berg
The driver treats the device descriptors as CPU-endian, which appears to be correct with the default endianness on both ARM (typically LE) and PowerPC (typically BE) SoCs, indicating that the hardware block is generated differently. Add endianness annotations and byteswaps as necessary. It's not clear that the ifdef there really is correct and shouldn't just be #ifdef CONFIG_ARM, but I also can't test on anything but the i.MX6 HummingBoard where this gets it working with a BE kernel. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-07-26net: fec: introduce fec_ptp_stop and use in probe fail pathLucas Stach
This function frees resources and cancels delayed work item that have been initialized in fec_ptp_init(). Use this to do proper error handling if something goes wrong in probe function after fec_ptp_init has been called. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-06-28net: fec: don't access RACC register when not availableGreg Ungerer
Not all silicon implementations of the Freescale FEC hardware module have the RACC (Receive Accelerator Function) register, so we should not be trying to access it on those that don't. Currently none of the ColdFire based parts with a FEC have it. Support for RACC was introduced by commit 4c09eed9 ("net: fec: Enable imx6 enet checksum acceleration"). A fix was introduced in commit d1391930 ("net: fec: Fix build for MCF5272") that disables its use on the ColdFire M5272 part, but it doesn't fix the general case of other ColdFire parts. To fix we create a quirk flag, FEC_QUIRK_HAS_RACC, and check it before working with the RACC register. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-15Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
Conflicts: drivers/net/xen-netfront.c Minor overlapping changes in xen-netfront.c, mostly to do with some buffer management changes alongside the split of stats into TX and RX. Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-14net: fec: fix MDIO bus assignement for dual fec SoC'sStefan Agner
On i.MX28, the MDIO bus is shared between the two FEC instances. The driver makes sure that the second FEC uses the MDIO bus of the first FEC. This is done conditionally if FEC_QUIRK_ENET_MAC is set. However, in newer designs, such as Vybrid or i.MX6SX, each FEC MAC has its own MDIO bus. Simply removing the quirk FEC_QUIRK_ENET_MAC is not an option since other logic, triggered by this quirk, is still needed. Furthermore, there are board designs which use the same MDIO bus for both PHY's even though the second bus would be available on the SoC side. Such layout are popular since it saves pins on SoC side. Due to the above quirk, those boards currently do work fine. The boards in the mainline tree with such a layout are: - Freescale Vybrid Tower with TWR-SER2 (vf610-twr.dts) - Freescale i.MX6 SoloX SDB Board (imx6sx-sdb.dts) This patch adds a new quirk FEC_QUIRK_SINGLE_MDIO for i.MX28, which makes sure that the MDIO bus of the first FEC is used in any case. However, the boards above do have a SoC with a MDIO bus for each FEC instance. But the PHY's are not connected in a 1:1 configuration. A proper device tree description is needed to allow the driver to figure out where to find its PHY. This patch fixes that shortcoming by adding a MDIO bus child node to the first FEC instance, along with the two PHY's on that bus, and making use of the phy-handle property to add a reference to the PHY's. Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-12-31net: fec: add Wake-on-LAN supportNimrod Andy
Support for Wake-on-LAN using Magic Packet. ENET IP supports sleep mode in low power status, when system enter suspend status, Magic packet can wake up system even if all SOC clocks are gate. The patch doing below things: - flagging the device as a wakeup source for the system, as well as its Wake-on-LAN interrupt - prepare the hardware for entering WoL mode - add standard ethtool WOL interface - enable the ENET interrupt to wake us Tested on i.MX6q/dl sabresd, sabreauto boards, i.MX6SX arm2 boards. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-12-30time: move the timecounter/cyclecounter code into its own file.Richard Cochran
The timecounter code has almost nothing to do with the clocksource code. Let it live in its own file. This will help isolate the timecounter users from the clocksource users in the source tree. Signed-off-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-24net: fec: init maximum receive buffer size for ring1 and ring2Nimrod Andy
i.MX6SX fec support three rx ring1, the current driver lost to init ring1 and ring2 maximum receive buffer size, that cause receving frame date length error. The driver reports "rcv is not +last" error log in user case. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-18net: fec: improve access to quirk flags by copying them into ↵Lothar Waßmann
fec_enet_private struct Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-18net: fec: change type of 'bufdesc_ex' to boolLothar Waßmann
fep->bufdesc_ex is treated as a boolean value, thus declare it as such. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-18net: fec: properly parenthesize macro argsLothar Waßmann
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-18net: fec: consistently use lower case chars as hex digitsLothar Waßmann
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-18net: fec: indentation cleanupLothar Waßmann
consistently use TABs for indentation Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-15net: fec: ptp: fix convergence issue to support LinuxPTP stackNimrod Andy
iMX6SX IEEE 1588 module has one hw issue in capturing the ATVR register. The current SW flow is: ENET0->ATCR |= ENET_ATCR_CAPTURE_MASK; ts_counter_ns = ENET0->ATVR; The ATVR value is not expected value that cause LinuxPTP stack cannot be convergent. ENET Block Guide/ Chapter for the iMX6SX (PELE) address the issue: After set ENET_ATCR[Capture], there need some time cycles before the counter value is capture in the register clock domain. The wait-time-cycles is at least 6 clock cycles of the slower clock between the register clock and the 1588 clock. So need something like: ENET0->ATCR |= ENET_ATCR_CAPTURE_MASK; wait(); ts_counter_ns = ENET0->ATVR; For iMX6SX, the 1588 ts_clk is fixed to 25Mhz, register clock is 66Mhz, so the wait-time-cycles must be greater than 240ns (40ns * 6). The patch add 1us delay before cpu read ATVR register. Changes V2: Modify the commit/comments log to describe the issue clearly. Signed-off-by: Fugang Duan <B38611@freescale.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-14net: fec: ptp: Enable PPS output based on ptp clockLuwei Zhou
FEC ptp timer has 4 channel compare/trigger function. It can be used to enable pps output. The pulse would be ouput high exactly on N second. The pulse ouput high on compare event mode is used to produce pulse per second. The pulse width would be one cycle based on ptp timer clock source.Since 31-bit ptp hardware timer is used, the timer will wrap more than 2 seconds. We need to reload the compare compare event about every 1 second. Signed-off-by: Luwei Zhou <b45643@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-14net: fec: ptp: Use hardware algorithm to adjust PTP counter.Luwei Zhou
The FEC IP supports hardware adjustment for ptp timer. Refer to the description of ENET_ATCOR and ENET_ATINC registers in the spec about the hardware adjustment. This patch uses hardware support to adjust the ptp offset and frequency on the slave side. Signed-off-by: Luwei Zhou <b45643@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Fugang Duan <b38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-01net: fec: implement rx_copybreak to improve rx performanceNimrod Andy
- Copy short frames and keep the buffers mapped, re-allocate skb instead of memory copy for long frames. - Add support for setting/getting rx_copybreak using generic ethtool tunable Changes V3: * As Eric Dumazet's suggestion that removing the copybreak module parameter and only keep the ethtool API support for rx_copybreak. Changes V2: * Implements rx_copybreak * Rx_copybreak provides module parameter to change this value * Add tunable_ops support for rx_copybreak Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-26net: fec: Add Ftype to BD to distiguish three tx queues for AVBNimrod Andy
The current driver loss Ftype field init for BD, which cause tx queue #1 and #2 cannot work well. Add Ftype field to BD to distiguish three queues for AVB: 0 -> Best Effort 1 -> ClassA 2 -> ClassB Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net:fec: increase DMA queue numberFugang Duan
when enable interrupt coalesce, 8 BD is not enough. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: fec: add interrupt coalescence feature supportFugang Duan
i.MX6 SX support interrupt coalescence feature By default, init the interrupt coalescing frame count threshold and timer threshold. Supply the ethtool interfaces as below for user tuning to improve enet performance: rx_max_coalesced_frames rx_coalesce_usecs tx_max_coalesced_frames tx_coalesce_usecs Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-16net: fec: fix build error at m68k platformFrank Li
reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 4d494cdc92b3b9a0f5fb9e1560810fa27d5a0489 make.cross ARCH=m68k m5272c3_defconfig make.cross ARCH=m68k drivers/net/ethernet/freescale/fec.h:262:0: warning: "FEC_R_DES_START" redefined #define FEC_R_DES_START(X) ((X == 1) ? FEC_R_DES_START_1 : \ ^ drivers/net/ethernet/freescale/fec.h:158:0: note: this is the location of the previous definition #define FEC_R_DES_START 0x3d0 /* Receive descriptor ring */ ^ drivers/net/ethernet/freescale/fec.h:265:0: warning: "FEC_X_DES_START" redefined #define FEC_X_DES_START(X) ((X == 1) ? FEC_X_DES_START_1 : \ ... Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>