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2012-08-23i2c: tegra: protect suspend/resume callbacks with CONFIG_PM_SLEEPLaxman Dewangan
The CONFIG_PM doesn't actually enable any of the PM callbacks, it only allows to enable CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME. This means if CONFIG_PM is used to protect system sleep callbacks then it may end up unreferenced if only runtime PM is enabled. Hence protecting sleep callbacks with CONFIG_PM_SLEEP. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Change-Id: I090e167c1de8f254a278e9e3b511292cfbc5f250 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/124872 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-08-23i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20Laxman Dewangan
Tegra20 i2c controller does not support the continue transfer which implements the I2C_M_NOSTART functionality of i2c protocol mangling. Removing the I2C_M_NOSTART functionality support for Tegra20. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com> Cherry-picked from mainline 72dedc2fb12ff31cc2da977d0c40c3ac58f554cf Change-Id: I461342749a834ff2eae056f1c6616a8d7693a32c Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/124875 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-08-22i2c: tegra: Add support for clk divisor in standard/fast modeChaitanya Bandi
Added support for clk divisor in standard/fast mode. Change-Id: I2cd8a6ee80979a4967d032d064babaea2978aab3 Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/124399 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-08-07Fix compilation errors due to mergePradeep Kumar
Change-Id: I1067e7b9ab829bc6629eb79c1edd36dc1327e281 Reviewed-on: http://git-master/r/121393 Reviewed-by: Bo Yan <byan@nvidia.com> Tested-by: Bo Yan <byan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-08-07Merge commit 'main-jb-2012.08.03-B4' into t114-0806Pradeep Kumar
Conflicts: arch/arm/boot/compressed/Makefile arch/arm/boot/compressed/atags_to_fdt.c arch/arm/boot/compressed/head.S arch/arm/boot/dts/tegra30.dtsi arch/arm/include/asm/bug.h arch/arm/kernel/traps.c arch/arm/mach-tegra/Makefile.boot arch/arm/mach-tegra/board-cardhu-sdhci.c arch/arm/mach-tegra/board-cardhu.c arch/arm/mach-tegra/board-enterprise-sdhci.c arch/arm/mach-tegra/board-enterprise.c arch/arm/mach-tegra/board-harmony.c arch/arm/mach-tegra/board-kai-sdhci.c arch/arm/mach-tegra/board-ventana.c arch/arm/mach-tegra/board-whistler.c arch/arm/mach-tegra/clock.h arch/arm/mach-tegra/fuse.h arch/arm/mach-tegra/tegra2_usb_phy.c arch/arm/mach-tegra/tegra3_clocks.c arch/arm/mach-tegra/tegra3_dvfs.c arch/arm/mach-tegra/tegra3_speedo.c arch/arm/mach-tegra/timer.c arch/arm/mach-tegra/usb_phy.c arch/arm/mach-tegra/wakeups-t3.c drivers/cpufreq/cpufreq_interactive.c drivers/input/touchscreen/atmel_mxt_ts.c drivers/mfd/tps65090.c drivers/mmc/core/mmc.c drivers/mmc/host/sdhci-tegra.c drivers/mmc/host/sdhci.c drivers/net/wireless/bcmdhd/bcmsdh_sdmmc_linux.c drivers/regulator/Kconfig drivers/regulator/core.c drivers/regulator/tps80031-regulator.c drivers/spi/Makefile drivers/staging/nvec/nvec.c drivers/tty/serial/Makefile include/linux/mmc/card.h sound/soc/tegra/tegra_max98095.c sound/usb/card.c Change-Id: I65043bc6ce9e97d0592683462215a39e50f403fd Reviewed-on: http://git-master/r/121392 Reviewed-by: Bo Yan <byan@nvidia.com> Tested-by: Bo Yan <byan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-07-30i2c: tegra: enable/disable clock unconditionally during xferLaxman Dewangan
Do the clock control for enable/disable during each transfer regardless of whether clock is always on or not. If clock is always on then in probe the reference count of the clock incremented and doing again enable will just increment reference and disable will decrement the reference count and so there is no harm on calling enable/disable always during transfer. Change-Id: Ibf67413fb84f826f04e890fe3dd2a20cd0469922 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/116473 Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
2012-07-30i2c: tegra: remove unused member variableLaxman Dewangan
Remove unused member variable "iomem" of the i2c device structure. This variable becomes unused when converted all allocation to devm_* in following change: i2c: tegra: make all resource allocation through devm_* Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cherry-picked from mainline 57c0dc3e69439a2ddf239226c318d676da773492 Change-Id: I8a3db21524a20ee4cbd1b87dff82bac80a2763de Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/116472 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
2012-07-30i2c: tegra: i2c slave initialization for non-dvc i2cLaxman Dewangan
The slave configuration is required for non-dvc i2c. This can be done by checking the i2c type "is_dvc" in place of having another variable. Change-Id: Ia80ba0f7a68e2dfaa13b5da94896b87f2877e047 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/116471 Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
2012-07-30Revert "i2c: tegra: Fix i2c unknown interrupt issue"Laxman Dewangan
This reverts commit 021d8866c80fab07cb4cd2753ed67d0c1b49c174. The reason for revert the change: The readback is done at the time of i2c_writel() and hence it is not require to have this in scattered manner. This is towards the aligning driver with mainline. Change-Id: I74184683301d7a3c26550d97fb1ce3596273a0bb Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/116470 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
2012-07-30i2c: tegra: make sure register writes completesLaxman Dewangan
The Tegra PPSB (an peripheral bus) queues writes transactions. In order to guarantee that writes have completed before a certain time, a read transaction to a register on the same bus must be executed. This is necessary in situations such as when clearing an interrupt status or enable, so that when returning from an interrupt handler, the HW has already de-asserted its interrupt status output, which will avoid spurious interrupts. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cherry-picked from mainline ec7aaca2f64f509f45d463d784b41d0b3d2be083 Change-Id: I4f064c38993031303bfeef794015efd5517561cc Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/116469 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
2012-07-30i2c: tegra: make all resource allocation through devm_*Laxman Dewangan
Use the devm_* for the memory region allocation, interrupt request, clock handler request. By doing this, it does not require to explicitly free it and hence saving some code. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cherry-picked from mainline 9cbb6b2b92d0fdade0fe00cc00e3658b44c86676 Change-Id: I0bc86dbd2bd4e460c75f6d425131f9e27bdace71 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/116468 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
2012-07-30i2c: tegra: rename dev_pm_ops variables/macroLaxman Dewangan
To align the downstream to mainline, renaming the variable/macro of dev_pm_ops as per mainline. The original change on mainline is: commit 6a7b3c3c465cef29d92dfc3fbbff0d958aa8be04 Author: Rafael J. Wysocki <rjw@sisk.pl> i2c-tegra: Use struct dev_pm_ops for power management Change-Id: Ica427ee339390a76ac8004bef96b4c12ef4ecae4 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/116465 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
2012-07-30i2c: tegra: use of_match_ptr() for match_table initializationLaxman Dewangan
In place of defining match_table for non-DT based as NULL, use of_match_ptr() for initialzing the of_match_table. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cherry-picked from mainline 02d8bf8dc6b09cb810599c64d47da3bdf4f85882 Fixed conflicts. Change-Id: I71994c49813396ad6b3dfa3fd616d9585203adba Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/116464 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
2012-07-02i2c: tegra: slave: Add missing header fileBo Yan
This is to fix the build break when migrating to K3.4 Change-Id: I8bdde84e028f635b884202a0034beb203c62fe11 Signed-off-by: Bo Yan <byan@nvidia.com>
2012-06-27i2c: tegra: Add support for Tegra11Alok Chauhan
Done the following changes: - Added support to identify tegra11 chip - Added handling for tegra11 specific hw changes Bug 837139 Change-Id: Ic06cb2095f42579181fb022bf8dbfdada2dbf38a Signed-off-by: Alok Chauhan <alokc@nvidia.com> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/78952 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Vijay Mali <vmali@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-11Merge commit 'v3.4.2' into android-tegra-nv-3.4Varun Wadekar
Conflicts: drivers/i2c/busses/i2c-tegra.c drivers/usb/gadget/fsl_udc_core.c Change-Id: Ibfc3a8edc3665b832ddc94f89fc17b556629d104 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2012-06-07i2c: tegra: Fix possible race condition.Laxman Dewangan
on tegra3, the i2c communication start immediately after writing the tx fifo. And hence there is possibility to complete the transfer and generates done interrupt before actually sw updates their local pointers/count. This patch will make sure that pointers/count can get updated before data written into the fifo. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/89510 (cherry picked from commit 999c09f0ed32f271e767a319dd094947e63fdb8c) Change-Id: I8e974b83b5306ec3363d4ca31ce1b539a498ca08 Signed-off-by: Johnny Qiu <joqiu@nvidia.com> Reviewed-on: http://git-master/r/99997 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-01i2c: tegra: notify transfer-complete after clearing status.Laxman Dewangan
commit c889e91d2cc22123f20f40dde0c0a91856a20eea upstream. The notification of the transfer complete by calling complete() should be done after clearing all interrupt status. This avoids the race condition of misconfigure the i2c controller in multi-core environment. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-06-01i2c: davinci: Free requested IRQ in removeMarcus Folkesson
commit 9868a060ccf769c08ec378a9829137e272e9a92c upstream. The freed IRQ is not necessary the one requested in probe. Even if it was, with two or more i2c-controllers it will fails anyway. Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-05-21i2c: tegra: Fix i2c unknown interrupt issueKen Chang
writes to modules on APB bus may complete out-of-order. need to guarantee that the write is completed by reading it back. read I2C_INT_STATUS back right after writing the current int status in the isr to make sure the clear operation of I2C_INT_STATUS is done before the interrupt is re-enabled. the same also done for DVC_STATUS. bug 980763 Change-Id: I34f18804d530ccadf561fe1736552b6a4dd6e4ce Signed-off-by: Ken Chang <kenc@nvidia.com> Reviewed-on: http://git-master/r/101925 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-05-16Revert "Revert "i2c: tegra: Add delay before resetting the controller after ↵Varun Wadekar
NACK"" This reverts commit 21092209a6a1359e4435592d92236aea62b2af68 since this was accidentally identified as kernel_submit failure culprit. Change-Id: I4286a8f09b70602cfbf81334ed784686c5880b45 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2012-05-14Revert "i2c: tegra: Add delay before resetting the controller after NACK"Varun Wadekar
This reverts commit d0c2ce964c672209c5d0740d5bfcba93abdad301 since this change breaks some i2c tests in kernel_submit. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2012-05-14i2c: mxs: disable QUEUE when sending is doneWolfram Sang
Since the last fixes to this driver ensure now the queue termination is done correctly, we can finally disable the queue after a transfer without problems. The gain is that it will only be reenabled after the next transfer is fully set up. Before, the queue was running all the time and if the setup of the next message was interrupted by another thread, an incomplete buffer could have been sent, padded with zeroes. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-05-14i2c: mxs: handle spurious interruptWolfram Sang
After an error interrupt setting cmd->err, I see another interrupt that the data engine is empty which clears cmd->err before being processed. So, clear cmd->err at the beginning of a transfer only to handle these consecutive interrupts. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-05-14i2c-eg20t: Modify MODULE_AUTHOR's email addressTomoya MORINAGA
Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-05-14i2c-eg20t: change timeout value 50msec to 1000msecTomoya MORINAGA
Currently, during i2c works alone, wait-event timeout is not occurred. However, as CPU load increases, timeout occurs frequently. So, I modified like this patch. Modifying like this patch, I've never seen the timeout event with high load test. Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-05-14i2c: tegra: Add delay before resetting the controller after NACKAlok Chauhan
NACK interrupt is generated before I2C controller generates the STOP condition on bus. Because of this reset of controller is happening before I2C controller could complete STOP condition. So wait for some time before resetting the controller so that STOP condition has delivered properly on bus. Added delay of 2 clock period before resetting the controller in case of NACK error. Signed-off-by: Alok Chauhan <alokc@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> [wsa: Reworded the commit msg and code comment a bit] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Conflicts: drivers/i2c/busses/i2c-tegra.c Change-Id: Ifb244fbd3251a5af846b641ad6293f4b460c7c29
2012-05-14i2c: pnx: Disable clk in suspendRoland Stigge
In the driver's suspend function, clk_enable() was used instead of clk_disable(). This is corrected with this patch. Signed-off-by: Roland Stigge <stigge@antcom.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de> CC: stable@vger.kernel.org [wsa: reworded commit header slightly] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-04-27i2c: mxs: disable QUEUE when sending is doneWolfram Sang
Since the last fixes to this driver ensure now the queue termination is done correctly, we can finally disable the queue after a transfer without problems. The gain is that it will only be reenabled after the next transfer is fully set up. Before, the queue was running all the time and if the setup of the next message was interrupted by another thread, an incomplete buffer could have been sent, padded with zeroes. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-04-26Revert "i2c: tegra: prevent corruption for devices that support multiple buses"Varun Wadekar
This reverts commit a499304fc56621dc9800f29bd7f7e15452dcf0ea Change-Id: I2a9c35601d80c92ffe233fc0584494ea743f1514 Reviewed-on: http://git-master/r/99111 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-26i2c: tegra: prevent corruption for devices that support multiple busesMayuresh Kulkarni
- I2C2 on ventana is capable of multiplexing the bus between pin-group DDC and GEN2 - but struct tegra_i2c_dev is capable of storing only 1 bus info causing corruption Change-Id: I1526381a744ee28e4db7d7b12513a08d47e5bbc8 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/99103 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-26i2c: mux: pca954x: correct PTR_ERR for regulatorMayuresh Kulkarni
- 3.4 kernel core for regulator returns EPROBE_DEFER for regulator_get() instead of ENODEV - this driver was using ENODEV causing its probe fail Bug 974063 Bug 974078 Change-Id: Ibf8a6b63c67c084e615c3516144f556c06a34dd7 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/98203 Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-25i2c: mxs: handle spurious interruptWolfram Sang
After an error interrupt setting cmd->err, I see another interrupt that the data engine is empty which clears cmd->err before being processed. So, clear cmd->err at the beginning of a transfer only to handle these consecutive interrupts. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-04-23i2c: tegra: support for I2C_M_NOSTART protocol manglingLaxman Dewangan
Adding support for protocol mangling I2C_M_NOSTART. Change-Id: I6cc0c96b3c374d452ea886a0f983dc5d31c4575c Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/92573 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-22i2c-eg20t: Modify MODULE_AUTHOR's email addressTomoya MORINAGA
Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-04-22i2c-eg20t: change timeout value 50msec to 1000msecTomoya MORINAGA
Currently, during i2c works alone, wait-event timeout is not occurred. However, as CPU load increases, timeout occurs frequently. So, I modified like this patch. Modifying like this patch, I've never seen the timeout event with high load test. Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-04-22i2c: tegra: Add delay before resetting the controller after NACKAlok Chauhan
NACK interrupt is generated before I2C controller generates the STOP condition on bus. Because of this reset of controller is happening before I2C controller could complete STOP condition. So wait for some time before resetting the controller so that STOP condition has delivered properly on bus. Added delay of 2 clock period before resetting the controller in case of NACK error. Signed-off-by: Alok Chauhan <alokc@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> [wsa: Reworded the commit msg and code comment a bit] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-04-22i2c: pnx: Disable clk in suspendRoland Stigge
In the driver's suspend function, clk_enable() was used instead of clk_disable(). This is corrected with this patch. Signed-off-by: Roland Stigge <stigge@antcom.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de> CC: stable@vger.kernel.org [wsa: reworded commit header slightly] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-04-18i2c: prevent spurious interrupt on Designware controllersKristen Carlson Accardi
Don't call i2c_enable on resume because it causes a spurious interrupt. Signed-off-by: Kristen Carlson Accardi <kristen@linux.intel.com> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-04-18i2c: tegra: Support for I2C_M_REV_DIR_ADDR protocol manglingLaxman Dewangan
Add support for protocol mangling "I2C_M_REV_DIR_ADDR" Change-Id: Icdef16885f1cf6ed1ce9c4003a94c2c2e917ced2 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/92572 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Stephen Warren <swarren@nvidia.com>
2012-04-18i2c: tegra: Fix to avoid possible race conditionChaitanya Bandi
Because of race condition between isr and tx fifo fill, duplicate data is being written. So added locking to make Tx fifo fill as atomic. Change-Id: Ia99466adadfb6d86a6f238ec4cd0aa13bd36e434 Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/90870 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-18i2c: tegra: Avoid duplicate write into Tx fifoChaitanya Bandi
Dvc I2C_DONE_INTR_EN interrupt bit is always enable into dvc control register3. During normal transaction on dvc i2c bus sometimes one transaction written two times in TX fifo buffer because of triggered dvc interrupt. This is causing to corrupt the next transaction header and send wrong address over dvc i2c bus. To solve this issue dvc i2c interrupt has to disable during filling of Tx fifo and enable after that. Updated the following things in code: (1) Add the code to mask/unmask I2C_DONE_INTR_EN into dvc control reg3 writing into Tx Fifo register. (2) Put delay before resetting the controller Hand-picked this change from: http://git-master/r/#change,39997 Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Change-Id: I16b5821e1d0d0cf8419ce9d239e794de9d5b47be Reviewed-on: http://git-master/r/89456 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-11i2c: tegra: Correct 10bit address configurationLaxman Dewangan
The slave address of device to be configured in packet header as follows: 7 bit address: PacketHeader3[7:1] 10 bit address: PacketHeader3[9:0] Fixing the code to make packet header3 properly. Change-Id: I1797066d23ada5d4d7b14710201a1fb17566b78b Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/92556 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Andy Carman <acarman@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2012-04-11i2c: tegra: Remove synchronization between init and isrChaitanya Bandi
Removed unnecessary synchronization between init and isr because clock driver is making sure that any operations will be completed before disabling the driver clock. Change-Id: I545e48be73697e023fedb8c663402c15e2a472df Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/91779 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-04-10i2c: prevent spurious interrupt on Designware controllersKristen Carlson Accardi
Don't call i2c_enable on resume because it causes a spurious interrupt. Signed-off-by: Kristen Carlson Accardi <kristen@linux.intel.com> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-04-07Merge branch '3.4-rc1' into android-tegra-nv-3.3-rebasedVarun Wadekar
Change-Id: Ib3b69ffc5ac3e07c9cc44cc49e9142088eec477e Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2012-03-28Merge tag 'split-asm_system_h-for-linus-20120328' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system Pull "Disintegrate and delete asm/system.h" from David Howells: "Here are a bunch of patches to disintegrate asm/system.h into a set of separate bits to relieve the problem of circular inclusion dependencies. I've built all the working defconfigs from all the arches that I can and made sure that they don't break. The reason for these patches is that I recently encountered a circular dependency problem that came about when I produced some patches to optimise get_order() by rewriting it to use ilog2(). This uses bitops - and on the SH arch asm/bitops.h drags in asm-generic/get_order.h by a circuituous route involving asm/system.h. The main difficulty seems to be asm/system.h. It holds a number of low level bits with no/few dependencies that are commonly used (eg. memory barriers) and a number of bits with more dependencies that aren't used in many places (eg. switch_to()). These patches break asm/system.h up into the following core pieces: (1) asm/barrier.h Move memory barriers here. This already done for MIPS and Alpha. (2) asm/switch_to.h Move switch_to() and related stuff here. (3) asm/exec.h Move arch_align_stack() here. Other process execution related bits could perhaps go here from asm/processor.h. (4) asm/cmpxchg.h Move xchg() and cmpxchg() here as they're full word atomic ops and frequently used by atomic_xchg() and atomic_cmpxchg(). (5) asm/bug.h Move die() and related bits. (6) asm/auxvec.h Move AT_VECTOR_SIZE_ARCH here. Other arch headers are created as needed on a per-arch basis." Fixed up some conflicts from other header file cleanups and moving code around that has happened in the meantime, so David's testing is somewhat weakened by that. We'll find out anything that got broken and fix it.. * tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system: (38 commits) Delete all instances of asm/system.h Remove all #inclusions of asm/system.h Add #includes needed to permit the removal of asm/system.h Move all declarations of free_initmem() to linux/mm.h Disintegrate asm/system.h for OpenRISC Split arch_align_stack() out from asm-generic/system.h Split the switch_to() wrapper out of asm-generic/system.h Move the asm-generic/system.h xchg() implementation to asm-generic/cmpxchg.h Create asm-generic/barrier.h Make asm-generic/cmpxchg.h #include asm-generic/cmpxchg-local.h Disintegrate asm/system.h for Xtensa Disintegrate asm/system.h for Unicore32 [based on ver #3, changed by gxt] Disintegrate asm/system.h for Tile Disintegrate asm/system.h for Sparc Disintegrate asm/system.h for SH Disintegrate asm/system.h for Score Disintegrate asm/system.h for S390 Disintegrate asm/system.h for PowerPC Disintegrate asm/system.h for PA-RISC Disintegrate asm/system.h for MN10300 ...
2012-03-28Merge branch 'i2c-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging Pull i2c updates from Jean Delvare. Fix up trivial conflict in drivers/i2c/busses/i2c-gpio.c due to include file cleanup clashing with DT support addition (which did the same cleanup) * 'i2c-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging: i2c-algo-bit: Don't resched on clock stretching i2c: Update the FSF address i2c: Convert drivers/i2c/muxes/* to use module_i2c_driver() i2c-i801: Use usleep_range to wait for command completion i2c-i801: Add device IDs for Intel Lynx Point i2c-isch: Decrease delay in command completion check loop i2c-gpio: Use linux/gpio.h rather than asm/gpio.h
2012-03-28Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds
Pull "ARM: More device tree support updates" from Olof Johansson: "This branch contains a number of updates for device tree support on several ARM platforms, in particular: * AT91 continues the device tree conversion adding support for a number of on-chip drivers and other functionality * ux500 adds probing of some of the core SoC blocks through device tree * Initial device tree support for ST SPEAr600 platforms * kirkwood continues the conversion to device-tree probing" Manually merge arch/arm/mach-ux500/Kconfig due to MACH_U8500 rename, and drivers/usb/gadget/at91_udc.c due to header file include cleanups. Also do an "evil merge" for the MACH_U8500 config option rename that the affected RMI4 touchscreen driver in staging. It's called MACH_MOP500 now, and it was missed during previous merges. * tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) ARM: SPEAr600: Add device-tree support to SPEAr600 boards ARM: ux500: Provide local timer support for Device Tree ARM: ux500: Enable PL022 SSP Controller in Device Tree ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree ARM: ux500: db8500: list most devices in the snowball device tree ARM: ux500: split dts file for snowball into generic part ARM: ux500: combine the board init functions for DT boot ARM: ux500: Initial Device Tree support for Snowball ARM: ux500: CONFIG: Enable Device Tree support for future endeavours ARM: kirkwood: use devicetree for rtc-mv ARM: kirkwood: rtc-mv devicetree bindings ARM: kirkwood: fdt: define uart[01] as disabled, enable uart0 ARM: kirkwood: fdt: facilitate new boards during fdt migration ARM: kirkwood: fdt: absorb kirkwood_init() ARM: kirkwood: fdt: use mrvl ticker symbol ARM: orion: wdt: use resource vice direct access ARM: Kirkwood: Remove tclk from kirkwood_asoc_platform_data. ARM: orion: spi: remove enable_clock_fix which is not used ...
2012-03-28Remove all #inclusions of asm/system.hDavid Howells
Remove all #inclusions of asm/system.h preparatory to splitting and killing it. Performed with the following command: perl -p -i -e 's!^#\s*include\s*<asm/system[.]h>.*\n!!' `grep -Irl '^#\s*include\s*<asm/system[.]h>' *` Signed-off-by: David Howells <dhowells@redhat.com>
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