Age | Commit message (Collapse) | Author |
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To prevent the device being accidentally put into runtime suspend state
during the whole system suspend process, pm_runtime_get_noresume() is
called upon _every_ device to increase the usage count (please refer to
drivers/base/power/main.c).
Since we don't explicitly disable the clock, pm_runtime_put_sync() in
each operation in tegra_se_suspend() will not actually call the runtime
suspend function, thus leaving the clock still enabled.
To fix this issue in a simple way, we call pm_runtime_put_sync() in the
end of tegra_se_suspend() to decrease the usage count to "0" and thus
call tegra_se_runtime_suspend() in turn to disable the clock. To pair
the usage count, we do a pm_runtime_get_noresume() in tegra_se_resume()
as we don't actually need to runtime resume the device there.
Bug 1246029
Change-Id: I64520b022b896f2867934255a55b852fafac4b63
Signed-off-by: Eric Miao <emiao@nvidia.com>
Reviewed-on: http://git-master/r/206658
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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This change fixes the S.E time out errors while
executing RSA test
Bug 1218410
Change-Id: Icbbcdd7b3d86a259dc3ff19ebb4b3a7374135e47
Signed-off-by: venkatajagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/195912
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shravani D <shravanid@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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change S.E frequency based on the algorithm
being used
Bug 1014636
Change-Id: I49d1d15d0da0a9c76c3eda7d86872678dfe8d911
Signed-off-by: Venkatajagadish <vjagadish@nvidia.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/132551
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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coverity id: 20917
Bug 1046331
Change-Id: Ia5653fff5df8cb0b5d8bda838b8d7cd883527fa0
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/167944
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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This change removes T114 SW war for DRBG key slot
index.
Bug 1033121
Change-Id: If44cb707158acc1becea5da9e933fb2eb7e86df4
Signed-off-by: venkatajagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/165628
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This change removes T114 SW war to reseed the rng after
RESEED_INTERVAL.
Bug 1002118
Change-Id: I4f504349dd4a9a89d77b373808d82b41b3fcf736
Signed-off-by: venkatajagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/165614
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
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Remove the T114 S.E SW War to limit the Max bytes to process .
Bug 961707
Change-Id: I16bcc36d0a1f1449b015bc3084634a34aaf30f4e
Signed-off-by: venkatajagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/165613
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
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Remove NOP command after lp0 context save fot t148.
Bug 1002132
Change-Id: I2af181b02ff3ba64a60f2ad325fefee49e69c023
Signed-off-by: venkatajagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/165612
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
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Find physical address of ctx_save_buf via vmalloc_to_page(), and set
it in PMC scratch register.
Bug 1162056
Change-Id: I8ab16fd1381954883f3b51a30e958b1f343dd4e8
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/165732
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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The clk_enable/clk_disable pair of APIs are replaced with
clk_prepare_enable and clk_disable_unprepare.
This is needed for the migration to common clk framework.
Bug 920915
Change-Id: I0ad0d338c14d07335cb14921d681188d33a12de5
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/162323
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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This change adds chained scatter list traversing support
to S.E. Driver.
Bug 1010604
Change-Id: If4073b7cf9c8ac901b8d0bd21ddc035e1e6b7ffd
Signed-off-by: venkatajagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/147890
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
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t114 has sticky bits for RSA key slots which is not
there in t30. Context save buffer offsets are
adjusted appropriately for this.
Change-Id: Ifd4e59772a869358d8dd12262e882fa63c53f054
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/159890
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Fix coverity issue by adding null check
before pointer dereference.
Bug 1046331
Change-Id: Ib4087056f5fb4c1d48f522c43065cd49a0ea5253
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/159498
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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The clk_enable/clk_disable pair of APIs are replaced with
clk_prepare_enable and clk_disable_unprepare.
This is needed for the migration to common clk framework.
Bug 920915
Change-Id: I697d80e857a040e97ea56adee104ae990419c5b6
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/146796
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Issue NOP command after lp0 context save so that
RSA can be performed if any.
Bug 946811
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/132652
(cherry picked from commit d28ee9a7c6e2ad426f373a86b12b845422dd28c1)
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Change-Id: I77f2c5f71dac44ed89e638dc23dc6abcb844400d
Reviewed-on: http://git-master/r/146654
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Add Security Engine low power context save support
for t11x
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/132651
(cherry picked from commit 935b99c49bc593af6cfd709d0a2b5c8784cb0e6e)
Change-Id: I6464a4dd42c0dc22ecab2ac9e358abb7e19acb70
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/146514
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Dereference after NULL check.
Bug 1046331
Change-Id: I9438cf4aba92bec2c0aaccb5e272368a1bd99693
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/142204
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Add assignment after NULL check.
Bug 1046331
Change-Id: Ib82f18b3119fb3333ce57494e854cdbc557f1acc
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/133520
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Force ressed rng number generation after reseed
interval expires
Bug 952135
Change-Id: I3259b7ce008769c736e9b548a78494501acab60f
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/130994
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Security Engine can process maximum of 0xFFFFF 16 byte
blocks. Add check condition for the same.
Bug 961700
Change-Id: Iade1abfd27a9b784de8e0a59f319d403a4beb187
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/123291
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Bug 1024089
Change-Id: I185016635729d3e1fb853a680ca6e66f7fc3c714
Signed-off-by: Stefan Becker <stefanb@nvidia.com>
Reviewed-on: http://git-master/r/122363
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Oskari Jaaskelainen <oskarij@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Frank Bourgeois <fbourgeois@nvidia.com>
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Conflicts:
arch/arm/boot/compressed/Makefile
arch/arm/boot/compressed/atags_to_fdt.c
arch/arm/boot/compressed/head.S
arch/arm/boot/dts/tegra30.dtsi
arch/arm/include/asm/bug.h
arch/arm/kernel/traps.c
arch/arm/mach-tegra/Makefile.boot
arch/arm/mach-tegra/board-cardhu-sdhci.c
arch/arm/mach-tegra/board-cardhu.c
arch/arm/mach-tegra/board-enterprise-sdhci.c
arch/arm/mach-tegra/board-enterprise.c
arch/arm/mach-tegra/board-harmony.c
arch/arm/mach-tegra/board-kai-sdhci.c
arch/arm/mach-tegra/board-ventana.c
arch/arm/mach-tegra/board-whistler.c
arch/arm/mach-tegra/clock.h
arch/arm/mach-tegra/fuse.h
arch/arm/mach-tegra/tegra2_usb_phy.c
arch/arm/mach-tegra/tegra3_clocks.c
arch/arm/mach-tegra/tegra3_dvfs.c
arch/arm/mach-tegra/tegra3_speedo.c
arch/arm/mach-tegra/timer.c
arch/arm/mach-tegra/usb_phy.c
arch/arm/mach-tegra/wakeups-t3.c
drivers/cpufreq/cpufreq_interactive.c
drivers/input/touchscreen/atmel_mxt_ts.c
drivers/mfd/tps65090.c
drivers/mmc/core/mmc.c
drivers/mmc/host/sdhci-tegra.c
drivers/mmc/host/sdhci.c
drivers/net/wireless/bcmdhd/bcmsdh_sdmmc_linux.c
drivers/regulator/Kconfig
drivers/regulator/core.c
drivers/regulator/tps80031-regulator.c
drivers/spi/Makefile
drivers/staging/nvec/nvec.c
drivers/tty/serial/Makefile
include/linux/mmc/card.h
sound/soc/tegra/tegra_max98095.c
sound/usb/card.c
Change-Id: I65043bc6ce9e97d0592683462215a39e50f403fd
Reviewed-on: http://git-master/r/121392
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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RNG operation updates UIV. So program reserved
slot i.e., slot zero before every RNG operation.
Bug 1017413
Change-Id: I831b8cfd275ebecb5e6df3166a977b0cc5a26a8a
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/115992
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Because SE interrupts could be enabled in bootloader, if it's not
cleared before jumping into kernel, it continues to assert the
interrupt line to interrupt controller. When SE interrupts is
enabled in kernel, to access SE registers in IST without clock
enabled hung the CPU. To fix this issue, interrupt enabling is
moved after clock is enabled.
bug 1010334
Change-Id: I1b909efce2c9d92c3112039fc217f7c1360f9bbb
Reviewed-on: http://git-master/r/113073
(cherry picked from commit b06e6662f738ad01a3b2b6803db654abaa03385e)
Signed-off-by: Victor(Weiguo) Pan <wpan@nvidia.com>
Change-Id: Ide4b0295c781e0bba7aa071616e3e6160e44ee76
Reviewed-on: http://git-master/r/114064
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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- Using the dma sync apis to keep coherency.
bug 984039
Change-Id: I9e389d2679f05c519ae4a51462247b7efeae01ca
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/111612
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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- Correcting the size of the dma buffer allocated for the key table.
Change-Id: I34c0d0554710219021cb534e61a558cf217ccc19
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/111577
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Add SP800-90 RNG support
Bug 837124
Change-Id: I04787bf5a65f378f7edb24c622d1e2f83f287a99
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/108920
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Added RSA modular exponentiation support
Bug 837124
Change-Id: I1ea80a42ec8cafb25b561a868164f187b2d6a638
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/84237
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Updated tegra-se driver dependency for Tegra11x.
Bug 837136, 837124
Reviewed-on: http://git-master/r/57028
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
(cherry picked from commit 98f2a91cff0ac5c3dd7500fd1e79aab6b7b0c5cb)
Change-Id: I9c0d5b108e7995398188d1b0cc6ea8521c7f78a8
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/77665
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
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Use sg_next to get next sg
Bug 958431
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Change-Id: I14aa7c9c551d0230b9c5b681a2699dd5355d0a6d
Reviewed-on: http://git-master/r/98449
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Change-Id: If3686d321c938d313bbe2688f5c22bc87bdc3627
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/103318
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Without CRYPTO_HASH being selected, mv_cesa has a lot of hooks
into undefined exports.
----
MODPOST 81 modules
Kernel: arch/arm/boot/Image is ready
AS arch/arm/boot/compressed/head.o
GZIP arch/arm/boot/compressed/piggy.gzip
CC arch/arm/boot/compressed/misc.o
CC arch/arm/boot/compressed/decompress.o
ERROR: "crypto_ahash_type" [drivers/crypto/mv_cesa.ko] undefined!
ERROR: "crypto_shash_final" [drivers/crypto/mv_cesa.ko] undefined!
ERROR: "crypto_register_ahash" [drivers/crypto/mv_cesa.ko] undefined!
ERROR: "crypto_unregister_ahash" [drivers/crypto/mv_cesa.ko] undefined!
ERROR: "crypto_shash_update" [drivers/crypto/mv_cesa.ko] undefined!
ERROR: "crypto_shash_digest" [drivers/crypto/mv_cesa.ko] undefined!
ERROR: "crypto_shash_setkey" [drivers/crypto/mv_cesa.ko] undefined!
ERROR: "crypto_alloc_shash" [drivers/crypto/mv_cesa.ko] undefined!
make[1]: *** [__modpost] Error 1
make: *** [modules] Error 2
make: *** Waiting for unfinished jobs....
----
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Cc: stable@vger.kernel.org
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Access to global talitos registers must be protected for the case when
affinities are configured such that primary and secondary talitos irqs
run on different cpus.
Signed-off-by: Horia Geanta <horia.geanta@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Before commit de47725421ad5627a5c905f4e40bb844ebc06d29 ("include: replace
linux/module.h with "struct module" wherever possible") <linux/module.h> was
implicitly included through <linux/platform_device.h> -> <linux/device.h>.
Signed-off-by: Michał Wróbel <michal.wrobel@flytronic.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Multiple queue were getting scheduled leading to race condition.
Bug 955259
Change-Id: I7dd8d0d15b17552c3a611449642439ae21fa4b5d
Signed-off-by: Amit Kamath <akamath@nvidia.com>
Reviewed-on: http://git-master/r/93097
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Gerrit_Virtual_Submit
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Change-Id: I67f2d749e3628b30f9ead08707708ad5e1b88f4c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Save the key in hardware when the key setting call comes. Currently it is
set at later time.
Bug 917607
Change-Id: Ibdacb07c16c161eeba00eda6716884518e40c40a
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/90072
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Conflicts:
drivers/crypto/tegra-aes.c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Access to global talitos registers must be protected for the case when
affinities are configured such that primary and secondary talitos irqs
run on different cpus.
Signed-off-by: Horia Geanta <horia.geanta@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Change-Id: Ib3b69ffc5ac3e07c9cc44cc49e9142088eec477e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Before commit de47725421ad5627a5c905f4e40bb844ebc06d29 ("include: replace
linux/module.h with "struct module" wherever possible") <linux/module.h> was
implicitly included through <linux/platform_device.h> -> <linux/device.h>.
Signed-off-by: Michał Wróbel <michal.wrobel@flytronic.pl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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These changes have no effect if CONFIG_GCOV_KERNEL is not set in
defconfig. It is easier to trigger GCOV for kernel if this patch
is in by only setting the before mentioned flag.
Change-Id: I8aade309da2da62c4b3889bd84e4123ba8f182da
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/62999
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Rebase-Id: R4c238f707f1db600f188ae83426336753992b7be
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git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 patches from Martin Schwidefsky:
"The biggest patch is the rework of the smp code, something I wanted to
do for some time. There are some patches for our various dump methods
and one new thing: z/VM LGR detection. LGR stands for linux-guest-
relocation and is the guest migration feature of z/VM. For debugging
purposes we keep a log of the systems where a specific guest has lived."
Fix up trivial conflict in arch/s390/kernel/smp.c due to the scheduler
cleanup having removed some code next to removed s390 code.
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
[S390] kernel: Pass correct stack for smp_call_ipl_cpu()
[S390] Ensure that vmcore_info pointer is never accessed directly
[S390] dasd: prevent validate server for offline devices
[S390] Remove monolithic build option for zcrypt driver.
[S390] stack dump: fix indentation in output
[S390] kernel: Add OS info memory interface
[S390] Use block_sigmask()
[S390] kernel: Add z/VM LGR detection
[S390] irq: external interrupt code passing
[S390] irq: set __ARCH_IRQ_EXIT_IRQS_DISABLED
[S390] zfcpdump: Implement async sdias event processing
[S390] Use copy_to_absolute_zero() instead of "stura/sturg"
[S390] rework idle code
[S390] rework smp code
[S390] rename lowcore field
[S390] Fix gcc 4.6.0 compile warning
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Added check for valid requested process buffer size.
Bug 928454
Change-Id: I2dc389af64cb3de2f0a0a3f0bbc5057dd9bd676c
Reviewed-on: http://git-master/r/89381
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Rebase-Id: R9fd50e7dc33a4e85e6bf2080ffea1a55edd15172
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Should have been "GPL v2", not "GPLv2".
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Change-Id: I7b4669c023c48e1080de7f87ed7166dc9b47884a
Reviewed-on: http://git-master/r/88101
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: R384ed15a1a529d7eafd94233ebd39870c7133fc4
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Bug 917607
Change-Id: I049ca03efe7953dc6a6c03eaa4acce85e15662d1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76154
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Rebase-Id: R82c141d0b1b4e38da092ede97386a2c71c06d582
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Bug 917607
Change-Id: I6036b12456d3b5fb22f479a9e0eefd500cb6c059
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76153
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Rebase-Id: R5575542e5392a7c0dbdd9cd879073c34da2679db
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Bug 917607
Change-Id: I7497411932b6ba8c155026f1662063e87c21eb40
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/74012
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Rebase-Id: Rcecec9ae6298489313818c12688e1918c5499645
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Fixed the case where SG buffer length is more than actual number
of bytes to process.
Bug 922857
Change-Id: I8445d8ae74b8fc6c964c19523fcd731f7ba4bd37
Reviewed-on: http://git-master/r/75701
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/75891
Reviewed-by: Automatic_Commit_Validation_User
Rebase-Id: Rf944b3b3af9c4a5f0460d349523f522db5e8b11d
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RNG support for less than 16 Bytes and or not a multiple of
16 Bytes.
Bug 893463
Change-Id: I37fff0f90004dd3116b621c5aa956cebbd6a085a
Reviewed-on: http://git-master/r/74263
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-on: http://git-master/r/74559
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
Rebase-Id: R82b591737aa6cb52cf323b3804404988c9b12cd5
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