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path: root/drivers/clk/imx/clk-scu.h
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2020-02-13MLK-23273-1 clk: imx: Add imx8dxl clk driverTeo Hall
Add files for imx8dxl clk driver which is based on imx8qxp clock driver. Signed-off-by: Teo Hall <teo.hall@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2019-11-25clk: imx8: add imx8qm clock valid resource checkingDong Aisheng
Add imx8qm clock valid resource checking mechanism Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25clk: imx8qxp: add clock valid checking mechnismDong Aisheng
clk-imx8qxp is a common SCU clock driver used by both QM and QXP platforms. The clock numbers vary a bit between those two platforms. This patch introduces a mechanism to only register the valid clocks for one platform by checking the clk resource id table. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25clk: imx: scu: clean up gpr clocksDong Aisheng
Clean up gpr clocks by defining a common scu gpr clock. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25clk: imx: scu: rename imx_clk_scu3 to imx_clk_gate_gpr_scuDong Aisheng
Like other scu gpr clocks, change the name to be more accurate. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25clk: imx: lpcg: add suspend/resume supportDong Aisheng
LPCG clock state may be lost when it's power domain is completely off during system suspend/resume and we need save and restore the state properly. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25clk: imx: lpcg: allow lpcg clk to take device pointerDong Aisheng
Used to support runtime pm. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25clk: imx: scu: allow scu clk to take device pointerDong Aisheng
Used to support runtime pm. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25clk: imx: scu: add two cells binding supportDong Aisheng
This patch implements the new two cells binding for SCU clocks. The usage is as follows: clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER> Due to each SCU clock is associated with a power domain, without power on the domain, the SCU clock can't work. So we create platform devices for each domain clock respectively and manually attach the required domain before register the clock devices, then we can register clocks in the clock platform driver accordingly. Note because we do not have power domain info in device tree and the SCU resource ID is the same for power domain and clock, so we use resource ID to find power domains. Later, we will also use this clock platform driver to support suspend/resume and runtime pm. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25clk: imx: scu: add scu gate clock supportFugang Duan
On i.MX8QM/QXP platforms, some clocks tree use GPR to set clock gate, add scu clock gate driver support. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
2019-11-25clk: imx: scu: add scu gpr divider and mux clk_hw supportFugang Duan
i.MX8QM/QXP platforms some clocks tree use GPR to set clock divider value, or select the clock source. So add scu divider and mux clock driver support. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
2019-02-21clk: imx: scu: add set parent supportAisheng Dong
Add clk scu set parents support. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Remove le32_to_cpu() on get_parent op] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-14clk: imx: add lpcg clock supportAisheng Dong
The Low-Power Clock Gate (LPCG) modules contain a local programming model to control the clock gates for the peripherals. An LPCG module is used to locally gate the clocks for the associated peripheral. And they're bedind the SCU clock. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-13clk: imx: add scu clock common partAisheng Dong
Add SCU clock common part which will be used by client clock drivers. SCU clocks are totally different from the legacy clocks (No much legacy things can be reused), it's using a firmware interface now based on SCU protocol. So a new configuration option CONFIG_MXC_CLK_SCU is added. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Mark ccm_ipc_handle static] Signed-off-by: Stephen Boyd <sboyd@kernel.org>