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2013-04-09ARM: dts: OMAP4: Add omap-usb2 dataKishon Vijay Abraham I
Add omap-usb2 data node in omap4 device tree file. Since omap-usb2 is connected to ocp2scp, omap-usb2 dt data is added as a child node of ocp2scp. The information about this data node is availabe @ Documentation/devicetree/bindings/usb/usb-phy.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: OMAP4: Add omap control usb dataKishon Vijay Abraham I
Add omap control usb data in omap4 device tree file. This will have the register address of registers to power on the PHY and to write to mailbox. The information about this data node is available @ Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: OMAP3: reduce GPMC mapped registers address spaceJavier Martinez Canillas
Currently the OMAP General-Purpose Memory Controller (GPMC) device node maps 16 MB of address space for its hardware registers. This is because the OMAP Technical Reference Manual says that the GPMC module register address space size is 16 MB. But in practice the maximum address offset used by a GPMC register is 0x02d0. So, there is no need to map such a big address space for GPMC regs. This change was suggested by Jon Hunter [1]. [1]: https://patchwork.kernel.org/patch/2057111/ Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: OMAP3: Add GPMC controllerFlorian Vaussard
Add device-tree support for the GPMC controller on the OMAP3. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap5-evm: Add mcspi dataSourav Poddar
Add mcspi node and pinmux data for omap5 mcspi controller. Tested on omap5430 evm with 3.8-rc6 custom kernel. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: OMAP5: Add SPI nodesFelipe Balbi
Add all 4 mcspi instances to omap5.dtsi file. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> [benoit.cousson@linaro.org: Update the subject] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap4-panda: Add I2c pinctrl dataSourav Poddar
Booting 3.8-rc6 on omap4 panda results in the following error [ 0.444427] omap_i2c 48070000.i2c: did not get pins for i2c error: -19 [ 0.445770] omap_i2c 48070000.i2c: bus 0 rev0.11 at 400 kHz [ 0.473937] omap_i2c 48072000.i2c: did not get pins for i2c error: -19 [ 0.474670] omap_i2c 48072000.i2c: bus 1 rev0.11 at 400 kHz [ 0.474822] omap_i2c 48060000.i2c: did not get pins for i2c error: -19 [ 0.476379] omap_i2c 48060000.i2c: bus 2 rev0.11 at 100 kHz [ 0.477294] omap_i2c 48350000.i2c: did not get pins for i2c error: -19 [ 0.477996] omap_i2c 48350000.i2c: bus 3 rev0.11 at 400 kHz [ 0.483398] Switching to clocksource 32k_counter This happens because omap4 panda dts file is not adapted to use i2c through pinctrl framework. Populating i2c pinctrl data to get rid of the error. Tested on omap4460 panda with 3.8-rc6 kernel. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reported-by: Luciano Coelho <coelho@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap5-evm: Add I2c pinctrl dataSourav Poddar
Booting 3.8-rc6 on omap 5430evm results in the following error omap_i2c 48070000.i2c: did not get pins for i2c error: -19 [ 1.024261] omap_i2c 48070000.i2c: bus 0 rev0.12 at 100 kHz [ 1.030181] omap_i2c 48072000.i2c: did not get pins for i2c error: -19 [ 1.037384] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz [ 1.043762] omap_i2c 48060000.i2c: did not get pins for i2c error: -19 [ 1.050964] omap_i2c 48060000.i2c: bus 2 rev0.12 at 100 kHz [ 1.056823] omap_i2c 4807a000.i2c: did not get pins for i2c error: -19 [ 1.064025] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz This happens because omap5 dts file is not adapted to use i2c through pinctrl framework. Populating i2c pinctrl data to get rid of the error. Tested on omap5430 evm with 3.8-rc6 kernel. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap3-overo: Add audio supportFlorian Vaussard
Add the needed sections to enable audio support on Overo. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap4-sdp: Add I2c pinctrl dataSourav Poddar
Booting 3.8-rc6 on omap 4430sdp results in the following error omap_i2c 48070000.i2c: did not get pins for i2c error: -19 [ 1.024261] omap_i2c 48070000.i2c: bus 0 rev0.12 at 100 kHz [ 1.030181] omap_i2c 48072000.i2c: did not get pins for i2c error: -19 [ 1.037384] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz [ 1.043762] omap_i2c 48060000.i2c: did not get pins for i2c error: -19 [ 1.050964] omap_i2c 48060000.i2c: bus 2 rev0.12 at 100 kHz [ 1.056823] omap_i2c 4807a000.i2c: did not get pins for i2c error: -19 [ 1.064025] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz This happens because omap4 dts file is not adapted to use i2c through pinctrl framework. Populating i2c pinctrl data to get rid of the error. Tested on omap4430 sdp with 3.8-rc6 kernel. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap3-overo: Add support for pwm-ledsFlorian Vaussard
Convert the on-board LED connected to the TWL4030 (LEDB) to use pwm-leds. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap4-sdp: Add support for pwm-backlightPeter Ujfalusi
Section to describe the backlight for the LCD panels. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap4-sdp: Add support for pwm-leds (keypad and charging LED)Peter Ujfalusi
Sections to describe the pwm-leds in the system. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap3-beagle-xm: Use pwm-leds for pmu_stat LEDPeter Ujfalusi
We have proper driver stack to handle the pmu_stat LED which is connected PWMB of twl4030. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: twl6030: Add PWM supportPeter Ujfalusi
Enable support for the PWMs and LED as PWM drivers. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: twl4030: Add PWM supportPeter Ujfalusi
Enable support for the PWMs and LEDs as PWM drivers. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: AM33XX: Add memory resource to d_can nodeAnilKumar Ch
Add a new address space/memory resource to d_can device tree node. D_CAN RAM initialization is achieved through RAMINIT register which is part of AM33XX control module address space. D_CAN RAM init or de-init should be done by writing instance corresponding value to control module register. Till we have a separate control module driver to write to control module, d_can driver will handle the register writes to control module by itself. So a new address space to represent this control module register is added to d_can driver. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: AM33XX: Add d_can instances to aliasesAnilKumar Ch
Add d_can instances to aliases node to get the D_CAN instance number from the driver. To initialize D_CAN message RAM, corresponding instance number is required. To initialize instance 0 message RAM then 0x1 should be written and for instance 1 message RAM, 0x2 should be written to control module register. With device-tree framework ip instance number is "-1" by default for all instances. To get device id/instance number then modules should be added to DT "aliases" node. of_alias_get_id() gives the device id number based on number of alias nodes present in "aliases node". Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap3-igep: Add uart1 and uart2 to igep boardsMatthias Brugger
This is a follow-up to Javier Martinez effort adding initial device tree support to IGEP technology devices [1]. It adds uart1 and uart2 bindings to the generic dtsi for the IGEP boards. [1] http://www.spinics.net/lists/linux-omap/msg83409.html Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap3: Add support for IGEP COM ModuleJavier Martinez Canillas
ISEE IGEP COM Module is an TI OMAP3 SoC computer on module. This patch adds an initial device tree support to boot an IGEP COM Module from the MMC/SD. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> [b-cousson@ti.com: Update the Makefile for 3.8-rc2] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap3: Add support for IGEPv2 boardJavier Martinez Canillas
ISEE IGEPv2 is an TI OMAP3 SoC based embedded board. This patch adds an initial device tree support to boot an IGEPv2 from the MMC/SD. Currently is working everything that is supported by DT on OMAP3 SoCs (MMC/SD, GPIO LEDs, EEPROM, TWL4030 audio). Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> [benoit.cousson@linaro.org: Update the Makefile for 3.8-rc2] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: omap3: Add generic DT support for IGEP devicesJavier Martinez Canillas
Add a generic .dtsi device tree source file for the common characteristics across IGEP Technology devices. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09ARM: dts: AM33XX: Rename I2C and GPIO nodesAnilKumar Ch
Rename I2C and GPIO nodes according to AM33XX TRM. According to AM33XX TRM device instances are starting from "0" like i2c0, i2c1 and i2c3. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> [panto@antoniou-consulting.com: initial patch by pantelis's] Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09Merge tag 'omap-devel-b-for-3.10' of ↵Benoit Cousson
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into for_3.10/dts_merged
2013-04-02ARM: dts: omap3-beagle: Add USB Host supportRoger Quadros
Provide RESET and Power regulators for the USB PHY, the USB Host port mode and the PHY device. Also provide pin multiplexer information for USB host pins. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: dts: OMAP3: Add HS USB Host IP nodesRoger Quadros
Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: dts: OMAP4: Add HS USB Host IP nodesRoger Quadros
Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP: zoom: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP3: overo: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP3: omap3touchbook: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP3: omap3stalker: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP3: omap3pandora: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulator and NOP PHY device. VAUX2 supplies the PHY's VCC. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP3: omap3evm: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. VAUX2 supplies the PHY's VCC. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP3: igep0020: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP: devkit8000: Adapt to ehci-omap changesRoger Quadros
Remove deprecated USBHS platform data. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP3: cm-t3517: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP3: cm-t35: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP: AM3517evm: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP: AM3517crane: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's VCC and RESET regulators and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP3: 3630SDP: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP3: 3430SDP: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP3: Beagle: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's VCC and RESET regulators and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP2+: omap4panda: Adapt to ehci-omap changesRoger Quadros
Use usbhs_init_phys() to register the PHY's VCC and RESET regulators and the NOP PHY device. Get rid of managing the PHY clock as it will be done by the PHY driver. For that to work we create a clock alias that links the PHY clock name to the PHY device name. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-04-02ARM: OMAP2+: omap-usb-host: Add usbhs_init_phys()Roger Quadros
This helper allows board support code to add the PHY's VCC and RESET regulators which are GPIO controlled as well as the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-31ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypassRajendra Nayak
omap3_noncore_dpll_set_rate() attempts an enable of bypass clk as well as ref clk for every .set_rate attempt on a noncore DPLL, regardless of whether the .set_rate results in the DPLL being locked or put in bypass. Early at boot, while some of these DPLLs are programmed and locked (using .set_rate for the DPLL), this causes an ordering issue. For instance, on OMAP5, the USB DPLL derives its bypass clk from ABE DPLL. If a .set_rate of USB DPLL which programmes the M,N and locks it is called before the one for ABE, the enable of USB bypass clk (derived from ABE DPLL) then attempts to lock the ABE DPLL and fails as the M,N values for ABE are yet to be programmed. To get rid of this ordering needs, enable bypass clk for a DPLL as part of its .set_rate only when its being put in bypass, and only enable the ref clk when its locked. Reported-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-03-31ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0Paul Walmsley
_pwrdm_save_clkdm_state_and_activate() tried to test one of its unsigned arguments to determine whether it was less than zero. Fix by moving the error test to the caller. Reported-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-03-31ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flagRajendra Nayak
_HWMOD_WAKEUP_ENABLED is currently unused across the hwmod framework. Just get rid of it, so we have one less flag to worry about. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-03-31ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clkVaibhav Hiremath
WDT1 module can take one of the below clocks as input functional clock - - On-Chip 32K RC Osc [default/reset] - 32K from PRCM The On-Chip 32K RC Osc clock is not an accurate clock-source as per the design/spec, so as a result, for example, timer which supposed to get expired @60Sec, but will expire somewhere ~@40Sec, which is not expected by any use-case. The solution here is to switch the input clock-source to PRCM generated 32K clock-source during boot-time itself. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Benoit Cousson <benoit.cousson@linaro.org> Cc: Paul Walmsley <paul@pwsan.com>
2013-03-31ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entryVaibhav Hiremath
This patch adds sysc definitions to the wdt1 hwmod entry, which in-turn makes sure that sysc idle bit-fields are configured to valid state on enable/disable callbacks. With the recent submitted patch from Santosh Shilimkar, "ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc" (commit: 4a98c2d89), it is required to add sysconf information to each valid hwmod entry, else device will not be come out from idle state properly and leads to below kernel crash - [2.190237] Unhandled fault: external abort on non-linefetch (0x1028) at 0xf9e35034 [2.198325] Internal error: : 1028 [#1] SMP ARM [2.203101] Modules linked in: [2.206334] CPU: 0 Not tainted (3.9.0-rc3-00059-gd114294#1) [2.212679] PC is at omap_wdt_disable.clone.5+0xc/0x60 [2.218090] LR is at omap_wdt_probe+0x184/0x1fc Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Benoit Cousson <benoit.cousson@linaro.org> Cc: Paul Walmsley <paul@pwsan.com>
2013-03-29ia64 idle: delete stale (*idle)() function pointerLen Brown
Commit 3e7fc708eb41 ("ia64 idle: delete pm_idle") in 3.9-rc1 didn't finish the job, leaving an un-initialized reference to (*idle)(). [ Haven't seen a crash from this - but seems like we are just being lucky that "idle" is zero so it does get initialized before we jump to randomland - Len ] Reported-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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