Age | Commit message (Collapse) | Author |
|
These changes have no effect if CONFIG_GCOV_KERNEL is not set in
defconfig. It is easier to trigger GCOV for kernel if this patch
is in by only setting the before mentioned flag.
Change-Id: I8aade309da2da62c4b3889bd84e4123ba8f182da
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/62999
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Rebase-Id: R4c238f707f1db600f188ae83426336753992b7be
|
|
Based on work by George G. Davis <gdavis@mvista.com>.
See http://lwn.net/Articles/390419/
Change-Id: I8df700d20a154e179f8cf6cdfe4015efc5d384f2
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/62998
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: R2607a46c8bd1e521abe44a57a5ccf7317333d6c9
|
|
Based on work done for LTP in
http://ltp.cvs.sourceforge.net/viewvc/ltp/utils/analysis/gcov-kernel
Patch originates from Motorola kernel team (mkw348@motorola.com).
Change-Id: Ibb2a7c8afd79051e8d6c7fde83f04745be14f5fd
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/62997
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: R67557d023bc94fbe900bfc9deef2f5de9955ea43
|
|
Perform sync point interrupt registration only when CONFIG_TEGRA_GRHOST
is enabled.
Reviewed-on: http://git-master/r/62719
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
(cherry picked from commit 0f1a8ad77749a1abee7893b7a1a8829a95a4711f)
Change-Id: I8749abc918247f4bda0332c02908741caeb08608
Reviewed-on: http://git-master/r/63415
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R94f39f55f13637998ea41456621b67adc506130a
|
|
Update Tegra3 CPU clock rate after G=>LP mode switch is completed to
synchronize with cpufreq target rate.
(cherry picked from commit 870d21e5e23eff476cdd841b4ce2605393d638ef)
(cherry picked from commit 11b20d7d6206c557f00e3f7a40dec1d498345d79)
Change-Id: I62237b8d34be23a8d903937f2ebb2d395c5db1b9
Reviewed-on: http://git-master/r/63359
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rdd1548389896521fddb2e239d6236706eb102f73
|
|
Bug 841336
(cherry picked from commit b4cd14d5b9d1b2011a7752b6c52b3b64eb227cdb)
(cherry picked from commit 24cefb5d699db0a53b9fb3dd7cbe41de93c44e8e)
Change-Id: I080b04577697f31d9f9d4e96213630a28844a7db
Reviewed-on: http://git-master/r/63358
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R332edca05c942d8698353eb6817ad1acf0a5f8bf
|
|
Optimized Tegra3 VDD_CPU control when VDD_CPU target is set to zero,
which could happen only while CPU is in LP mode (and CPU regulator
output is turned off by side-band signal, anyway):
- Ignore VDD_CPU dependency on VDD_CORE while VDD_CPU target is zero
- Allow VDD_CPU one step change to zero (i.e., to minimum voltage set
by constraints) after entry to LP mode
- Allow VDD_CPU one step change to the predicted G mode target before
exit from LP mode
(cherry picked from commit 5826f3e28867207b5dad1c50795de8275d1af872)
(cherry picked from commit 79c531421dfc65e27af657fd12b64c4187c67827)
Change-Id: I3c469132034a431d2e9b8727d11d604c306122f1
Reviewed-on: http://git-master/r/63357
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R4c4f6e79decddb778f58cb5eef853a4c9d52ca94
|
|
Added dynamic self-refresh (DSR) field to Tegra3 EMC DFS table. This
field will be supported starting with table revision to 3.2, and it
will allow to enable/disable DSR for each table entry independently.
Bug 853990
(cherry picked from commit 6e225af7334d789ffac72542602913a0028d5eac)
(cherry picked from commit c7ebe73da695206a992088a4ba5a6cd7643ea333)
Change-Id: I212d5992067baffaaf5b2e1de25b103c7b1fb56a
Reviewed-on: http://git-master/r/63356
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R7261d49b023634a783ab2bd55f494112d0bac2a1
|
|
Added the range check into tegra_gpio_enable and tegra_gpio_disable
Bug 897387
Reviewed-on: http://git-master/r/62641
(cherry picked from commit 091b3906b2dd64cd58221e7e61a24a57dabad16c)
Change-Id: I9be8129397a1dccbea4a04f6b6ed7d4529bf45c3
Reviewed-on: http://git-master/r/63174
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rfaf0efdbc60208a56e4e4f073e3661ad1511694c
|
|
Supporting the different rails control through the external
control signal PWRREQ1 and PWRREQ2.
Reviewed-on: http://git-master/r/61898
(cherry picked from commit fc07ccae30b61a92fa0b77ee6b2b7c8d43176bbe)
Change-Id: Id6322ef251e4b87673d3a647efb1f0d74b8e0815
Reviewed-on: http://git-master/r/62912
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R687c186e89635a5bd4e3f399709cdf3520936a3f
|
|
Bug 841336
Reviewed-on: http://git-master/r/60546
(cherry picked from commit accf2b0e8cb96ac1cd9ea620081004c36673d761)
Change-Id: I07615da1f4bae5ebad75e46286701aaecba8b7f8
Reviewed-on: http://git-master/r/62774
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rf596b18fe295288ab4a392559b64fb1f5cc35e23
|
|
Earlier value of 75 had unnecessary double guardbanding.
Changed 90C row in EDP table down to 85C to get throttling alert.
Bug 862301
Reviewed-on: http://git-master/r/50544
(cherry picked from commit 9f2693a80274bcd9eb8e7424bca87f34cc190741)
Change-Id: If7204150013e7894fc310a2f7e8fd46baf11d869
Reviewed-on: http://git-master/r/62773
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R6ef35feeaad04bea897d9343d9d3a21a988f3dde
|
|
Bug 860231
Reviewed-on: http://git-master/r/46599
(cherry picked from commit 3a85d02f0d61f8d94b864716ce7f3f12e78d62a0)
Change-Id: I73d61b766bfa885ebcacbe9f2facd8fc64635903
Reviewed-on: http://git-master/r/62771
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R08596750b3d68357c435f690fb08c884d4da8650
|
|
Bug 844025
Reviewed-on: http://git-master/r/51443
(cherry picked from commit 1abdcb266a1fa22fd766549d5eddcca92e1fb17e)
Change-Id: Ie9b405482eebf40923f8de20c897f20bebdb84ba
Reviewed-on: http://git-master/r/61681
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R73990d76e2030664cb7cc6b6c7c36052f4c64bdb
|
|
Remove sdmmc clock overrides. SDMMC clocks
are properly configured without the clock
overrides.
Bug 887981
Change-Id: I1c07568e58e484c4a3a91240f0d1ed4b8a2c6fdd
Reviewed-on: http://git-master/r/63238
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: R0555f77217ef555507110b7626ce225be6bf5e35
|
|
Allowing 2% error in calculated baudrate when finding the best clock
source uart controller.
bug 896117
Change-Id: I08260a4d9c24d8303a1e176e8a871c90dfbe0825
Reviewed-on: http://git-master/r/62980
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rfc09a6aa7b2abf126ded97c87e8b46138cf30d18
|
|
The scan timeout of the continuous mode can be calculated based on
init delay, repeat delay, debounce count and number of active row.
It also depends on how many scan need to be done before kbc change
the mode from continuous to wakeup mode.
Providing mechanism to select the scan count from platform data
and calculating the scan timeout count based on above parameters.
bug 876712
Reviewed-on: http://git-master/r/62591
(cherry picked from commit 3360ed5be86a2afd6716bc5227cc39657efd35b2)
Change-Id: Ib9dc96b1cc201b7af0bd62a3ec7fe9a80791d796
Reviewed-on: http://git-master/r/63229
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: Rbcb685d34c5d00ebf1c79d356eb63e4584075447
|
|
Setting the number of scans to 30 by keyboard controller after
pressed key released.
Also setting repeat delay time to 1 clock.
bug 876712
Reviewed-on: http://git-master/r/62592
(cherry picked from commit 9afabbf3d72135346b02c9a2cf48e4793fb90d43)
Change-Id: Idec353b68fba82676655125acd7f3d78ff4d0d08
Reviewed-on: http://git-master/r/63198
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R20feaf7cd291cd2b404effad4c029dca1a21c57c
|
|
Flush needs to send error codes to user space instead of suppressing
them.
Bug 886411
Reviewed-on: http://git-master/r/62385
(cherry picked from commit 357f4f8c8cc31713a32a26488e7f2031e5fff842)
Change-Id: I56d7e602cb3d71a17df92a09ccbd58fc71145640
Reviewed-on: http://git-master/r/63227
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rdbad35676df437b9521a8e6978510f73e7aa3844
|
|
Set correct power state for modules during boot-up. This is done by
splitting nvhost_module_init() into two parts: preinit and init. Preinit
sets correct power state, and is called for all modules during boot-up.
Init calls pre-init and performs the rest of initialization of
nvhost_module structure.
Bug 855755
Reviewed-on: http://git-master/r/62102
(cherry picked from commit 003df5ddd4fcffca9b7456cdb1150cfc041f406c)
Conflicts:
drivers/video/tegra/host/nvhost_acm.c
Change-Id: I14e5c4cf5d2c0c79a7492ffa98992329c045a9f5
Reviewed-on: http://git-master/r/63226
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R5281ee0c00489c5fb26a602ec49498f8cc018e95
|
|
Enable power gating for MPE and 3D in T30.
Bug 857044
Reviewed-on: http://git-master/r/62101
(cherry picked from commit 4fd4d2a948450f04181179f5f1e4da7b6c9e3060)
Change-Id: I031324f6d45afc11cb056fa0f26932f7f7767417
Reviewed-on: http://git-master/r/63225
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R96f7986af5b534d8db0ff2a1f119f5f783d6ed44
|
|
Do not access the timeout struct during context save. The timeout struct
is part of userctx, and it might be already deallocated.
Bug 896579
Change-Id: Id72931aa7350e0219d64f8c6f4dcc8d6847f5cb9
Reviewed-on: http://git-master/r/63207
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Raab50bca6333ac72e1383851ce0e7cf01731f3ec
|
|
sclk and emc clock is disabled from nvavp_halt_avp. nvavp_halt_avp
is called from probe where clocks are not enabled.
Disable sclk and emc clock from nvavp_uninit instead of
nvavp_halt_avp.
Change-Id: Idc4a1b629d9fc8048b97d41bc5463db6efa97eab
Reviewed-on: http://git-master/r/62862
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R2ed9e3e77cd188e52912d3d2e808398233644e6a
|
|
Adding a new quirk tag to prevent ACM driver taking over the interfaces
of a device which is not a real ACM device.
Bug 860566
Reviewed-on: http://git-master/r/55303
(cherry picked from commit 354c48f813fad182d9ce2c2fcf404d89f75e46cf)
Change-Id: I951328549980cf0b284907ef8e216acf9b2a8c59
Reviewed-on: http://git-master/r/62776
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R8fbe1a32c92114407783f9745616ed8304676b49
|
|
1) configuring pinmux
2) create pn544_i2c_platform_data
3) register i2c device info using i2c_register_board_info
Bug 846684
Bug 873017
Change-Id: I6cc370d3ee6cc5df6b75db19bb719275e465f344
Reviewed-on: http://git-master/r/62746
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R334a9cc8f86c90214b2415b3b855d5f234ad7a11
|
|
Use module variable to allow dynamic configuration of number
of RAW-IP network interfaces.
BUG 853232
Reviewed-on: http://git-master/r/59447
(cherry picked from commit 0fbbd5191c3f1bcd873a2f13edeb63050dab33c1)
Change-Id: Ic53ba7a4f937b0d0def24129965be38cadcf774a
Reviewed-on: http://git-master/r/62736
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R5f366227cd990e0101a37b85097afa87a9619b06
|
|
Cancel pending rx urbs during suspend, and resubmit
rx urbs after resume.
BUG 853232
Reviewed-on: http://git-master/r/52855
(cherry picked from commit 6af7fd6d2d43455f2ca54dcacd2f46197410c578)
Change-Id: I33d4cb5180e2e9590a8f58103c83e0d5d5f182fc
Reviewed-on: http://git-master/r/62735
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R1ad5e21ee2513aa977d96d7e3ae89d80c69fbb28
|
|
XMM modem baseband character driver, which is used to download
modem software, had race condition. If USB host stack has
not enumerated XMM modem boot rom yet, then driver aborts module
load.
With this change, I/O (such as downloading modem software) will
be delayed until USB host stack has enumerated modem boot rom.
BUG 828389
Reviewed-on: http://git-master/r/58870
(cherry picked from commit 22a5122689ab957fd0236cf2fcf1623dac82ab69)
Change-Id: Ib858363b11ea41d40218ed9ed044012421209371
Reviewed-on: http://git-master/r/62734
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Re7857218c723d3c43072f17ccf5ffc70a7faf163
|
|
control firmware download and VEN using gpio
Bug 846684
Bug 873017
Change-Id: I58391ac60e1b9cf440a186c155f993c9293f8223
Reviewed-on: http://git-master/r/62702
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R74ce3100c395b696c347fce4b4c9f5913aae3717
|
|
1. Code cleaning so it can compile
2. changes in pn544 driver to condition use of
firmware download gpio
bug 846684
bug 873017
Reviewed-on: http://git-master/r/57329
(cherry picked from commit ddde05ce297da3038a770d575bc27bdfe7444c35)
Change-Id: I1381fca040bd4bcc51a6a6a43cd33297a697c27e
Reviewed-on: http://git-master/r/62699
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R2b25ef5ee689076ebca99d13e5a23b1f0cc4da98
|
|
Bug 846684
Bug 873017
Reviewed-on: http://git-master/r/55880
(cherry picked from commit 9ed3de486a47dfc8598e73157bccd76ff518048b)
Change-Id: If85503592945bd5967e03ab429f5973dac0c65f7
Reviewed-on: http://git-master/r/62696
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R75e0a2682ffd4d007722eaabe19c9cb20d27a9b7
|
|
Bug 872652
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Change-Id: I1813c9a26396819da54fdcf5566078f77a11f40a
Reviewed-on: http://git-master/r/62518
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Re520964ead6b378773bb7f76738e0e1de19cc538
|
|
Use DSP mode for playback and capture on Tegra20 platforms.
Bug 872652
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Change-Id: Ib612702a300c454d262a8d69ab59f1ac0e64c79f
Reviewed-on: http://git-master/r/62513
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R1d74ddf730b97c881e37747e86b9c25c0a13e74a
|
|
Use DSP mode for playback and capture on Tegra20 platforms.
Bug 872652
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Change-Id: Iddf6d3b5dc83d509ddf857a8c3b0bb0ec13d9879
Reviewed-on: http://git-master/r/62512
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R48dbdcdad6191f354a63c4a01fb33668c43ac28a
|
|
Program I2s and AHUB CIF channel counts based on hw params instead of
always setting CIF channel count to 2.
Bug 872652
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Change-Id: I683e976d330ab001a36df6c368bb37fa733a788e
Reviewed-on: http://git-master/r/62502
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R1dbcdb946b95060a07a1744b4714e2588901f15d
|
|
Increase minimum loop count when checking for stuck syncpoint,
before triggering debug_dump()->BUG_ON(), to account for some
lengthy context-save operations. Now increased to
15 loops * 2s wait (SYNCPT_CHECK_PERIOD) per loop.
(Wait per loop may be less depending on user-specified timeout
for nvhost_syncpt_wait_timeout().)
Bug 834337
Change-Id: I1029b6359c1bb8e08f389c211641798fefa92d75
Reviewed-on: http://git-master/r/61412
Tested-by: Gerrit_Virtual_Submit
(cherry picked from commit 5b13d80dc21855c52f53a67471453ea6e95e61f9)
Reviewed-on: http://git-master/r/62370
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: Rfcf833e15c597a5684a3d44e923d64ef12ec4b5a
|
|
Add listing of wait bases and their values to debug output.
Reviewed-on: http://git-master/r/60389
(cherry picked from commit 16afc5516433d4a66d838c5a339ab8c07f4b42fa)
Change-Id: I70a82944cb39e65ce409169d5aa00bafb343a9b6
Reviewed-on: http://git-master/r/62369
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: R505b4dcfd6912e99ac44ec938f8be1b1574b2b05
|
|
Add locking and checking for error codes to the output of
tegra_host/status debugfs entry, and clearing of freed memory.
Bug 840976
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/60231
(cherry picked from commit 811a722b7fe3e21357a8aa7b6cfb8b9f552b7de7)
Conflicts:
drivers/video/tegra/host/t20/cdma_t20.c
Change-Id: Ic6984b704c1a5c0cb940090688641bf1fbc6b568
Reviewed-on: http://git-master/r/62360
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R61c642424e674b141291d02479d11339e4b1cd95
|
|
Add opcodes to synchronize the wait base for each channel at the
beginning of each submit. This adds robustness towards misbehaving user
space.
Context clear for robustness clears the opcodes for synchronizing the
wait base. This change also removes that part of robustness.
Bug 886411
Reviewed-on: http://git-master/r/60423
(cherry picked from commit c3740abf73ef6b7fd9b7de5bc4b6615ba25adf5e)
Change-Id: I67dfe3d2303ea373e3119be49a568d64932d8016
Reviewed-on: http://git-master/r/62359
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: R842ee4eee4b738d012eb065ac71448fd2684ca66
|
|
Add hwctx pointer to timeout structure. This makes sure the correct
hardware context is cleared.
Bug 886411
Change-Id: Ia5541add0b9af5bbc2f1264d33bcdc549bc99650
Reviewed-on: http://git-master/r/61449
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
(cherry picked from commit 7e2fb5bb2985373e869079ee7c628c1694216f21)
Reviewed-on: http://git-master/r/62358
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: Rf5b8d8d00442ec20726bbdc3337abbc4aa54f8fc
|
|
Add extra syncpt debug info and kernel panic when device stuck
waiting at syncpts.
Tested by inducing syncpt stuck-wait by bypassing nvhost_syncpt-
_cpu_incr.
Bug 822880
Bug 820056
Bug 818058
Bug 810463
Bug 803452
Reviewed-on: http://git-master/r/60206
(cherry picked from commit e73caae974f43ac5bf30589fc3cbc1fa66df926e)
Conflicts:
drivers/video/tegra/host/nvhost_syncpt.h
Change-Id: I648d92931cd26fddface2be557bffe8759c22753
Reviewed-on: http://git-master/r/62357
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: R62d49b050f565e0a581530bf2342eb65931da9a8
|
|
Add support for Tegra20 I2s PCM mode which is required for playback or
record through BT SCO interface.
Bug 872652
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Change-Id: Ia4ba1fc308f2e8adb3697ae600a1664aa14467e9
Reviewed-on: http://git-master/r/61232
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R058f7951f0d4bdb5cfe4d997326a2456cc8b105c
|
|
fixed bug in scale up timing, improved idle time reporting and
scaling parameters.
Reviewed-on: http://git-master/r/55849
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Tested-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
(cherry picked from commit b73fc6951192a2c80ed8d22f7ca4739b6e1e46de)
Change-Id: I6a04eb9ce789c475a461e9cc7306d679f209ed97
Reviewed-on: http://git-master/r/60443
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Tested-by: Ilan Aelion <iaelion@nvidia.com>
Rebase-Id: Rf34f9567d9b39ebd2e18742c8e3543d144b2de6f
|
|
Disabling usb3 as it is not used on enterprise.
Bug 885298
Reviewed-on: http://git-master/r/57201
(cherry picked from commit a74f09883bd09355e1b4e8c322dff279f8505b5b)
Change-Id: I77c00284ea8dd96a39aa267a0a6784cb8caf3a7a
Reviewed-on: http://git-master/r/63257
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R8f0f9a693ec579e50658e97e4198c6b243455903
|
|
Increasing RX DMA buffer size to 16K.
Bug 819411
Reviewed-on: http://git-master/r/49810
(cherry picked from commit 642eac7b9c8994b42d32a0c3794d0bb2194e62c0)
Change-Id: I529c1216597227fe1c10ffb34b95fc66de1c5340
Reviewed-on: http://git-master/r/62414
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R9f774269c0b45dda4fc12aadd7b85eeeea7a7626
|
|
The ramp voltage for the ldo3 for PM269 is around 1mV/us.
Setting this value.
bug 872382
Reviewed-on: http://git-master/r/51364
(cherry picked from commit aa84b06982dbea58b815fc99bbbf84c7bdaddc78)
Change-Id: I2b7cd8883c06250490c3e27dd28384985706aa68
Reviewed-on: http://git-master/r/62341
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R74b6d629197cc9b1cc591a4ac318f7105c7f28c5
|
|
Check for nct1008 status busy bit before reading temperature
Reviewed-on: http://git-master/r/#change,56945
(cherry picked from commit 5a258b6567797bb402fe65ae01770bd593420431)
Reviewed-on: http://git-master/r/61750
(cherry picked from commit 20706ea39f7793567230faab86cbc4dcb107d1aa)
Change-Id: If275f8f4449cc39c73b7d9fa4b9b610db8d0fa7b
Reviewed-on: http://git-master/r/62327
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: Rbdc6b7f88fcb59ec3928505a4446a32c13ed683b
|
|
Registering gpadc driver through tps80031.
bug 872697
Reviewed-on: http://git-master/r/56986
(cherry picked from commit 95f9948f31f1ce0862821830bb348cbe027cfcaf)
Change-Id: I07942d3aac247b12e0e0cb344ed292bbae4caf78
Reviewed-on: http://git-master/r/61859
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R5871b51c9f335e6b1843c40c6882e24642813a28
|
|
OTG host register/unregister functions were duplicated identically
across all board files, making the code difficult to maintain (and
actually some boards did not get all some code fixes leading to the same
bug being met again and again). This patch moves this common code into
tegra-otg.c.
Bug 884315
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Change-Id: I99b118664f0481f6c5470411b43f36609e0feb52
Reviewed-on: http://git-master/r/61763
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R0f6060514c017946cc9ae2ba2f04a1c134d14d9b
|
|
Removing the old/deprecated spi slave driver.
Change-Id: Ie9b05d03dfe183dd1f4c926d55d746ebcb2b0f6d
Reviewed-on: http://git-master/r/62979
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: R7934a311a878811232d798f7d8d59f7561e4a5c8
|