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-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c4
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c21
-rw-r--r--arch/arm/mach-ep93xx/core.c2
-rw-r--r--arch/arm/mach-ns9xxx/irq.c22
-rw-r--r--arch/arm/mach-orion5x/addr-map.c66
-rw-r--r--arch/arm/mach-orion5x/common.c11
-rw-r--r--arch/arm/mach-orion5x/common.h1
-rw-r--r--arch/arm/mach-pxa/Makefile12
-rw-r--r--arch/arm/mach-pxa/corgi.c4
-rw-r--r--arch/arm/mach-pxa/cpu-pxa.c310
-rw-r--r--arch/arm/mach-pxa/lubbock.c2
-rw-r--r--arch/arm/mach-pxa/pm.c10
-rw-r--r--arch/arm/mach-pxa/poodle.c2
-rw-r--r--arch/arm/mach-pxa/pxa25x.c11
-rw-r--r--arch/arm/mach-pxa/pxa27x.c11
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c7
-rw-r--r--arch/arm/mach-pxa/spitz.c2
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c3
-rw-r--r--arch/arm/mach-pxa/tosa.c2
-rw-r--r--arch/arm/mach-sa1100/pm.c8
-rw-r--r--arch/arm/plat-s3c24xx/clock.c4
-rw-r--r--arch/blackfin/Kconfig18
-rw-r--r--arch/blackfin/kernel/asm-offsets.c3
-rw-r--r--arch/blackfin/kernel/fixed_code.S2
-rw-r--r--arch/blackfin/kernel/module.c37
-rw-r--r--arch/blackfin/kernel/process.c2
-rw-r--r--arch/blackfin/kernel/ptrace.c4
-rw-r--r--arch/blackfin/kernel/signal.c13
-rw-r--r--arch/blackfin/kernel/time-ts.c10
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c104
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c33
-rw-r--r--arch/blackfin/mach-bf533/boards/ezkit.c31
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c31
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c33
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c31
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c34
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c32
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c32
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c31
-rw-r--r--arch/blackfin/mach-common/Makefile5
-rw-r--r--arch/blackfin/mach-common/cpufreq.c26
-rw-r--r--arch/blackfin/mach-common/dpmc.c137
-rw-r--r--arch/blackfin/mach-common/dpmc_modes.S (renamed from arch/blackfin/mach-common/dpmc.S)27
-rw-r--r--arch/blackfin/mach-common/entry.S113
-rw-r--r--arch/cris/kernel/sys_cris.c19
-rw-r--r--arch/m32r/kernel/sys_m32r.c20
-rw-r--r--arch/m68k/kernel/traps.c17
-rw-r--r--arch/m68k/mac/config.c24
-rw-r--r--arch/m68knommu/Kconfig3
-rw-r--r--arch/m68knommu/kernel/vmlinux.lds.S10
-rw-r--r--arch/mips/au1000/common/Makefile7
-rw-r--r--arch/mips/au1000/common/au1xxx_irqmap.c145
-rw-r--r--arch/mips/au1000/common/clocks.c24
-rw-r--r--arch/mips/au1000/common/cputable.c5
-rw-r--r--arch/mips/au1000/common/dbdma.c389
-rw-r--r--arch/mips/au1000/common/dbg_io.c32
-rw-r--r--arch/mips/au1000/common/dma.c56
-rw-r--r--arch/mips/au1000/common/gpio.c6
-rw-r--r--arch/mips/au1000/common/irq.c6
-rw-r--r--arch/mips/au1000/common/pci.c11
-rw-r--r--arch/mips/au1000/common/platform.c11
-rw-r--r--arch/mips/au1000/common/power.c157
-rw-r--r--arch/mips/au1000/common/prom.c21
-rw-r--r--arch/mips/au1000/common/puts.c35
-rw-r--r--arch/mips/au1000/common/reset.c33
-rw-r--r--arch/mips/au1000/common/setup.c60
-rw-r--r--arch/mips/au1000/common/time.c78
-rw-r--r--arch/mips/au1000/db1x00/Makefile8
-rw-r--r--arch/mips/au1000/db1x00/board_setup.c61
-rw-r--r--arch/mips/au1000/db1x00/init.c11
-rw-r--r--arch/mips/au1000/db1x00/irqmap.c22
-rw-r--r--arch/mips/au1000/mtx-1/Makefile3
-rw-r--r--arch/mips/au1000/mtx-1/board_setup.c63
-rw-r--r--arch/mips/au1000/mtx-1/init.c11
-rw-r--r--arch/mips/au1000/mtx-1/irqmap.c18
-rw-r--r--arch/mips/au1000/mtx-1/platform.c3
-rw-r--r--arch/mips/au1000/pb1000/Makefile8
-rw-r--r--arch/mips/au1000/pb1000/board_setup.c117
-rw-r--r--arch/mips/au1000/pb1000/init.c20
-rw-r--r--arch/mips/au1000/pb1100/Makefile6
-rw-r--r--arch/mips/au1000/pb1100/board_setup.c50
-rw-r--r--arch/mips/au1000/pb1100/init.c11
-rw-r--r--arch/mips/au1000/pb1100/irqmap.c10
-rw-r--r--arch/mips/au1000/pb1200/Makefile2
-rw-r--r--arch/mips/au1000/pb1200/board_setup.c139
-rw-r--r--arch/mips/au1000/pb1200/init.c18
-rw-r--r--arch/mips/au1000/pb1200/irqmap.c66
-rw-r--r--arch/mips/au1000/pb1500/Makefile6
-rw-r--r--arch/mips/au1000/pb1500/board_setup.c46
-rw-r--r--arch/mips/au1000/pb1500/init.c20
-rw-r--r--arch/mips/au1000/pb1500/irqmap.c6
-rw-r--r--arch/mips/au1000/pb1550/Makefile7
-rw-r--r--arch/mips/au1000/pb1550/board_setup.c16
-rw-r--r--arch/mips/au1000/pb1550/init.c20
-rw-r--r--arch/mips/au1000/pb1550/irqmap.c6
-rw-r--r--arch/mips/au1000/xxs1500/Makefile3
-rw-r--r--arch/mips/au1000/xxs1500/board_setup.c39
-rw-r--r--arch/mips/au1000/xxs1500/init.c11
-rw-r--r--arch/mips/au1000/xxs1500/irqmap.c2
-rw-r--r--arch/mips/emma2rh/markeins/setup.c7
-rw-r--r--arch/mips/kernel/Makefile2
-rw-r--r--arch/mips/kernel/cpu-bugs64.c2
-rw-r--r--arch/mips/kernel/irixelf.c11
-rw-r--r--arch/mips/kernel/kspd.c5
-rw-r--r--arch/mips/kernel/rtlx.c65
-rw-r--r--arch/mips/kernel/setup.c1
-rw-r--r--arch/mips/kernel/smp.c4
-rw-r--r--arch/mips/kernel/vpe.c29
-rw-r--r--arch/mips/mm/highmem.c1
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c6
-rw-r--r--arch/mips/pci/fixup-au1000.c7
-rw-r--r--arch/mips/pci/ops-au1000.c115
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c5
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c4
-rw-r--r--arch/mn10300/Kconfig11
-rw-r--r--arch/mn10300/boot/install.sh16
-rw-r--r--arch/parisc/mm/init.c2
-rw-r--r--arch/powerpc/boot/dts/sequoia.dts9
-rw-r--r--arch/powerpc/kernel/Makefile6
-rw-r--r--arch/powerpc/kernel/btext.c1
-rw-r--r--arch/powerpc/kernel/cputable.c53
-rw-r--r--arch/powerpc/kernel/head_44x.S9
-rw-r--r--arch/powerpc/kernel/head_64.S4
-rw-r--r--arch/powerpc/kernel/isa-bridge.c3
-rw-r--r--arch/powerpc/kernel/setup_64.c10
-rw-r--r--arch/powerpc/lib/Makefile1
-rw-r--r--arch/powerpc/lib/devres.c42
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c53
-rw-r--r--arch/powerpc/platforms/cell/spu_base.c31
-rw-r--r--arch/powerpc/platforms/cell/spu_priv1_mmio.c16
-rw-r--r--arch/powerpc/platforms/cell/spufs/fault.c17
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c10
-rw-r--r--arch/powerpc/platforms/cell/spufs/run.c38
-rw-r--r--arch/powerpc/platforms/cell/spufs/sched.c7
-rw-r--r--arch/powerpc/platforms/cell/spufs/spufs.h3
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c71
-rw-r--r--arch/powerpc/platforms/chrp/pegasos_eth.c4
-rw-r--r--arch/powerpc/platforms/pseries/scanlog.c19
-rw-r--r--arch/powerpc/sysdev/mv64x60_dev.c2
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c180
-rw-r--r--arch/powerpc/xmon/xmon.c6
-rw-r--r--arch/ppc/Makefile2
-rw-r--r--arch/ppc/kernel/ppc_ksyms.c1
-rw-r--r--arch/ppc/kernel/setup.c1
-rw-r--r--arch/ppc/platforms/residual.c1
-rw-r--r--arch/ppc/syslib/mv64x60.c3
-rw-r--r--arch/s390/Kconfig7
-rw-r--r--arch/s390/kernel/compat_wrapper.S2
-rw-r--r--arch/s390/kernel/entry.S29
-rw-r--r--arch/s390/kernel/entry64.S57
-rw-r--r--arch/s390/kernel/ptrace.c100
-rw-r--r--arch/s390/kvm/Kconfig1
-rw-r--r--arch/s390/kvm/intercept.c3
-rw-r--r--arch/s390/kvm/kvm-s390.c5
-rw-r--r--arch/s390/mm/Makefile1
-rw-r--r--arch/s390/mm/init.c3
-rw-r--r--arch/s390/mm/page-states.c79
-rw-r--r--arch/sh/Kconfig17
-rw-r--r--arch/sh/Kconfig.debug1
-rw-r--r--arch/sh/Makefile1
-rw-r--r--arch/sh/boards/mpc1211/Makefile8
-rw-r--r--arch/sh/boards/mpc1211/pci.c295
-rw-r--r--arch/sh/boards/mpc1211/rtc.c136
-rw-r--r--arch/sh/boards/mpc1211/setup.c347
-rw-r--r--arch/sh/boards/renesas/migor/setup.c11
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780mp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780rp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7785rp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/setup.c24
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/setup.c7
-rw-r--r--arch/sh/boards/se/7206/setup.c17
-rw-r--r--arch/sh/boards/se/7722/setup.c6
-rw-r--r--arch/sh/boot/compressed/Makefile_321
-rw-r--r--arch/sh/boot/compressed/Makefile_641
-rw-r--r--arch/sh/kernel/cpu/irq/intc-sh5.c73
-rw-r--r--arch/sh/kernel/cpu/irq/intc.c93
-rw-r--r--arch/sh/kernel/cpu/sh2a/fpu.c4
-rw-r--r--arch/sh/kernel/cpu/sh3/Makefile2
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh3.c71
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c22
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c32
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7710.c25
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c35
-rw-r--r--arch/sh/kernel/cpu/sh5/entry.S28
-rw-r--r--arch/sh/kernel/cpu/sh5/probe.c4
-rw-r--r--arch/sh/kernel/early_printk.c30
-rw-r--r--arch/sh/kernel/kgdb_stub.c8
-rw-r--r--arch/sh/kernel/setup.c46
-rw-r--r--arch/sh/kernel/sh_ksyms_32.c2
-rw-r--r--arch/sh/kernel/sh_ksyms_64.c26
-rw-r--r--arch/sh/kernel/time_64.c5
-rw-r--r--arch/sh/lib64/dbg.c2
-rw-r--r--arch/sh/mm/Makefile_647
-rw-r--r--arch/sh/mm/cache-sh5.c2
-rw-r--r--arch/sh/mm/ioremap_64.c2
-rw-r--r--arch/sh/mm/numa.c2
-rw-r--r--arch/sh/tools/mach-types1
-rw-r--r--arch/sparc/kernel/entry.S2
-rw-r--r--arch/sparc/kernel/process.c25
-rw-r--r--arch/sparc/kernel/ptrace.c6
-rw-r--r--arch/sparc/kernel/rtrap.S11
-rw-r--r--arch/sparc/kernel/signal.c84
-rw-r--r--arch/sparc/kernel/sys_sparc.c51
-rw-r--r--arch/sparc64/kernel/etrap.S7
-rw-r--r--arch/sparc64/kernel/process.c18
-rw-r--r--arch/sparc64/kernel/ptrace.c16
-rw-r--r--arch/sparc64/kernel/rtrap.S7
-rw-r--r--arch/sparc64/kernel/signal.c102
-rw-r--r--arch/sparc64/kernel/signal32.c57
-rw-r--r--arch/sparc64/kernel/smp.c27
-rw-r--r--arch/sparc64/kernel/sys_sparc.c40
-rw-r--r--arch/sparc64/kernel/sys_sparc32.c64
-rw-r--r--arch/sparc64/kernel/systbls.S2
-rw-r--r--arch/sparc64/mm/init.c32
-rw-r--r--arch/um/Kconfig.char6
-rw-r--r--arch/um/Makefile5
-rw-r--r--arch/um/drivers/chan_user.c1
-rw-r--r--arch/um/drivers/cow_sys.h2
-rw-r--r--arch/um/drivers/daemon_user.c4
-rw-r--r--arch/um/drivers/fd.c2
-rw-r--r--arch/um/drivers/hostaudio_kern.c2
-rw-r--r--arch/um/drivers/line.c4
-rw-r--r--arch/um/drivers/mcast_user.c3
-rw-r--r--arch/um/drivers/net_user.c2
-rw-r--r--arch/um/drivers/port_user.c2
-rw-r--r--arch/um/drivers/pty.c2
-rw-r--r--arch/um/drivers/random.c122
-rw-r--r--arch/um/drivers/slip_user.c2
-rw-r--r--arch/um/drivers/tty.c2
-rw-r--r--arch/um/drivers/ubd_kern.c4
-rw-r--r--arch/um/drivers/xterm.c2
-rw-r--r--arch/um/include/as-layout.h14
-rw-r--r--arch/um/include/line.h6
-rw-r--r--arch/um/include/os.h1
-rw-r--r--arch/um/include/process.h20
-rw-r--r--arch/um/include/skas_ptrace.h13
-rw-r--r--arch/um/include/sysdep-i386/ptrace_user.h30
-rw-r--r--arch/um/include/sysdep-i386/sigcontext.h2
-rw-r--r--arch/um/include/sysdep-x86_64/ptrace_user.h17
-rw-r--r--arch/um/include/um_malloc.h9
-rw-r--r--arch/um/kernel/dyn.lds.S7
-rw-r--r--arch/um/kernel/mem.c5
-rw-r--r--arch/um/kernel/time.c4
-rw-r--r--arch/um/kernel/um_arch.c7
-rw-r--r--arch/um/kernel/uml.lds.S7
-rw-r--r--arch/um/os-Linux/drivers/ethertap_user.c4
-rw-r--r--arch/um/os-Linux/helper.c4
-rw-r--r--arch/um/os-Linux/main.c2
-rw-r--r--arch/um/os-Linux/sigio.c39
-rw-r--r--arch/um/os-Linux/signal.c1
-rw-r--r--arch/um/os-Linux/skas/process.c2
-rw-r--r--arch/um/os-Linux/start_up.c81
-rw-r--r--arch/um/os-Linux/sys-i386/registers.c5
-rw-r--r--arch/um/os-Linux/time.c54
-rw-r--r--arch/um/sys-i386/ptrace.c30
-rw-r--r--arch/um/sys-i386/user-offsets.c2
-rw-r--r--arch/um/sys-x86_64/user-offsets.c1
-rw-r--r--arch/x86/Kconfig3
-rw-r--r--arch/x86/kernel/Makefile4
-rw-r--r--arch/x86/kernel/acpi/realmode/wakeup.lds.S10
-rw-r--r--arch/x86/kernel/cpu/addon_cpuid_features.c21
-rw-r--r--arch/x86/kernel/cpu/common.c27
-rw-r--r--arch/x86/kernel/geode_32.c19
-rw-r--r--arch/x86/kernel/i387.c12
-rw-r--r--arch/x86/kernel/pci-dma.c8
-rw-r--r--arch/x86/kernel/ptrace.c7
-rw-r--r--arch/x86/kernel/setup.c6
-rw-r--r--arch/x86/kernel/setup_32.c7
-rw-r--r--arch/x86/kernel/setup_64.c15
-rw-r--r--arch/x86/kernel/smp.c3
-rw-r--r--arch/x86/kernel/smpboot.c24
-rw-r--r--arch/x86/kernel/x8664_ksyms_64.c3
-rw-r--r--arch/x86/lib/csum-partial_64.c2
-rw-r--r--arch/x86/mm/init_32.c12
-rw-r--r--arch/x86/mm/pat.c54
-rw-r--r--arch/x86/mm/pgtable_32.c7
-rw-r--r--arch/x86/pci/acpi.c41
-rw-r--r--arch/x86/pci/common.c69
-rw-r--r--arch/x86/pci/fixup.c2
-rw-r--r--arch/x86/pci/i386.c4
-rw-r--r--arch/x86/pci/init.c4
-rw-r--r--arch/x86/pci/k8-bus_64.c8
-rw-r--r--arch/x86/pci/pci.h3
283 files changed, 3744 insertions, 3601 deletions
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 728bb8f39441..0babb645b83c 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -544,10 +544,10 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
struct resource *fb_res = &lcdc_resources[2];
size_t fb_len = fb_res->end - fb_res->start + 1;
- fb = ioremap_writecombine(fb_res->start, fb_len);
+ fb = ioremap(fb_res->start, fb_len);
if (fb) {
memset(fb, 0, fb_len);
- iounmap(fb, fb_len);
+ iounmap(fb);
}
}
lcdc_data = *data;
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 054689804e77..450db304936f 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -332,13 +332,6 @@ static struct resource lcdc_resources[] = {
.end = AT91SAM9RL_ID_LCDC,
.flags = IORESOURCE_IRQ,
},
-#if defined(CONFIG_FB_INTSRAM)
- [2] = {
- .start = AT91SAM9RL_SRAM_BASE,
- .end = AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
-#endif
};
static struct platform_device at91_lcdc_device = {
@@ -381,20 +374,6 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
-#ifdef CONFIG_FB_INTSRAM
- {
- void __iomem *fb;
- struct resource *fb_res = &lcdc_resources[2];
- size_t fb_len = fb_res->end - fb_res->start + 1;
-
- fb = ioremap_writecombine(fb_res->start, fb_len);
- if (fb) {
- memset(fb, 0, fb_len);
- iounmap(fb, fb_len);
- }
- }
-#endif
-
lcdc_data = *data;
platform_device_register(&at91_lcdc_device);
}
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 8bc187240542..1d7bca6aa441 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -280,7 +280,7 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
const int port = gpio >> 3;
const int port_mask = 1 << (gpio & 7);
- gpio_direction_output(gpio, gpio_get_value(gpio));
+ gpio_direction_input(gpio);
switch (type) {
case IRQT_RISING:
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 36e5835e6097..ca85d24cf39f 100644
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -62,7 +62,7 @@ static struct irq_chip ns9xxx_chip = {
#if 0
#define handle_irq handle_level_irq
#else
-void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
+static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
{
unsigned int cpu = smp_processor_id();
struct irqaction *action;
@@ -70,27 +70,35 @@ void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
spin_lock(&desc->lock);
- if (unlikely(desc->status & IRQ_INPROGRESS))
- goto out_unlock;
+ BUG_ON(desc->status & IRQ_INPROGRESS);
desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
kstat_cpu(cpu).irqs[irq]++;
action = desc->action;
if (unlikely(!action || (desc->status & IRQ_DISABLED)))
- goto out_unlock;
+ goto out_mask;
desc->status |= IRQ_INPROGRESS;
spin_unlock(&desc->lock);
action_ret = handle_IRQ_event(irq, action);
+ /* XXX: There is no direct way to access noirqdebug, so check
+ * unconditionally for spurious irqs...
+ * Maybe this function should go to kernel/irq/chip.c? */
+ note_interrupt(irq, desc, action_ret);
+
spin_lock(&desc->lock);
desc->status &= ~IRQ_INPROGRESS;
- if (!(desc->status & IRQ_DISABLED) && desc->chip->ack)
- desc->chip->ack(irq);
-out_unlock:
+ if (desc->status & IRQ_DISABLED)
+out_mask:
+ desc->chip->mask(irq);
+
+ /* ack unconditionally to unmask lower prio irqs */
+ desc->chip->ack(irq);
+
spin_unlock(&desc->lock);
}
#define handle_irq handle_prio_irq
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 9608503d67f5..e63fb05dc893 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -34,11 +34,7 @@
* Non-CPU Masters address decoding --
* Unlike the CPU, we setup the access from Orion's master interfaces to DDR
* banks only (the typical use case).
- * Setup access for each master to DDR is issued by common.c.
- *
- * Note: although orion_setbits() and orion_clrbits() are not atomic
- * no locking is necessary here since code in this file is only called
- * at boot time when there is no concurrency issues.
+ * Setup access for each master to DDR is issued by platform device setup.
*/
/*
@@ -48,10 +44,6 @@
#define TARGET_DEV_BUS 1
#define TARGET_PCI 3
#define TARGET_PCIE 4
-#define ATTR_DDR_CS(n) (((n) ==0) ? 0xe : \
- ((n) == 1) ? 0xd : \
- ((n) == 2) ? 0xb : \
- ((n) == 3) ? 0x7 : 0xf)
#define ATTR_PCIE_MEM 0x59
#define ATTR_PCIE_IO 0x51
#define ATTR_PCIE_WA 0x79
@@ -61,17 +53,12 @@
#define ATTR_DEV_CS1 0x1d
#define ATTR_DEV_CS2 0x1b
#define ATTR_DEV_BOOT 0xf
-#define WIN_EN 1
/*
* Helpers to get DDR bank info
*/
-#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) * 8))
-#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) * 8))
-#define DDR_MAX_CS 4
-#define DDR_REG_TO_SIZE(reg) (((reg) | 0xffffff) + 1)
-#define DDR_REG_TO_BASE(reg) ((reg) & 0xff000000)
-#define DDR_BANK_EN 1
+#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) << 3))
+#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) << 3))
/*
* CPU Address Decode Windows registers
@@ -81,17 +68,6 @@
#define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4))
#define CPU_WIN_REMAP_HI(n) ORION5X_BRIDGE_REG(0x00c | ((n) << 4))
-/*
- * Gigabit Ethernet Address Decode Windows registers
- */
-#define ETH_WIN_BASE(win) ORION5X_ETH_REG(0x200 + ((win) * 8))
-#define ETH_WIN_SIZE(win) ORION5X_ETH_REG(0x204 + ((win) * 8))
-#define ETH_WIN_REMAP(win) ORION5X_ETH_REG(0x280 + ((win) * 4))
-#define ETH_WIN_EN ORION5X_ETH_REG(0x290)
-#define ETH_WIN_PROT ORION5X_ETH_REG(0x294)
-#define ETH_MAX_WIN 6
-#define ETH_MAX_REMAP_WIN 4
-
struct mbus_dram_target_info orion5x_mbus_dram_info;
@@ -202,39 +178,3 @@ void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
{
setup_cpu_win(7, base, size, TARGET_PCIE, ATTR_PCIE_WA, -1);
}
-
-void __init orion5x_setup_eth_wins(void)
-{
- int i;
-
- /*
- * First, disable and clear windows
- */
- for (i = 0; i < ETH_MAX_WIN; i++) {
- orion5x_write(ETH_WIN_BASE(i), 0);
- orion5x_write(ETH_WIN_SIZE(i), 0);
- orion5x_setbits(ETH_WIN_EN, 1 << i);
- orion5x_clrbits(ETH_WIN_PROT, 0x3 << (i * 2));
- if (i < ETH_MAX_REMAP_WIN)
- orion5x_write(ETH_WIN_REMAP(i), 0);
- }
-
- /*
- * Setup windows for DDR banks.
- */
- for (i = 0; i < DDR_MAX_CS; i++) {
- u32 base, size;
- size = orion5x_read(DDR_SIZE_CS(i));
- base = orion5x_read(DDR_BASE_CS(i));
- if (size & DDR_BANK_EN) {
- base = DDR_REG_TO_BASE(base);
- size = DDR_REG_TO_SIZE(size);
- orion5x_write(ETH_WIN_SIZE(i), (size-1) & 0xffff0000);
- orion5x_write(ETH_WIN_BASE(i), (base & 0xffff0000) |
- (ATTR_DDR_CS(i) << 8) |
- TARGET_DDR);
- orion5x_clrbits(ETH_WIN_EN, 1 << i);
- orion5x_setbits(ETH_WIN_PROT, 0x3 << (i * 2));
- }
- }
-}
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 968deb58be01..4f13fd037f04 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -190,6 +190,11 @@ static struct platform_device orion5x_ehci1 = {
* (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
****************************************************************************/
+struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
+ .dram = &orion5x_mbus_dram_info,
+ .t_clk = ORION5X_TCLK,
+};
+
static struct resource orion5x_eth_shared_resources[] = {
{
.start = ORION5X_ETH_PHYS_BASE + 0x2000,
@@ -201,6 +206,9 @@ static struct resource orion5x_eth_shared_resources[] = {
static struct platform_device orion5x_eth_shared = {
.name = MV643XX_ETH_SHARED_NAME,
.id = 0,
+ .dev = {
+ .platform_data = &orion5x_eth_shared_data,
+ },
.num_resources = 1,
.resource = orion5x_eth_shared_resources,
};
@@ -223,7 +231,9 @@ static struct platform_device orion5x_eth = {
void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
{
+ eth_data->shared = &orion5x_eth_shared;
orion5x_eth.dev.platform_data = eth_data;
+
platform_device_register(&orion5x_eth_shared);
platform_device_register(&orion5x_eth);
}
@@ -360,7 +370,6 @@ void __init orion5x_init(void)
* Setup Orion address map
*/
orion5x_setup_cpu_mbus_bridge();
- orion5x_setup_eth_wins();
/*
* Register devices.
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 14adf8d1a54a..bd0f05de6e18 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -22,7 +22,6 @@ void orion5x_setup_dev0_win(u32 base, u32 size);
void orion5x_setup_dev1_win(u32 base, u32 size);
void orion5x_setup_dev2_win(u32 base, u32 size);
void orion5x_setup_pcie_wa_win(u32 base, u32 size);
-void orion5x_setup_eth_wins(void);
/*
* Shared code used internally by other Orion core functions.
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 6a830853aa6a..0e6d05bb81aa 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -5,6 +5,13 @@
# Common support (must be linked before board specific support)
obj-y += clock.o devices.o generic.o irq.o dma.o \
time.o gpio.o
+obj-$(CONFIG_PM) += pm.o sleep.o standby.o
+obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
+
+# Generic drivers that other drivers may depend upon
+obj-$(CONFIG_PXA_SSP) += ssp.o
+
+# SoC-specific code
obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa25x.o
obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa27x.o
obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o
@@ -48,11 +55,6 @@ led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o
obj-$(CONFIG_LEDS) += $(led-y)
-# Misc features
-obj-$(CONFIG_PM) += pm.o sleep.o standby.o
-obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
-obj-$(CONFIG_PXA_SSP) += ssp.o
-
ifeq ($(CONFIG_PCI),y)
obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o
endif
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 259ca821e464..b757dd756655 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -493,8 +493,6 @@ static struct platform_device *devices[] __initdata = {
static void corgi_poweroff(void)
{
- RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
if (!machine_is_corgi())
/* Green LED off tells the bootloader to halt */
reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
@@ -503,8 +501,6 @@ static void corgi_poweroff(void)
static void corgi_restart(char mode)
{
- RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
if (!machine_is_corgi())
/* Green LED on tells the bootloader to reboot */
set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpu-pxa.c
index 4b21479332ae..fb9ba1ab2826 100644
--- a/arch/arm/mach-pxa/cpu-pxa.c
+++ b/arch/arm/mach-pxa/cpu-pxa.c
@@ -49,125 +49,216 @@ MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
#define freq_debug 0
#endif
+static unsigned int pxa27x_maxfreq;
+module_param(pxa27x_maxfreq, uint, 0);
+MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz"
+ "(typically 624=>pxa270, 416=>pxa271, 520=>pxa272)");
+
typedef struct {
unsigned int khz;
unsigned int membus;
unsigned int cccr;
unsigned int div2;
+ unsigned int cclkcfg;
} pxa_freqs_t;
/* Define the refresh period in mSec for the SDRAM and the number of rows */
-#define SDRAM_TREF 64 /* standard 64ms SDRAM */
-#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */
-#define MDREFR_DRI(x) (((x) * SDRAM_TREF) / (SDRAM_ROWS * 32))
-
-#define CCLKCFG_TURBO 0x1
-#define CCLKCFG_FCS 0x2
-#define PXA25x_MIN_FREQ 99500
-#define PXA25x_MAX_FREQ 398100
-#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
-#define MDREFR_DRI_MASK 0xFFF
+#define SDRAM_TREF 64 /* standard 64ms SDRAM */
+#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */
+#define CCLKCFG_TURBO 0x1
+#define CCLKCFG_FCS 0x2
+#define CCLKCFG_HALFTURBO 0x4
+#define CCLKCFG_FASTBUS 0x8
+#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
+#define MDREFR_DRI_MASK 0xFFF
+/*
+ * PXA255 definitions
+ */
/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
+#define CCLKCFG CCLKCFG_TURBO | CCLKCFG_FCS
+
static pxa_freqs_t pxa255_run_freqs[] =
{
- /* CPU MEMBUS CCCR DIV2*/
- { 99500, 99500, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */
- {132700, 132700, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */
- {199100, 99500, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */
- {265400, 132700, 0x143, 1}, /* run=265, turbo=265, PXbus=133, SDRAM=66 */
- {331800, 165900, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */
- {398100, 99500, 0x161, 0}, /* run=398, turbo=398, PXbus=196, SDRAM=99 */
- {0,}
+ /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */
+ { 99500, 99500, 0x121, 1, CCLKCFG}, /* 99, 99, 50, 50 */
+ {132700, 132700, 0x123, 1, CCLKCFG}, /* 133, 133, 66, 66 */
+ {199100, 99500, 0x141, 0, CCLKCFG}, /* 199, 199, 99, 99 */
+ {265400, 132700, 0x143, 1, CCLKCFG}, /* 265, 265, 133, 66 */
+ {331800, 165900, 0x145, 1, CCLKCFG}, /* 331, 331, 166, 83 */
+ {398100, 99500, 0x161, 0, CCLKCFG}, /* 398, 398, 196, 99 */
};
-#define NUM_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
-
-static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1];
/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
static pxa_freqs_t pxa255_turbo_freqs[] =
{
- /* CPU MEMBUS CCCR DIV2*/
- { 99500, 99500, 0x121, 1}, /* run=99, turbo= 99, PXbus=50, SDRAM=50 */
- {199100, 99500, 0x221, 0}, /* run=99, turbo=199, PXbus=50, SDRAM=99 */
- {298500, 99500, 0x321, 0}, /* run=99, turbo=287, PXbus=50, SDRAM=99 */
- {298600, 99500, 0x1c1, 0}, /* run=199, turbo=287, PXbus=99, SDRAM=99 */
- {398100, 99500, 0x241, 0}, /* run=199, turbo=398, PXbus=99, SDRAM=99 */
- {0,}
+ /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */
+ { 99500, 99500, 0x121, 1, CCLKCFG}, /* 99, 99, 50, 50 */
+ {199100, 99500, 0x221, 0, CCLKCFG}, /* 99, 199, 50, 99 */
+ {298500, 99500, 0x321, 0, CCLKCFG}, /* 99, 287, 50, 99 */
+ {298600, 99500, 0x1c1, 0, CCLKCFG}, /* 199, 287, 99, 99 */
+ {398100, 99500, 0x241, 0, CCLKCFG}, /* 199, 398, 99, 99 */
+};
+
+#define NUM_PXA25x_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
+#define NUM_PXA25x_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs)
+
+static struct cpufreq_frequency_table
+ pxa255_run_freq_table[NUM_PXA25x_RUN_FREQS+1];
+static struct cpufreq_frequency_table
+ pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1];
+
+/*
+ * PXA270 definitions
+ *
+ * For the PXA27x:
+ * Control variables are A, L, 2N for CCCR; B, HT, T for CLKCFG.
+ *
+ * A = 0 => memory controller clock from table 3-7,
+ * A = 1 => memory controller clock = system bus clock
+ * Run mode frequency = 13 MHz * L
+ * Turbo mode frequency = 13 MHz * L * N
+ * System bus frequency = 13 MHz * L / (B + 1)
+ *
+ * In CCCR:
+ * A = 1
+ * L = 16 oscillator to run mode ratio
+ * 2N = 6 2 * (turbo mode to run mode ratio)
+ *
+ * In CCLKCFG:
+ * B = 1 Fast bus mode
+ * HT = 0 Half-Turbo mode
+ * T = 1 Turbo mode
+ *
+ * For now, just support some of the combinations in table 3-7 of
+ * PXA27x Processor Family Developer's Manual to simplify frequency
+ * change sequences.
+ */
+#define PXA27x_CCCR(A, L, N2) (A << 25 | N2 << 7 | L)
+#define CCLKCFG2(B, HT, T) \
+ (CCLKCFG_FCS | \
+ ((B) ? CCLKCFG_FASTBUS : 0) | \
+ ((HT) ? CCLKCFG_HALFTURBO : 0) | \
+ ((T) ? CCLKCFG_TURBO : 0))
+
+static pxa_freqs_t pxa27x_freqs[] = {
+ {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1)},
+ {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1)},
+ {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1)},
+ {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1)},
+ {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1)},
+ {520000, 208000, PXA27x_CCCR(1, 16, 5), 1, CCLKCFG2(1, 0, 1)},
+ {624000, 208000, PXA27x_CCCR(1, 16, 6), 1, CCLKCFG2(1, 0, 1)}
};
-#define NUM_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs)
-static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1];
+#define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs)
+static struct cpufreq_frequency_table
+ pxa27x_freq_table[NUM_PXA27x_FREQS+1];
extern unsigned get_clk_frequency_khz(int info);
+static void find_freq_tables(struct cpufreq_policy *policy,
+ struct cpufreq_frequency_table **freq_table,
+ pxa_freqs_t **pxa_freqs)
+{
+ if (cpu_is_pxa25x()) {
+ if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
+ *pxa_freqs = pxa255_run_freqs;
+ *freq_table = pxa255_run_freq_table;
+ } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
+ *pxa_freqs = pxa255_turbo_freqs;
+ *freq_table = pxa255_turbo_freq_table;
+ } else {
+ printk("CPU PXA: Unknown policy found. "
+ "Using CPUFREQ_POLICY_PERFORMANCE\n");
+ *pxa_freqs = pxa255_run_freqs;
+ *freq_table = pxa255_run_freq_table;
+ }
+ }
+ if (cpu_is_pxa27x()) {
+ *pxa_freqs = pxa27x_freqs;
+ *freq_table = pxa27x_freq_table;
+ }
+}
+
+static void pxa27x_guess_max_freq(void)
+{
+ if (!pxa27x_maxfreq) {
+ pxa27x_maxfreq = 416000;
+ printk(KERN_INFO "PXA CPU 27x max frequency not defined "
+ "(pxa27x_maxfreq), assuming pxa271 with %dkHz maxfreq\n",
+ pxa27x_maxfreq);
+ } else {
+ pxa27x_maxfreq *= 1000;
+ }
+}
+
+static u32 mdrefr_dri(unsigned int freq)
+{
+ u32 dri = 0;
+
+ if (cpu_is_pxa25x())
+ dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS * 32));
+ if (cpu_is_pxa27x())
+ dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS - 31)) / 32;
+ return dri;
+}
+
/* find a valid frequency point */
static int pxa_verify_policy(struct cpufreq_policy *policy)
{
struct cpufreq_frequency_table *pxa_freqs_table;
+ pxa_freqs_t *pxa_freqs;
int ret;
- if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
- pxa_freqs_table = pxa255_run_freq_table;
- } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
- pxa_freqs_table = pxa255_turbo_freq_table;
- } else {
- printk("CPU PXA: Unknown policy found. "
- "Using CPUFREQ_POLICY_PERFORMANCE\n");
- pxa_freqs_table = pxa255_run_freq_table;
- }
-
+ find_freq_tables(policy, &pxa_freqs_table, &pxa_freqs);
ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table);
if (freq_debug)
pr_debug("Verified CPU policy: %dKhz min to %dKhz max\n",
- policy->min, policy->max);
+ policy->min, policy->max);
return ret;
}
+static unsigned int pxa_cpufreq_get(unsigned int cpu)
+{
+ return get_clk_frequency_khz(0);
+}
+
static int pxa_set_target(struct cpufreq_policy *policy,
- unsigned int target_freq,
- unsigned int relation)
+ unsigned int target_freq,
+ unsigned int relation)
{
struct cpufreq_frequency_table *pxa_freqs_table;
pxa_freqs_t *pxa_freq_settings;
struct cpufreq_freqs freqs;
unsigned int idx;
unsigned long flags;
- unsigned int unused, preset_mdrefr, postset_mdrefr;
- void *ramstart = phys_to_virt(0xa0000000);
+ unsigned int new_freq_cpu, new_freq_mem;
+ unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg;
/* Get the current policy */
- if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
- pxa_freq_settings = pxa255_run_freqs;
- pxa_freqs_table = pxa255_run_freq_table;
- } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
- pxa_freq_settings = pxa255_turbo_freqs;
- pxa_freqs_table = pxa255_turbo_freq_table;
- } else {
- printk("CPU PXA: Unknown policy found. "
- "Using CPUFREQ_POLICY_PERFORMANCE\n");
- pxa_freq_settings = pxa255_run_freqs;
- pxa_freqs_table = pxa255_run_freq_table;
- }
+ find_freq_tables(policy, &pxa_freqs_table, &pxa_freq_settings);
/* Lookup the next frequency */
if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
- target_freq, relation, &idx)) {
+ target_freq, relation, &idx)) {
return -EINVAL;
}
+ new_freq_cpu = pxa_freq_settings[idx].khz;
+ new_freq_mem = pxa_freq_settings[idx].membus;
freqs.old = policy->cur;
- freqs.new = pxa_freq_settings[idx].khz;
+ freqs.new = new_freq_cpu;
freqs.cpu = policy->cpu;
if (freq_debug)
- pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
- freqs.new / 1000, (pxa_freq_settings[idx].div2) ?
- (pxa_freq_settings[idx].membus / 2000) :
- (pxa_freq_settings[idx].membus / 1000));
+ pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, "
+ "(SDRAM %d Mhz)\n",
+ freqs.new / 1000, (pxa_freq_settings[idx].div2) ?
+ (new_freq_mem / 2000) : (new_freq_mem / 1000));
/*
* Tell everyone what we're about to do...
@@ -177,16 +268,16 @@ static int pxa_set_target(struct cpufreq_policy *policy,
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
/* Calculate the next MDREFR. If we're slowing down the SDRAM clock
- * we need to preset the smaller DRI before the change. If we're speeding
- * up we need to set the larger DRI value after the change.
+ * we need to preset the smaller DRI before the change. If we're
+ * speeding up we need to set the larger DRI value after the change.
*/
preset_mdrefr = postset_mdrefr = MDREFR;
- if ((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {
- preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |
- MDREFR_DRI(pxa_freq_settings[idx].membus);
+ if ((MDREFR & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) {
+ preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK);
+ preset_mdrefr |= mdrefr_dri(new_freq_mem);
}
- postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) |
- MDREFR_DRI(pxa_freq_settings[idx].membus);
+ postset_mdrefr =
+ (postset_mdrefr & ~MDREFR_DRI_MASK) | mdrefr_dri(new_freq_mem);
/* If we're dividing the memory clock by two for the SDRAM clock, this
* must be set prior to the change. Clearing the divide must be done
@@ -201,26 +292,27 @@ static int pxa_set_target(struct cpufreq_policy *policy,
local_irq_save(flags);
- /* Set new the CCCR */
+ /* Set new the CCCR and prepare CCLKCFG */
CCCR = pxa_freq_settings[idx].cccr;
+ cclkcfg = pxa_freq_settings[idx].cclkcfg;
asm volatile(" \n\
ldr r4, [%1] /* load MDREFR */ \n\
b 2f \n\
- .align 5 \n\
+ .align 5 \n\
1: \n\
- str %4, [%1] /* preset the MDREFR */ \n\
+ str %3, [%1] /* preset the MDREFR */ \n\
mcr p14, 0, %2, c6, c0, 0 /* set CCLKCFG[FCS] */ \n\
- str %5, [%1] /* postset the MDREFR */ \n\
+ str %4, [%1] /* postset the MDREFR */ \n\
\n\
b 3f \n\
2: b 1b \n\
3: nop \n\
"
- : "=&r" (unused)
- : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart),
- "r" (preset_mdrefr), "r" (postset_mdrefr)
- : "r4", "r5");
+ : "=&r" (unused)
+ : "r" (&MDREFR), "r" (cclkcfg),
+ "r" (preset_mdrefr), "r" (postset_mdrefr)
+ : "r4", "r5");
local_irq_restore(flags);
/*
@@ -233,38 +325,57 @@ static int pxa_set_target(struct cpufreq_policy *policy,
return 0;
}
-static unsigned int pxa_cpufreq_get(unsigned int cpu)
-{
- return get_clk_frequency_khz(0);
-}
-
-static int pxa_cpufreq_init(struct cpufreq_policy *policy)
+static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
{
int i;
+ unsigned int freq;
+
+ /* try to guess pxa27x cpu */
+ if (cpu_is_pxa27x())
+ pxa27x_guess_max_freq();
/* set default policy and cpuinfo */
policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
- policy->policy = CPUFREQ_POLICY_PERFORMANCE;
- policy->cpuinfo.max_freq = PXA25x_MAX_FREQ;
- policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
+ if (cpu_is_pxa25x())
+ policy->policy = CPUFREQ_POLICY_PERFORMANCE;
policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
- policy->cur = get_clk_frequency_khz(0); /* current freq */
+ policy->cur = get_clk_frequency_khz(0); /* current freq */
policy->min = policy->max = policy->cur;
- /* Generate the run cpufreq_frequency_table struct */
- for (i = 0; i < NUM_RUN_FREQS; i++) {
+ /* Generate pxa25x the run cpufreq_frequency_table struct */
+ for (i = 0; i < NUM_PXA25x_RUN_FREQS; i++) {
pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
pxa255_run_freq_table[i].index = i;
}
-
pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
- /* Generate the turbo cpufreq_frequency_table struct */
- for (i = 0; i < NUM_TURBO_FREQS; i++) {
- pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz;
+
+ /* Generate pxa25x the turbo cpufreq_frequency_table struct */
+ for (i = 0; i < NUM_PXA25x_TURBO_FREQS; i++) {
+ pxa255_turbo_freq_table[i].frequency =
+ pxa255_turbo_freqs[i].khz;
pxa255_turbo_freq_table[i].index = i;
}
pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
+ /* Generate the pxa27x cpufreq_frequency_table struct */
+ for (i = 0; i < NUM_PXA27x_FREQS; i++) {
+ freq = pxa27x_freqs[i].khz;
+ if (freq > pxa27x_maxfreq)
+ break;
+ pxa27x_freq_table[i].frequency = freq;
+ pxa27x_freq_table[i].index = i;
+ }
+ pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END;
+
+ /*
+ * Set the policy's minimum and maximum frequencies from the tables
+ * just constructed. This sets cpuinfo.mxx_freq, min and max.
+ */
+ if (cpu_is_pxa25x())
+ cpufreq_frequency_table_cpuinfo(policy, pxa255_run_freq_table);
+ else if (cpu_is_pxa27x())
+ cpufreq_frequency_table_cpuinfo(policy, pxa27x_freq_table);
+
printk(KERN_INFO "PXA CPU frequency change support initialized\n");
return 0;
@@ -275,26 +386,25 @@ static struct cpufreq_driver pxa_cpufreq_driver = {
.target = pxa_set_target,
.init = pxa_cpufreq_init,
.get = pxa_cpufreq_get,
- .name = "PXA25x",
+ .name = "PXA2xx",
};
static int __init pxa_cpu_init(void)
{
int ret = -ENODEV;
- if (cpu_is_pxa25x())
+ if (cpu_is_pxa25x() || cpu_is_pxa27x())
ret = cpufreq_register_driver(&pxa_cpufreq_driver);
return ret;
}
static void __exit pxa_cpu_exit(void)
{
- if (cpu_is_pxa25x())
- cpufreq_unregister_driver(&pxa_cpufreq_driver);
+ cpufreq_unregister_driver(&pxa_cpufreq_driver);
}
-MODULE_AUTHOR ("Intrinsyc Software Inc.");
-MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture");
+MODULE_AUTHOR("Intrinsyc Software Inc.");
+MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture");
MODULE_LICENSE("GPL");
module_init(pxa_cpu_init);
module_exit(pxa_cpu_exit);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 0993f4d1a0bc..7b9bdd0c6665 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -396,7 +396,7 @@ static struct pxafb_mach_info sharp_lm8v31 = {
.cmap_inverse = 0,
.cmap_static = 0,
.lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL |
- LCD_AC_BIAS_FREQ(255);
+ LCD_AC_BIAS_FREQ(255),
};
#define MMC_POLL_RATE msecs_to_jiffies(1000)
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index ec1bbf333a3a..7d4debbdcca3 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -42,20 +42,17 @@ int pxa_pm_enter(suspend_state_t state)
if (state != PM_SUSPEND_STANDBY) {
pxa_cpu_pm_fns->save(sleep_save);
/* before sleeping, calculate and save a checksum */
- for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++)
+ for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
sleep_save_checksum += sleep_save[i];
}
- /* Clear reset status */
- RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
/* *** go zzz *** */
pxa_cpu_pm_fns->enter(state);
cpu_init();
if (state != PM_SUSPEND_STANDBY) {
/* after sleeping, validate the checksum */
- for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++)
+ for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
checksum += sleep_save[i];
/* if invalid, display message and wait for a hardware reset */
@@ -101,7 +98,8 @@ static int __init pxa_pm_init(void)
return -EINVAL;
}
- sleep_save = kmalloc(pxa_cpu_pm_fns->save_size, GFP_KERNEL);
+ sleep_save = kmalloc(pxa_cpu_pm_fns->save_count * sizeof(unsigned long),
+ GFP_KERNEL);
if (!sleep_save) {
printk(KERN_ERR "failed to alloc memory for pm save\n");
return -ENOMEM;
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index ca5ac196b47b..0b30f25cff3c 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -326,13 +326,11 @@ static struct platform_device *devices[] __initdata = {
static void poodle_poweroff(void)
{
- RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
arm_machine_restart('h');
}
static void poodle_restart(char mode)
{
- RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
arm_machine_restart('h');
}
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index d9b5450aee5b..e5b417d14bb0 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -150,9 +150,7 @@ static struct clk pxa25x_clks[] = {
* More ones like CP and general purpose register values are preserved
* with the stack pointer in sleep.S.
*/
-enum { SLEEP_SAVE_START = 0,
-
- SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
+enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
@@ -162,7 +160,7 @@ enum { SLEEP_SAVE_START = 0,
SLEEP_SAVE_CKEN,
- SLEEP_SAVE_SIZE
+ SLEEP_SAVE_COUNT
};
@@ -200,6 +198,9 @@ static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
static void pxa25x_cpu_pm_enter(suspend_state_t state)
{
+ /* Clear reset status */
+ RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+
switch (state) {
case PM_SUSPEND_MEM:
/* set resume return address */
@@ -210,7 +211,7 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
}
static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
- .save_size = SLEEP_SAVE_SIZE,
+ .save_count = SLEEP_SAVE_COUNT,
.valid = suspend_valid_only_mem,
.save = pxa25x_cpu_pm_save,
.restore = pxa25x_cpu_pm_restore,
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 7a2449dd0fd4..7e945836e129 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -181,9 +181,7 @@ static struct clk pxa27x_clks[] = {
* More ones like CP and general purpose register values are preserved
* with the stack pointer in sleep.S.
*/
-enum { SLEEP_SAVE_START = 0,
-
- SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
+enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
@@ -198,7 +196,7 @@ enum { SLEEP_SAVE_START = 0,
SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
- SLEEP_SAVE_SIZE
+ SLEEP_SAVE_COUNT
};
void pxa27x_cpu_pm_save(unsigned long *sleep_save)
@@ -251,6 +249,9 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
/* Clear edge-detect status register. */
PEDR = 0xDF12FE1B;
+ /* Clear reset status */
+ RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+
switch (state) {
case PM_SUSPEND_STANDBY:
pxa_cpu_standby();
@@ -269,7 +270,7 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state)
}
static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
- .save_size = SLEEP_SAVE_SIZE,
+ .save_count = SLEEP_SAVE_COUNT,
.save = pxa27x_cpu_pm_save,
.restore = pxa27x_cpu_pm_restore,
.valid = pxa27x_cpu_pm_valid,
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index b6a6f5fcc77a..644550bfa330 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -256,12 +256,11 @@ static unsigned long wakeup_src;
#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
-enum { SLEEP_SAVE_START = 0,
- SLEEP_SAVE_CKENA,
+enum { SLEEP_SAVE_CKENA,
SLEEP_SAVE_CKENB,
SLEEP_SAVE_ACCR,
- SLEEP_SAVE_SIZE,
+ SLEEP_SAVE_COUNT,
};
static void pxa3xx_cpu_pm_save(unsigned long *sleep_save)
@@ -376,7 +375,7 @@ static int pxa3xx_cpu_pm_valid(suspend_state_t state)
}
static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = {
- .save_size = SLEEP_SAVE_SIZE,
+ .save_count = SLEEP_SAVE_COUNT,
.save = pxa3xx_cpu_pm_save,
.restore = pxa3xx_cpu_pm_restore,
.valid = pxa3xx_cpu_pm_valid,
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 62a02c3927c5..e7d0fcd9b43f 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -529,8 +529,6 @@ static struct platform_device *devices[] __initdata = {
static void spitz_poweroff(void)
{
- RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT);
GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET);
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 7a7f5f947cc5..23f050feb208 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -119,9 +119,6 @@ static void spitz_presuspend(void)
/* nRESET_OUT Disable */
PSLR |= PSLR_SL_ROD;
- /* Clear reset status */
- RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
/* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
PCFR = PCFR_GPR_EN | PCFR_OPDE;
}
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 6458f6d371d9..c2cbd66db814 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -467,8 +467,6 @@ static struct platform_device *devices[] __initdata = {
static void tosa_poweroff(void)
{
- RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT);
GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET);
diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c
index 246c573e7252..1693d447a224 100644
--- a/arch/arm/mach-sa1100/pm.c
+++ b/arch/arm/mach-sa1100/pm.c
@@ -43,20 +43,18 @@ extern void sa1100_cpu_resume(void);
* More ones like CP and general purpose register values are preserved
* on the stack and then the stack pointer is stored last in sleep.S.
*/
-enum { SLEEP_SAVE_SP = 0,
-
- SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR,
+enum { SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR,
SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR,
SLEEP_SAVE_Ser1SDCR0,
- SLEEP_SAVE_SIZE
+ SLEEP_SAVE_COUNT
};
static int sa11x0_pm_enter(suspend_state_t state)
{
- unsigned long gpio, sleep_save[SLEEP_SAVE_SIZE];
+ unsigned long gpio, sleep_save[SLEEP_SAVE_COUNT];
gpio = GPLR;
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
index d84167fb33b1..3ac8d8d781b3 100644
--- a/arch/arm/plat-s3c24xx/clock.c
+++ b/arch/arm/plat-s3c24xx/clock.c
@@ -411,7 +411,7 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
clk->parent = parent;
- if (clk == &s3c24xx_dclk0)
+ if (clk == &s3c24xx_clkout0)
mask = S3C2410_MISCCR_CLK0_MASK;
else {
source <<= 4;
@@ -437,7 +437,7 @@ struct clk s3c24xx_dclk0 = {
struct clk s3c24xx_dclk1 = {
.name = "dclk1",
.id = -1,
- .ctrlbit = S3C2410_DCLKCON_DCLK0EN,
+ .ctrlbit = S3C2410_DCLKCON_DCLK1EN,
.enable = s3c24xx_dclk_enable,
.set_parent = s3c24xx_dclk_setparent,
.set_rate = s3c24xx_set_dclk_rate,
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 795d0ac67c21..fd5708523f2e 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -832,6 +832,7 @@ config BANK_0
config BANK_1
hex "Bank 1"
default 0x7BB0
+ default 0x5558 if BF54x
config BANK_2
hex "Bank 2"
@@ -963,21 +964,22 @@ endchoice
endmenu
-if (BF537 || BF533 || BF54x)
-
menu "CPU Frequency scaling"
source "drivers/cpufreq/Kconfig"
-config CPU_FREQ
- bool
+config CPU_VOLTAGE
+ bool "CPU Voltage scaling"
+ depends on EXPERIMENTAL
+ depends on CPU_FREQ
default n
help
- If you want to enable this option, you should select the
- DPMC driver from Character Devices.
-endmenu
+ Say Y here if you want CPU voltage scaling according to the CPU frequency.
+ This option violates the PLL BYPASS recommendation in the Blackfin Processor
+ manuals. There is a theoretical risk that during VDDINT transitions
+ the PLL may unlock.
-endif
+endmenu
source "net/Kconfig"
diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c
index 721f15f3cebf..881afe9082c7 100644
--- a/arch/blackfin/kernel/asm-offsets.c
+++ b/arch/blackfin/kernel/asm-offsets.c
@@ -56,9 +56,6 @@ int main(void)
/* offsets into the thread struct */
DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
- DEFINE(THREAD_SR, offsetof(struct thread_struct, seqstat));
- DEFINE(PT_SR, offsetof(struct thread_struct, seqstat));
- DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
DEFINE(THREAD_PC, offsetof(struct thread_struct, pc));
DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);
diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S
index 5ed47228a390..4b03ba025488 100644
--- a/arch/blackfin/kernel/fixed_code.S
+++ b/arch/blackfin/kernel/fixed_code.S
@@ -1,6 +1,6 @@
/*
* This file contains sequences of code that will be copied to a
- * fixed location, defined in <asm/atomic_seq.h>. The interrupt
+ * fixed location, defined in <asm/fixed_code.h>. The interrupt
* handlers ensure that these sequences appear to be atomic when
* executed from userspace.
* These are aligned to 16 bytes, so that we have some space to replace
diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c
index 8b9fe29d03f4..14a42848f37f 100644
--- a/arch/blackfin/kernel/module.c
+++ b/arch/blackfin/kernel/module.c
@@ -160,6 +160,13 @@ int
module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
char *secstrings, struct module *mod)
{
+ /*
+ * XXX: sechdrs are vmalloced in kernel/module.c
+ * and would be vfreed just after module is loaded,
+ * so we hack to keep the only information we needed
+ * in mod->arch to correctly free L1 I/D sram later.
+ * NOTE: this breaks the semantic of mod->arch structure.
+ */
Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
void *dest = NULL;
@@ -167,8 +174,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) ||
((strcmp(".text", secstrings + s->sh_name) == 0) &&
(hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) {
- mod->arch.text_l1 = s;
dest = l1_inst_sram_alloc(s->sh_size);
+ mod->arch.text_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 instruction memory allocation failed\n",
@@ -182,8 +189,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) ||
((strcmp(".data", secstrings + s->sh_name) == 0) &&
(hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
- mod->arch.data_a_l1 = s;
dest = l1_data_sram_alloc(s->sh_size);
+ mod->arch.data_a_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
@@ -197,8 +204,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 ||
((strcmp(".bss", secstrings + s->sh_name) == 0) &&
(hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
- mod->arch.bss_a_l1 = s;
dest = l1_data_sram_alloc(s->sh_size);
+ mod->arch.bss_a_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
@@ -210,8 +217,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
s->sh_addr = (unsigned long)dest;
}
if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) {
- mod->arch.data_b_l1 = s;
dest = l1_data_B_sram_alloc(s->sh_size);
+ mod->arch.data_b_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
@@ -223,8 +230,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
s->sh_addr = (unsigned long)dest;
}
if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) {
- mod->arch.bss_b_l1 = s;
dest = l1_data_B_sram_alloc(s->sh_size);
+ mod->arch.bss_b_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
@@ -416,14 +423,14 @@ module_finalize(const Elf_Ehdr * hdr,
void module_arch_cleanup(struct module *mod)
{
- if ((mod->arch.text_l1) && (mod->arch.text_l1->sh_addr))
- l1_inst_sram_free((void *)mod->arch.text_l1->sh_addr);
- if ((mod->arch.data_a_l1) && (mod->arch.data_a_l1->sh_addr))
- l1_data_sram_free((void *)mod->arch.data_a_l1->sh_addr);
- if ((mod->arch.bss_a_l1) && (mod->arch.bss_a_l1->sh_addr))
- l1_data_sram_free((void *)mod->arch.bss_a_l1->sh_addr);
- if ((mod->arch.data_b_l1) && (mod->arch.data_b_l1->sh_addr))
- l1_data_B_sram_free((void *)mod->arch.data_b_l1->sh_addr);
- if ((mod->arch.bss_b_l1) && (mod->arch.bss_b_l1->sh_addr))
- l1_data_B_sram_free((void *)mod->arch.bss_b_l1->sh_addr);
+ if (mod->arch.text_l1)
+ l1_inst_sram_free((void *)mod->arch.text_l1);
+ if (mod->arch.data_a_l1)
+ l1_data_sram_free((void *)mod->arch.data_a_l1);
+ if (mod->arch.bss_a_l1)
+ l1_data_sram_free((void *)mod->arch.bss_a_l1);
+ if (mod->arch.data_b_l1)
+ l1_data_B_sram_free((void *)mod->arch.data_b_l1);
+ if (mod->arch.bss_b_l1)
+ l1_data_B_sram_free((void *)mod->arch.bss_b_l1);
}
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index be9fdd00d7cb..53c2cd255441 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -245,7 +245,7 @@ unsigned long get_wchan(struct task_struct *p)
void finish_atomic_sections (struct pt_regs *regs)
{
- int __user *up0 = (int __user *)&regs->p0;
+ int __user *up0 = (int __user *)regs->p0;
if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END)
return;
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index b4f062c172c6..f51ab088098e 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -185,8 +185,8 @@ void ptrace_disable(struct task_struct *child)
{
unsigned long tmp;
/* make sure the single step bit is not set. */
- tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
- put_reg(child, PT_SR, tmp);
+ tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS;
+ put_reg(child, PT_SYSCFG, tmp);
}
long arch_ptrace(struct task_struct *child, long request, long addr, long data)
diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c
index cb9d883d493c..dbc3bbf846be 100644
--- a/arch/blackfin/kernel/signal.c
+++ b/arch/blackfin/kernel/signal.c
@@ -42,6 +42,9 @@
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+/* Location of the trace bit in SYSCFG. */
+#define TRACE_BITS 0x0001
+
struct fdpic_func_descriptor {
unsigned long text;
unsigned long GOT;
@@ -225,6 +228,16 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
regs->r1 = (unsigned long)(&frame->info);
regs->r2 = (unsigned long)(&frame->uc);
+ /*
+ * Clear the trace flag when entering the signal handler, but
+ * notify any tracer that was single-stepping it. The tracer
+ * may want to single-step inside the handler too.
+ */
+ if (regs->syscfg & TRACE_BITS) {
+ regs->syscfg &= ~TRACE_BITS;
+ ptrace_notify(SIGTRAP);
+ }
+
return 0;
give_sigsegv:
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 4482c47c09e5..e887efc86c29 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -60,7 +60,7 @@ static inline unsigned long long cycles_2_ns(cycle_t cyc)
static cycle_t read_cycles(void)
{
- return get_cycles();
+ return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
}
unsigned long long sched_clock(void)
@@ -117,7 +117,7 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
break;
}
case CLOCK_EVT_MODE_ONESHOT:
- bfin_write_TSCALE(0);
+ bfin_write_TSCALE(TIME_SCALE - 1);
bfin_write_TCOUNT(0);
bfin_write_TCNTL(TMPWR | TMREN);
CSYNC();
@@ -183,10 +183,14 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
static int __init bfin_clockevent_init(void)
{
+ unsigned long timer_clk;
+
+ timer_clk = get_cclk() / TIME_SCALE;
+
setup_irq(IRQ_CORETMR, &bfin_timer_irq);
bfin_timer_init();
- clockevent_bfin.mult = div_sc(get_cclk(), NSEC_PER_SEC, clockevent_bfin.shift);
+ clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
clockevents_register_device(&clockevent_bfin);
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 583d53811f03..8aa49f804228 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -32,12 +32,14 @@
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/ata_platform.h>
+#include <linux/i2c.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/usb/sl811.h>
@@ -50,6 +52,7 @@
#include <asm/reboot.h>
#include <asm/nand.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
#include <linux/spi/ad7877.h>
/*
@@ -171,6 +174,46 @@ static struct platform_device bf52x_t350mcqb_device = {
};
#endif
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition ezkit_partitions[] = {
+ {
+ .name = "Bootloader",
+ .size = 0x40000,
+ .offset = 0,
+ }, {
+ .name = "Kernel",
+ .size = 0x1C0000,
+ .offset = MTDPART_OFS_APPEND,
+ }, {
+ .name = "RootFS",
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND,
+ }
+};
+
+static struct physmap_flash_data ezkit_flash_data = {
+ .width = 2,
+ .parts = ezkit_partitions,
+ .nr_parts = ARRAY_SIZE(ezkit_partitions),
+};
+
+static struct resource ezkit_flash_resource = {
+ .start = 0x20000000,
+ .end = 0x203fffff,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ezkit_flash_device = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &ezkit_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &ezkit_flash_resource,
+};
+#endif
+
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
static struct mtd_partition partition_info[] = {
{
@@ -420,11 +463,7 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
.offset = 0,
.mask_flags = MTD_CAP_ROM
}, {
- .name = "kernel",
- .size = 0xe0000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "file system",
+ .name = "linux kernel",
.size = MTDPART_SIZ_FULL,
.offset = MTDPART_OFS_APPEND,
}
@@ -434,7 +473,7 @@ static struct flash_platform_data bfin_spi_flash_data = {
.name = "m25p80",
.parts = bfin_spi_flash_partitions,
.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
- .type = "m25p64",
+ .type = "m25p16",
};
/* SPI flash chip (m25p64) */
@@ -755,6 +794,24 @@ static struct platform_device i2c_bfin_twi_device = {
};
#endif
+#ifdef CONFIG_I2C_BOARDINFO
+static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
+#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
+ {
+ I2C_BOARD_INFO("pcf8574_lcd", 0x22),
+ .type = "pcf8574_lcd",
+ },
+#endif
+#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
+ {
+ I2C_BOARD_INFO("pcf8574_keypad", 0x27),
+ .type = "pcf8574_keypad",
+ .irq = IRQ_PF8,
+ },
+#endif
+};
+#endif
+
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
.name = "bfin-sport-uart",
@@ -839,7 +896,32 @@ static struct platform_device bfin_gpios_device = {
.resource = &bfin_gpios_resources,
};
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_100, 400000000),
+ VRPAIR(VLEV_105, 426000000),
+ VRPAIR(VLEV_110, 500000000),
+ VRPAIR(VLEV_115, 533000000),
+ VRPAIR(VLEV_120, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *stamp_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
&bf5xx_nand_device,
#endif
@@ -921,12 +1003,22 @@ static struct platform_device *stamp_devices[] __initdata = {
&bfin_device_gpiokeys,
#endif
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+ &ezkit_flash_device,
+#endif
+
&bfin_gpios_device,
};
static int __init stamp_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
+
+#ifdef CONFIG_I2C_BOARDINFO
+ i2c_register_board_info(0, bfin_i2c_board_info,
+ ARRAY_SIZE(bfin_i2c_board_info));
+#endif
+
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
spi_register_board_info(bfin_spi_board_info,
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index a03149c72681..ed2b0b8f5dc9 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -33,12 +33,15 @@
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
+#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -341,7 +344,37 @@ static struct platform_device bfin_pata_device = {
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 376000000),
+ VRPAIR(VLEV_095, 426000000),
+ VRPAIR(VLEV_100, 426000000),
+ VRPAIR(VLEV_105, 476000000),
+ VRPAIR(VLEV_110, 476000000),
+ VRPAIR(VLEV_115, 476000000),
+ VRPAIR(VLEV_120, 600000000),
+ VRPAIR(VLEV_125, 600000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *cm_bf533_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
&bfin_uart_device,
#endif
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 08a7943949ae..9d28415163ea 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -42,6 +42,7 @@
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -350,7 +351,37 @@ static struct platform_device i2c_gpio_device = {
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 376000000),
+ VRPAIR(VLEV_095, 426000000),
+ VRPAIR(VLEV_100, 426000000),
+ VRPAIR(VLEV_105, 476000000),
+ VRPAIR(VLEV_110, 476000000),
+ VRPAIR(VLEV_115, 476000000),
+ VRPAIR(VLEV_120, 600000000),
+ VRPAIR(VLEV_125, 600000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *ezkit_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
&smc91x_device,
#endif
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 024f418ae543..7fd35fb32fd5 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -45,6 +45,7 @@
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -516,7 +517,37 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 376000000),
+ VRPAIR(VLEV_095, 426000000),
+ VRPAIR(VLEV_100, 426000000),
+ VRPAIR(VLEV_105, 476000000),
+ VRPAIR(VLEV_110, 476000000),
+ VRPAIR(VLEV_115, 476000000),
+ VRPAIR(VLEV_120, 600000000),
+ VRPAIR(VLEV_125, 600000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *stamp_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
&rtc_device,
#endif
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index d8a23cd9b9ed..73f2142875e2 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -35,12 +35,15 @@
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
+#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -428,7 +431,37 @@ static struct platform_device bfin_pata_device = {
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 376000000),
+ VRPAIR(VLEV_095, 426000000),
+ VRPAIR(VLEV_100, 426000000),
+ VRPAIR(VLEV_105, 476000000),
+ VRPAIR(VLEV_110, 476000000),
+ VRPAIR(VLEV_115, 476000000),
+ VRPAIR(VLEV_120, 500000000),
+ VRPAIR(VLEV_125, 533000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *cm_bf537_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
&hitachi_fb_device,
#endif
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index d3727b7c2d7d..9a756d1f3d73 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -47,6 +47,7 @@
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
#include <linux/spi/ad7877.h>
/*
@@ -817,7 +818,37 @@ static struct platform_device bfin_pata_device = {
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 376000000),
+ VRPAIR(VLEV_095, 426000000),
+ VRPAIR(VLEV_100, 426000000),
+ VRPAIR(VLEV_105, 476000000),
+ VRPAIR(VLEV_110, 476000000),
+ VRPAIR(VLEV_115, 476000000),
+ VRPAIR(VLEV_120, 500000000),
+ VRPAIR(VLEV_125, 533000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *stamp_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
&bfin_pcmcia_cf_device,
#endif
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index e3e8479fffb5..3b74f96d3590 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -36,7 +36,9 @@
#include <linux/spi/flash.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
+#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
#include <linux/usb/musb.h>
+#endif
#include <asm/bfin5xx_spi.h>
#include <asm/cplb.h>
#include <asm/dma.h>
@@ -44,6 +46,7 @@
#include <asm/nand.h>
#include <asm/portmux.h>
#include <asm/mach/bf54x_keys.h>
+#include <asm/dpmc.h>
#include <linux/input.h>
#include <linux/spi/ad7877.h>
@@ -590,7 +593,38 @@ static struct platform_device bfin_device_gpiokeys = {
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+/*
+ * Internal VLEV BF54XSBBC1533
+ ****temporarily using these values until data sheet is updated
+ */
+ VRPAIR(VLEV_085, 150000000),
+ VRPAIR(VLEV_090, 250000000),
+ VRPAIR(VLEV_110, 276000000),
+ VRPAIR(VLEV_115, 301000000),
+ VRPAIR(VLEV_120, 525000000),
+ VRPAIR(VLEV_125, 550000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *cm_bf548_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
&rtc_device,
#endif
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index b00f68ac6bc9..d1682bb37509 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -46,6 +46,7 @@
#include <asm/dma.h>
#include <asm/gpio.h>
#include <asm/nand.h>
+#include <asm/dpmc.h>
#include <asm/portmux.h>
#include <asm/mach/bf54x_keys.h>
#include <linux/input.h>
@@ -689,7 +690,38 @@ static struct platform_device bfin_gpios_device = {
.resource = &bfin_gpios_resources,
};
+static const unsigned int cclk_vlev_datasheet[] =
+{
+/*
+ * Internal VLEV BF54XSBBC1533
+ ****temporarily using these values until data sheet is updated
+ */
+ VRPAIR(VLEV_085, 150000000),
+ VRPAIR(VLEV_090, 250000000),
+ VRPAIR(VLEV_110, 276000000),
+ VRPAIR(VLEV_115, 301000000),
+ VRPAIR(VLEV_120, 525000000),
+ VRPAIR(VLEV_125, 550000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *ezkit_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
&rtc_device,
#endif
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 9fd580952fd8..466ef5929a25 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -33,12 +33,15 @@
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
+#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -339,8 +342,37 @@ static struct platform_device bfin_pata_device = {
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 300000000),
+ VRPAIR(VLEV_095, 313000000),
+ VRPAIR(VLEV_100, 350000000),
+ VRPAIR(VLEV_105, 400000000),
+ VRPAIR(VLEV_110, 444000000),
+ VRPAIR(VLEV_115, 450000000),
+ VRPAIR(VLEV_120, 475000000),
+ VRPAIR(VLEV_125, 500000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *cm_bf561_devices[] __initdata = {
+ &bfin_dpmc,
+
#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
&hitachi_fb_device,
#endif
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 0d74b7d99209..61d8f7648b24 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -39,6 +39,7 @@
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -443,7 +444,37 @@ static struct platform_device i2c_gpio_device = {
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 300000000),
+ VRPAIR(VLEV_095, 313000000),
+ VRPAIR(VLEV_100, 350000000),
+ VRPAIR(VLEV_105, 400000000),
+ VRPAIR(VLEV_110, 444000000),
+ VRPAIR(VLEV_115, 450000000),
+ VRPAIR(VLEV_120, 475000000),
+ VRPAIR(VLEV_125, 500000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *ezkit_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
&smc91x_device,
#endif
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index 393081e9b680..422bfee34adc 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -6,5 +6,6 @@ obj-y := \
cache.o cacheinit.o entry.o \
interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o
-obj-$(CONFIG_PM) += pm.o dpmc.o
-obj-$(CONFIG_CPU_FREQ) += cpufreq.o
+obj-$(CONFIG_PM) += pm.o dpmc_modes.o
+obj-$(CONFIG_CPU_FREQ) += cpufreq.o
+obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index ed81e00d20e1..75cdad291e88 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -62,6 +62,14 @@ static struct bfin_dpm_state {
unsigned int tscale; /* change the divider on the core timer interrupt */
} dpm_state_table[3];
+/*
+ normalized to maximum frequncy offset for CYCLES,
+ used in time-ts cycles clock source, but could be used
+ somewhere also.
+ */
+unsigned long long __bfin_cycles_off;
+unsigned int __bfin_cycles_mod;
+
/**************************************************************************/
static unsigned int bfin_getfreq(unsigned int cpu)
@@ -80,6 +88,7 @@ static int bfin_target(struct cpufreq_policy *policy,
unsigned int index, plldiv, tscale;
unsigned long flags, cclk_hz;
struct cpufreq_freqs freqs;
+ cycles_t cycles;
if (cpufreq_frequency_table_target(policy, bfin_freq_table,
target_freq, relation, &index))
@@ -101,8 +110,14 @@ static int bfin_target(struct cpufreq_policy *policy,
bfin_write_PLL_DIV(plldiv);
/* we have to adjust the core timer, because it is using cclk */
bfin_write_TSCALE(tscale);
+ cycles = get_cycles();
SSYNC();
+ cycles += 10; /* ~10 cycles we loose after get_cycles() */
+ __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index);
+ __bfin_cycles_mod = index;
local_irq_restore(flags);
+ /* TODO: just test case for cycles clock source, remove later */
+ pr_debug("cpufreq: done\n");
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
return 0;
@@ -119,22 +134,13 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
unsigned long cclk, sclk, csel, min_cclk;
int index;
-#ifdef CONFIG_CYCLES_CLOCKSOURCE
-/*
- * Clocksource CYCLES is still CONTINUOUS but not longer MONOTONIC in case we enable
- * CPU frequency scaling, since CYCLES runs off Core Clock.
- */
- printk(KERN_WARNING "CPU frequency scaling not supported: Clocksource not suitable\n"
- return -ENODEV;
-#endif
-
if (policy->cpu != 0)
return -EINVAL;
cclk = get_cclk();
sclk = get_sclk();
-#if ANOMALY_05000273
+#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
min_cclk = sclk * 2;
#else
min_cclk = sclk;
diff --git a/arch/blackfin/mach-common/dpmc.c b/arch/blackfin/mach-common/dpmc.c
new file mode 100644
index 000000000000..02c7efd1bcf4
--- /dev/null
+++ b/arch/blackfin/mach-common/dpmc.c
@@ -0,0 +1,137 @@
+/*
+ * Copyright 2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/cdev.h>
+#include <linux/device.h>
+#include <linux/errno.h>
+#include <linux/fs.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+#include <linux/cpufreq.h>
+
+#include <asm/delay.h>
+#include <asm/dpmc.h>
+
+#define DRIVER_NAME "bfin dpmc"
+
+#define dprintk(msg...) \
+ cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, DRIVER_NAME, msg)
+
+struct bfin_dpmc_platform_data *pdata;
+
+/**
+ * bfin_set_vlev - Update VLEV field in VR_CTL Reg.
+ * Avoid BYPASS sequence
+ */
+static void bfin_set_vlev(unsigned int vlev)
+{
+ unsigned pll_lcnt;
+
+ pll_lcnt = bfin_read_PLL_LOCKCNT();
+
+ bfin_write_PLL_LOCKCNT(1);
+ bfin_write_VR_CTL((bfin_read_VR_CTL() & ~VLEV) | vlev);
+ bfin_write_PLL_LOCKCNT(pll_lcnt);
+}
+
+/**
+ * bfin_get_vlev - Get CPU specific VLEV from platform device data
+ */
+static unsigned int bfin_get_vlev(unsigned int freq)
+{
+ int i;
+
+ if (!pdata)
+ goto err_out;
+
+ freq >>= 16;
+
+ for (i = 0; i < pdata->tabsize; i++)
+ if (freq <= (pdata->tuple_tab[i] & 0xFFFF))
+ return pdata->tuple_tab[i] >> 16;
+
+err_out:
+ printk(KERN_WARNING "DPMC: No suitable CCLK VDDINT voltage pair found\n");
+ return VLEV_120;
+}
+
+#ifdef CONFIG_CPU_FREQ
+static int
+vreg_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
+{
+ struct cpufreq_freqs *freq = data;
+
+ if (val == CPUFREQ_PRECHANGE && freq->old < freq->new) {
+ bfin_set_vlev(bfin_get_vlev(freq->new));
+ udelay(pdata->vr_settling_time); /* Wait until Volatge settled */
+
+ } else if (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)
+ bfin_set_vlev(bfin_get_vlev(freq->new));
+
+ return 0;
+}
+
+static struct notifier_block vreg_cpufreq_notifier_block = {
+ .notifier_call = vreg_cpufreq_notifier
+};
+#endif /* CONFIG_CPU_FREQ */
+
+/**
+ * bfin_dpmc_probe -
+ *
+ */
+static int __devinit bfin_dpmc_probe(struct platform_device *pdev)
+{
+ if (pdev->dev.platform_data)
+ pdata = pdev->dev.platform_data;
+ else
+ return -EINVAL;
+
+ return cpufreq_register_notifier(&vreg_cpufreq_notifier_block,
+ CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+/**
+ * bfin_dpmc_remove -
+ */
+static int __devexit bfin_dpmc_remove(struct platform_device *pdev)
+{
+ pdata = NULL;
+ return cpufreq_unregister_notifier(&vreg_cpufreq_notifier_block,
+ CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+struct platform_driver bfin_dpmc_device_driver = {
+ .probe = bfin_dpmc_probe,
+ .remove = __devexit_p(bfin_dpmc_remove),
+ .driver = {
+ .name = DRIVER_NAME,
+ }
+};
+
+/**
+ * bfin_dpmc_init - Init driver
+ */
+static int __init bfin_dpmc_init(void)
+{
+ return platform_driver_register(&bfin_dpmc_device_driver);
+}
+module_init(bfin_dpmc_init);
+
+/**
+ * bfin_dpmc_exit - break down driver
+ */
+static void __exit bfin_dpmc_exit(void)
+{
+ platform_driver_unregister(&bfin_dpmc_device_driver);
+}
+module_exit(bfin_dpmc_exit);
+
+MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
+MODULE_DESCRIPTION("cpu power management driver for Blackfin");
+MODULE_LICENSE("GPL");
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc_modes.S
index 9d45aa3265b1..b7981d31c392 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -1,30 +1,7 @@
/*
- * File: arch/blackfin/mach-common/dpmc.S
- * Based on:
- * Author: LG Soft India
+ * Copyright 2004-2008 Analog Devices Inc.
*
- * Created: ?
- * Description: Watchdog Timer APIs
- *
- * Modified:
- * Copyright 2004-2006 Analog Devices Inc.
- *
- * Bugs: Enter bugs at http://blackfin.uclinux.org/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ * Licensed under the GPL-2 or later.
*/
#include <linux/linkage.h>
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index f2fb87e9a46e..038f70e0be65 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -151,26 +151,62 @@ ENTRY(_ex_soft_bp)
ENDPROC(_ex_soft_bp)
ENTRY(_ex_single_step)
+ /* If we just returned from an interrupt, the single step event is
+ for the RTI instruction. */
r7 = retx;
r6 = reti;
cc = r7 == r6;
- if cc jump _bfin_return_from_exception
- r7 = syscfg;
- bitclr (r7, 0);
- syscfg = R7;
+ if cc jump _bfin_return_from_exception;
+ /* If we were in user mode, do the single step normally. */
p5.l = lo(IPEND);
p5.h = hi(IPEND);
r6 = [p5];
- cc = bittst(r6, 5);
- if !cc jump _ex_trap_c;
- p4.l = lo(EVT5);
- p4.h = hi(EVT5);
- r6.h = _exception_to_level5;
- r6.l = _exception_to_level5;
- r7 = [p4];
- cc = r6 == r7;
- if !cc jump _ex_trap_c;
+ r7 = 0xffe0 (z);
+ r7 = r7 & r6;
+ cc = r7 == 0;
+ if !cc jump 1f;
+
+ /* Single stepping only a single instruction, so clear the trace
+ * bit here. */
+ r7 = syscfg;
+ bitclr (r7, 0);
+ syscfg = R7;
+ jump _ex_trap_c;
+
+1:
+ /*
+ * We were in an interrupt handler. By convention, all of them save
+ * SYSCFG with their first instruction, so by checking whether our
+ * RETX points at the entry point, we can determine whether to allow
+ * a single step, or whether to clear SYSCFG.
+ *
+ * First, find out the interrupt level and the event vector for it.
+ */
+ p5.l = lo(EVT0);
+ p5.h = hi(EVT0);
+ p5 += -4;
+2:
+ r7 = rot r7 by -1;
+ p5 += 4;
+ if !cc jump 2b;
+
+ /* What we actually do is test for the _second_ instruction in the
+ * IRQ handler. That way, if there are insns following the restore
+ * of SYSCFG after leaving the handler, we will not turn off SYSCFG
+ * for them. */
+
+ r7 = [p5];
+ r7 += 2;
+ r6 = RETX;
+ cc = R7 == R6;
+ if !cc jump _bfin_return_from_exception;
+
+ r7 = syscfg;
+ bitclr (r7, 0);
+ syscfg = R7;
+
+ /* Fall through to _bfin_return_from_exception. */
ENDPROC(_ex_single_step)
ENTRY(_bfin_return_from_exception)
@@ -234,20 +270,26 @@ ENTRY(_ex_trap_c)
p5.l = _saved_icplb_fault_addr;
[p5] = r7;
- p4.l = __retx;
- p4.h = __retx;
+ p4.l = _excpt_saved_stuff;
+ p4.h = _excpt_saved_stuff;
+
r6 = retx;
[p4] = r6;
- p4.l = lo(SAFE_USER_INSTRUCTION);
- p4.h = hi(SAFE_USER_INSTRUCTION);
- retx = p4;
+
+ r6 = SYSCFG;
+ [p4 + 4] = r6;
+ BITCLR(r6, 0);
+ SYSCFG = r6;
/* Disable all interrupts, but make sure level 5 is enabled so
* we can switch to that level. Save the old mask. */
cli r6;
- p4.l = _excpt_saved_imask;
- p4.h = _excpt_saved_imask;
- [p4] = r6;
+ [p4 + 8] = r6;
+
+ p4.l = lo(SAFE_USER_INSTRUCTION);
+ p4.h = hi(SAFE_USER_INSTRUCTION);
+ retx = p4;
+
r6 = 0x3f;
sti r6;
@@ -295,6 +337,11 @@ ENTRY(_double_fault)
*/
SAVE_ALL_SYS
+ /* The dumping functions expect the return address in the RETI
+ * slot. */
+ r6 = retx;
+ [sp + PT_PC] = r6;
+
r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
SP += -12;
call _double_fault_c;
@@ -307,16 +354,17 @@ ENDPROC(_double_fault)
ENTRY(_exception_to_level5)
SAVE_ALL_SYS
- p4.l = __retx;
- p4.h = __retx;
+ p4.l = _excpt_saved_stuff;
+ p4.h = _excpt_saved_stuff;
r6 = [p4];
[sp + PT_PC] = r6;
+ r6 = [p4 + 4];
+ [sp + PT_SYSCFG] = r6;
+
/* Restore interrupt mask. We haven't pushed RETI, so this
* doesn't enable interrupts until we return from this handler. */
- p4.l = _excpt_saved_imask;
- p4.h = _excpt_saved_imask;
- r6 = [p4];
+ r6 = [p4 + 8];
sti r6;
/* Restore the hardware error vector. */
@@ -1344,7 +1392,14 @@ ENTRY(_sys_call_table)
.rept NR_syscalls-(.-_sys_call_table)/4
.long _sys_ni_syscall
.endr
-_excpt_saved_imask:
+
+ /*
+ * Used to save the real RETX, IMASK and SYSCFG when temporarily
+ * storing safe values across the transition from exception to IRQ5.
+ */
+_excpt_saved_stuff:
+ .long 0;
+ .long 0;
.long 0;
_exception_stack:
@@ -1358,7 +1413,3 @@ _exception_stack_top:
_last_cplb_fault_retx:
.long 0;
#endif
- /* Used to save the real RETX when temporarily storing a safe
- * return address. */
-__retx:
- .long 0;
diff --git a/arch/cris/kernel/sys_cris.c b/arch/cris/kernel/sys_cris.c
index 8b9984197edc..a79fbd87021b 100644
--- a/arch/cris/kernel/sys_cris.c
+++ b/arch/cris/kernel/sys_cris.c
@@ -27,25 +27,6 @@
#include <asm/uaccess.h>
#include <asm/segment.h>
-/*
- * sys_pipe() is the normal C calling standard for creating
- * a pipe. It's not the way Unix traditionally does this, though.
- */
-asmlinkage int sys_pipe(unsigned long __user * fildes)
-{
- int fd[2];
- int error;
-
- lock_kernel();
- error = do_pipe(fd);
- unlock_kernel();
- if (!error) {
- if (copy_to_user(fildes, fd, 2*sizeof(int)))
- error = -EFAULT;
- }
- return error;
-}
-
/* common code for old and new mmaps */
static inline long
do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
diff --git a/arch/m32r/kernel/sys_m32r.c b/arch/m32r/kernel/sys_m32r.c
index 6d7a80fdad48..305ac852bbed 100644
--- a/arch/m32r/kernel/sys_m32r.c
+++ b/arch/m32r/kernel/sys_m32r.c
@@ -76,26 +76,6 @@ asmlinkage int sys_tas(int __user *addr)
return oldval;
}
-/*
- * sys_pipe() is the normal C calling standard for creating
- * a pipe. It's not the way Unix traditionally does this, though.
- */
-asmlinkage int
-sys_pipe(unsigned long r0, unsigned long r1, unsigned long r2,
- unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, struct pt_regs regs)
-{
- int fd[2];
- int error;
-
- error = do_pipe(fd);
- if (!error) {
- if (copy_to_user((void __user *)r0, fd, 2*sizeof(int)))
- error = -EFAULT;
- }
- return error;
-}
-
asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
unsigned long prot, unsigned long flags,
unsigned long fd, unsigned long pgoff)
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index fd4858e2dd63..75b8340b254b 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -468,15 +468,26 @@ static inline void access_error040(struct frame *fp)
* (if do_page_fault didn't fix the mapping,
* the writeback won't do good)
*/
+disable_wb:
#ifdef DEBUG
printk(".. disabling wb2\n");
#endif
if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
fp->un.fmt7.wb2s &= ~WBV_040;
+ if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
+ fp->un.fmt7.wb3s &= ~WBV_040;
}
- } else if (send_fault_sig(&fp->ptregs) > 0) {
- printk("68040 access error, ssw=%x\n", ssw);
- trap_c(fp);
+ } else {
+ /* In case of a bus error we either kill the process or expect
+ * the kernel to catch the fault, which then is also responsible
+ * for cleaning up the mess.
+ */
+ current->thread.signo = SIGBUS;
+ current->thread.faddr = fp->un.fmt7.faddr;
+ if (send_fault_sig(&fp->ptregs) >= 0)
+ printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
+ fp->un.fmt7.faddr);
+ goto disable_wb;
}
do_040writebacks(fp);
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index 735a49b4b936..ad3e3bacae39 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -48,9 +48,6 @@
struct mac_booter_data mac_bi_data;
int mac_bisize = sizeof mac_bi_data;
-struct mac_hw_present mac_hw_present;
-EXPORT_SYMBOL(mac_hw_present);
-
/* New m68k bootinfo stuff and videobase */
extern int m68k_num_memory;
@@ -817,27 +814,6 @@ void __init mac_identify(void)
m68k_ramdisk.addr, m68k_ramdisk.size);
#endif
- /*
- * TODO: set the various fields in macintosh_config->hw_present here!
- */
- switch (macintosh_config->scsi_type) {
- case MAC_SCSI_OLD:
- MACHW_SET(MAC_SCSI_80);
- break;
- case MAC_SCSI_QUADRA:
- case MAC_SCSI_QUADRA2:
- case MAC_SCSI_QUADRA3:
- MACHW_SET(MAC_SCSI_96);
- if ((macintosh_config->ident == MAC_MODEL_Q900) ||
- (macintosh_config->ident == MAC_MODEL_Q950))
- MACHW_SET(MAC_SCSI_96_2);
- break;
- default:
- printk(KERN_WARNING "config.c: wtf: unknown scsi, using 53c80\n");
- MACHW_SET(MAC_SCSI_80);
- break;
- }
-
iop_init();
via_init();
oss_init();
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index 07eb4c4bab82..8e8441587c22 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -671,6 +671,9 @@ config ROMKERNEL
endchoice
+if COLDFIRE
+source "kernel/Kconfig.preempt"
+endif
source "mm/Kconfig"
endmenu
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S
index 5592e0bf951f..93e69236ed6f 100644
--- a/arch/m68knommu/kernel/vmlinux.lds.S
+++ b/arch/m68knommu/kernel/vmlinux.lds.S
@@ -114,6 +114,16 @@ SECTIONS {
*(__kcrctab_gpl)
__stop___kcrctab_gpl = .;
+ /* Kernel symbol table: Normal unused symbols */
+ __start___kcrctab_unused = .;
+ *(__kcrctab_unused)
+ __stop___kcrctab_unused = .;
+
+ /* Kernel symbol table: GPL-only unused symbols */
+ __start___kcrctab_unused_gpl = .;
+ *(__kcrctab_unused_gpl)
+ __stop___kcrctab_unused_gpl = .;
+
/* Kernel symbol table: GPL-future symbols */
__start___kcrctab_gpl_future = .;
*(__kcrctab_gpl_future)
diff --git a/arch/mips/au1000/common/Makefile b/arch/mips/au1000/common/Makefile
index 90e2d7a46e8e..dd0e19dacfcf 100644
--- a/arch/mips/au1000/common/Makefile
+++ b/arch/mips/au1000/common/Makefile
@@ -1,9 +1,8 @@
#
-# Copyright 2000 MontaVista Software Inc.
-# Author: MontaVista Software, Inc.
-# ppopov@mvista.com or source@mvista.com
+# Copyright 2000, 2008 MontaVista Software Inc.
+# Author: MontaVista Software, Inc. <source@mvista.com>
#
-# Makefile for the Alchemy Au1000 CPU, generic files.
+# Makefile for the Alchemy Au1xx0 CPUs, generic files.
#
obj-y += prom.o irq.o puts.o time.o reset.o \
diff --git a/arch/mips/au1000/common/au1xxx_irqmap.c b/arch/mips/au1000/common/au1xxx_irqmap.c
index 37a10a01de9d..c7ca1596394c 100644
--- a/arch/mips/au1000/common/au1xxx_irqmap.c
+++ b/arch/mips/au1000/common/au1xxx_irqmap.c
@@ -40,20 +40,20 @@
struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
#if defined(CONFIG_SOC_AU1000)
- { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_UART2_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_UART2_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
@@ -62,32 +62,32 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
{ AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
- { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
- { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
#elif defined(CONFIG_SOC_AU1500)
- { AU1500_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_UART0_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
- { AU1500_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_UART3_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
- { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
@@ -100,26 +100,26 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
{ AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
- { AU1500_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1500_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1500_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
#elif defined(CONFIG_SOC_AU1100)
- { AU1100_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1100_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1100_SD_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1100_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
+ { AU1100_UART0_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1100_UART1_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1100_SD_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1100_UART3_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
@@ -128,33 +128,33 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
{ AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
- { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
- { AU1100_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
- /*{ AU1000_GPIO215_208_INT, INTC_INT_HIGH_LEVEL, 0},*/
- { AU1100_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1100_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
+ /* { AU1000_GPIO215_208_INT, INTC_INT_HIGH_LEVEL, 0 }, */
+ { AU1100_LCD_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
#elif defined(CONFIG_SOC_AU1550)
- { AU1550_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_UART0_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1550_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
{ AU1550_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
- { AU1550_DDMA_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1550_CRYPTO_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_DDMA_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1550_CRYPTO_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1550_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
{ AU1550_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
{ AU1550_PCI_RST_INT, INTC_INT_LOW_LEVEL, 0 },
- { AU1550_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1550_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1550_PSC0_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_UART1_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1550_UART3_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1550_PSC0_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
@@ -163,26 +163,26 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
{ AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
- { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0},
+ { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1550_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
- { AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
#elif defined(CONFIG_SOC_AU1200)
- { AU1200_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_UART0_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1200_SWT_INT, INTC_INT_RISE_EDGE, 0 },
- { AU1200_SD_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1200_DDMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_SD_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1200_DDMA_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1200_MAE_BE_INT, INTC_INT_HIGH_LEVEL, 0 },
- { AU1200_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_UART1_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1200_MAE_FE_INT, INTC_INT_HIGH_LEVEL, 0 },
- { AU1200_PSC0_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_PSC0_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
@@ -191,10 +191,10 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
{ AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
- { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0},
+ { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
- { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1200_MAE_BOTH_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1200_MAE_BOTH_INT, INTC_INT_HIGH_LEVEL, 0 },
#else
#error "Error: Unknown Alchemy SOC"
@@ -203,4 +203,3 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
};
int __initdata au1xxx_ic0_nr_irqs = ARRAY_SIZE(au1xxx_ic0_map);
-
diff --git a/arch/mips/au1000/common/clocks.c b/arch/mips/au1000/common/clocks.c
index 3ce6cace0eb0..46f8ee0e2657 100644
--- a/arch/mips/au1000/common/clocks.c
+++ b/arch/mips/au1000/common/clocks.c
@@ -1,10 +1,9 @@
/*
* BRIEF MODULE DESCRIPTION
- * Simple Au1000 clocks routines.
+ * Simple Au1xx0 clocks routines.
*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -30,8 +29,8 @@
#include <linux/module.h>
#include <asm/mach-au1x00/au1000.h>
-static unsigned int au1x00_clock; // Hz
-static unsigned int lcd_clock; // KHz
+static unsigned int au1x00_clock; /* Hz */
+static unsigned int lcd_clock; /* KHz */
static unsigned long uart_baud_base;
/*
@@ -47,8 +46,6 @@ unsigned int get_au1x00_speed(void)
return au1x00_clock;
}
-
-
/*
* The UART baud base is not known at compile time ... if
* we want to be able to use the same code on different
@@ -73,24 +70,23 @@ void set_au1x00_uart_baud_base(unsigned long new_baud_base)
void set_au1x00_lcd_clock(void)
{
unsigned int static_cfg0;
- unsigned int sys_busclk =
- (get_au1x00_speed()/1000) /
- ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2);
+ unsigned int sys_busclk = (get_au1x00_speed() / 1000) /
+ ((int)(au_readl(SYS_POWERCTRL) & 0x03) + 2);
static_cfg0 = au_readl(MEM_STCFG0);
- if (static_cfg0 & (1<<11))
+ if (static_cfg0 & (1 << 11))
lcd_clock = sys_busclk / 5; /* note: BCLK switching fails with D5 */
else
lcd_clock = sys_busclk / 4;
if (lcd_clock > 50000) /* Epson MAX */
- printk("warning: LCD clock too high (%d KHz)\n", lcd_clock);
+ printk(KERN_WARNING "warning: LCD clock too high (%u KHz)\n",
+ lcd_clock);
}
unsigned int get_au1x00_lcd_clock(void)
{
return lcd_clock;
}
-
EXPORT_SYMBOL(get_au1x00_lcd_clock);
diff --git a/arch/mips/au1000/common/cputable.c b/arch/mips/au1000/common/cputable.c
index 8c93a05d7382..ba6430bc2d03 100644
--- a/arch/mips/au1000/common/cputable.c
+++ b/arch/mips/au1000/common/cputable.c
@@ -14,7 +14,7 @@
#include <asm/mach-au1x00/au1000.h>
-struct cpu_spec* cur_cpu_spec[NR_CPUS];
+struct cpu_spec *cur_cpu_spec[NR_CPUS];
/* With some thought, we can probably use the mask to reduce the
* size of the table.
@@ -39,8 +39,7 @@ struct cpu_spec cpu_specs[] = {
{ 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0, 0 }
};
-void
-set_cpuspec(void)
+void set_cpuspec(void)
{
struct cpu_spec *sp;
u32 prid;
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index 53377dfc0640..42d555236de1 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -53,12 +53,11 @@
*/
static DEFINE_SPINLOCK(au1xxx_dbdma_spin_lock);
-/* I couldn't find a macro that did this......
-*/
+/* I couldn't find a macro that did this... */
#define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1))
static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
-static int dbdma_initialized=0;
+static int dbdma_initialized;
static void au1xxx_dbdma_init(void);
static dbdev_tab_t dbdev_tab[] = {
@@ -149,7 +148,7 @@ static dbdev_tab_t dbdev_tab[] = {
{ DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
-#endif // CONFIG_SOC_AU1200
+#endif /* CONFIG_SOC_AU1200 */
{ DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
@@ -177,8 +176,7 @@ static dbdev_tab_t dbdev_tab[] = {
static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS];
-static dbdev_tab_t *
-find_dbdev_id(u32 id)
+static dbdev_tab_t *find_dbdev_id(u32 id)
{
int i;
dbdev_tab_t *p;
@@ -190,29 +188,27 @@ find_dbdev_id(u32 id)
return NULL;
}
-void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp)
+void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp)
{
- return phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
+ return phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
}
EXPORT_SYMBOL(au1xxx_ddma_get_nextptr_virt);
-u32
-au1xxx_ddma_add_device(dbdev_tab_t *dev)
+u32 au1xxx_ddma_add_device(dbdev_tab_t *dev)
{
u32 ret = 0;
- dbdev_tab_t *p=NULL;
- static u16 new_id=0x1000;
+ dbdev_tab_t *p;
+ static u16 new_id = 0x1000;
p = find_dbdev_id(~0);
- if ( NULL != p )
- {
+ if (NULL != p) {
memcpy(p, dev, sizeof(dbdev_tab_t));
p->dev_id = DSCR_DEV2CUSTOM_ID(new_id, dev->dev_id);
ret = p->dev_id;
new_id++;
#if 0
- printk("add_device: id:%x flags:%x padd:%x\n",
- p->dev_id, p->dev_flags, p->dev_physaddr );
+ printk(KERN_DEBUG "add_device: id:%x flags:%x padd:%x\n",
+ p->dev_id, p->dev_flags, p->dev_physaddr);
#endif
}
@@ -220,10 +216,8 @@ au1xxx_ddma_add_device(dbdev_tab_t *dev)
}
EXPORT_SYMBOL(au1xxx_ddma_add_device);
-/* Allocate a channel and return a non-zero descriptor if successful.
-*/
-u32
-au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
+/* Allocate a channel and return a non-zero descriptor if successful. */
+u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
void (*callback)(int, void *), void *callparam)
{
unsigned long flags;
@@ -234,7 +228,8 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
chan_tab_t *ctp;
au1x_dma_chan_t *cp;
- /* We do the intialization on the first channel allocation.
+ /*
+ * We do the intialization on the first channel allocation.
* We have to wait because of the interrupt handler initialization
* which can't be done successfully during board set up.
*/
@@ -242,16 +237,17 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
au1xxx_dbdma_init();
dbdma_initialized = 1;
- if ((stp = find_dbdev_id(srcid)) == NULL)
+ stp = find_dbdev_id(srcid);
+ if (stp == NULL)
return 0;
- if ((dtp = find_dbdev_id(destid)) == NULL)
+ dtp = find_dbdev_id(destid);
+ if (dtp == NULL)
return 0;
used = 0;
rv = 0;
- /* Check to see if we can get both channels.
- */
+ /* Check to see if we can get both channels. */
spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags);
if (!(stp->dev_flags & DEV_FLAGS_INUSE) ||
(stp->dev_flags & DEV_FLAGS_ANYUSE)) {
@@ -261,35 +257,30 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
(dtp->dev_flags & DEV_FLAGS_ANYUSE)) {
/* Got destination */
dtp->dev_flags |= DEV_FLAGS_INUSE;
- }
- else {
- /* Can't get dest. Release src.
- */
+ } else {
+ /* Can't get dest. Release src. */
stp->dev_flags &= ~DEV_FLAGS_INUSE;
used++;
}
- }
- else {
+ } else
used++;
- }
spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags);
if (!used) {
- /* Let's see if we can allocate a channel for it.
- */
+ /* Let's see if we can allocate a channel for it. */
ctp = NULL;
chan = 0;
spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags);
- for (i=0; i<NUM_DBDMA_CHANS; i++) {
+ for (i = 0; i < NUM_DBDMA_CHANS; i++)
if (chan_tab_ptr[i] == NULL) {
- /* If kmalloc fails, it is caught below same
+ /*
+ * If kmalloc fails, it is caught below same
* as a channel not available.
*/
ctp = kmalloc(sizeof(chan_tab_t), GFP_ATOMIC);
chan_tab_ptr[i] = ctp;
break;
}
- }
spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags);
if (ctp != NULL) {
@@ -304,8 +295,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
ctp->chan_callback = callback;
ctp->chan_callparam = callparam;
- /* Initialize channel configuration.
- */
+ /* Initialize channel configuration. */
i = 0;
if (stp->dev_intlevel)
i |= DDMA_CFG_SED;
@@ -326,8 +316,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
* operations.
*/
rv = (u32)(&chan_tab_ptr[chan]);
- }
- else {
+ } else {
/* Release devices */
stp->dev_flags &= ~DEV_FLAGS_INUSE;
dtp->dev_flags &= ~DEV_FLAGS_INUSE;
@@ -337,11 +326,11 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
}
EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc);
-/* Set the device width if source or destination is a FIFO.
+/*
+ * Set the device width if source or destination is a FIFO.
* Should be 8, 16, or 32 bits.
*/
-u32
-au1xxx_dbdma_set_devwidth(u32 chanid, int bits)
+u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits)
{
u32 rv;
chan_tab_t *ctp;
@@ -365,10 +354,8 @@ au1xxx_dbdma_set_devwidth(u32 chanid, int bits)
}
EXPORT_SYMBOL(au1xxx_dbdma_set_devwidth);
-/* Allocate a descriptor ring, initializing as much as possible.
-*/
-u32
-au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
+/* Allocate a descriptor ring, initializing as much as possible. */
+u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
{
int i;
u32 desc_base, srcid, destid;
@@ -378,43 +365,45 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
dbdev_tab_t *stp, *dtp;
au1x_ddma_desc_t *dp;
- /* I guess we could check this to be within the
+ /*
+ * I guess we could check this to be within the
* range of the table......
*/
ctp = *((chan_tab_t **)chanid);
stp = ctp->chan_src;
dtp = ctp->chan_dest;
- /* The descriptors must be 32-byte aligned. There is a
+ /*
+ * The descriptors must be 32-byte aligned. There is a
* possibility the allocation will give us such an address,
* and if we try that first we are likely to not waste larger
* slabs of memory.
*/
desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t),
- GFP_KERNEL|GFP_DMA);
+ GFP_KERNEL|GFP_DMA);
if (desc_base == 0)
return 0;
if (desc_base & 0x1f) {
- /* Lost....do it again, allocate extra, and round
+ /*
+ * Lost....do it again, allocate extra, and round
* the address base.
*/
kfree((const void *)desc_base);
i = entries * sizeof(au1x_ddma_desc_t);
i += (sizeof(au1x_ddma_desc_t) - 1);
- if ((desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA)) == 0)
+ desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA);
+ if (desc_base == 0)
return 0;
desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
}
dp = (au1x_ddma_desc_t *)desc_base;
- /* Keep track of the base descriptor.
- */
+ /* Keep track of the base descriptor. */
ctp->chan_desc_base = dp;
- /* Initialize the rings with as much information as we know.
- */
+ /* Initialize the rings with as much information as we know. */
srcid = stp->dev_id;
destid = dtp->dev_id;
@@ -426,11 +415,12 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
cmd0 |= DSCR_CMD0_IE | DSCR_CMD0_CV;
cmd0 |= DSCR_CMD0_ST(DSCR_CMD0_ST_NOCHANGE);
- /* is it mem to mem transfer? */
- if(((DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_THROTTLE) || (DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_ALWAYS)) &&
- ((DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_THROTTLE) || (DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_ALWAYS))) {
- cmd0 |= DSCR_CMD0_MEM;
- }
+ /* Is it mem to mem transfer? */
+ if (((DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_THROTTLE) ||
+ (DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_ALWAYS)) &&
+ ((DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_THROTTLE) ||
+ (DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_ALWAYS)))
+ cmd0 |= DSCR_CMD0_MEM;
switch (stp->dev_devwidth) {
case 8:
@@ -458,15 +448,17 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
break;
}
- /* If the device is marked as an in/out FIFO, ensure it is
+ /*
+ * If the device is marked as an in/out FIFO, ensure it is
* set non-coherent.
*/
if (stp->dev_flags & DEV_FLAGS_IN)
- cmd0 |= DSCR_CMD0_SN; /* Source in fifo */
+ cmd0 |= DSCR_CMD0_SN; /* Source in FIFO */
if (dtp->dev_flags & DEV_FLAGS_OUT)
- cmd0 |= DSCR_CMD0_DN; /* Destination out fifo */
+ cmd0 |= DSCR_CMD0_DN; /* Destination out FIFO */
- /* Set up source1. For now, assume no stride and increment.
+ /*
+ * Set up source1. For now, assume no stride and increment.
* A channel attribute update can change this later.
*/
switch (stp->dev_tsize) {
@@ -485,19 +477,19 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
break;
}
- /* If source input is fifo, set static address.
- */
+ /* If source input is FIFO, set static address. */
if (stp->dev_flags & DEV_FLAGS_IN) {
- if ( stp->dev_flags & DEV_FLAGS_BURSTABLE )
+ if (stp->dev_flags & DEV_FLAGS_BURSTABLE)
src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST);
else
- src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
-
+ src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
}
+
if (stp->dev_physaddr)
src0 = stp->dev_physaddr;
- /* Set up dest1. For now, assume no stride and increment.
+ /*
+ * Set up dest1. For now, assume no stride and increment.
* A channel attribute update can change this later.
*/
switch (dtp->dev_tsize) {
@@ -516,22 +508,24 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
break;
}
- /* If destination output is fifo, set static address.
- */
+ /* If destination output is FIFO, set static address. */
if (dtp->dev_flags & DEV_FLAGS_OUT) {
- if ( dtp->dev_flags & DEV_FLAGS_BURSTABLE )
- dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST);
- else
- dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC);
+ if (dtp->dev_flags & DEV_FLAGS_BURSTABLE)
+ dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST);
+ else
+ dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC);
}
+
if (dtp->dev_physaddr)
dest0 = dtp->dev_physaddr;
#if 0
- printk("did:%x sid:%x cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
- dtp->dev_id, stp->dev_id, cmd0, cmd1, src0, src1, dest0, dest1 );
+ printk(KERN_DEBUG "did:%x sid:%x cmd0:%x cmd1:%x source0:%x "
+ "source1:%x dest0:%x dest1:%x\n",
+ dtp->dev_id, stp->dev_id, cmd0, cmd1, src0,
+ src1, dest0, dest1);
#endif
- for (i=0; i<entries; i++) {
+ for (i = 0; i < entries; i++) {
dp->dscr_cmd0 = cmd0;
dp->dscr_cmd1 = cmd1;
dp->dscr_source0 = src0;
@@ -545,49 +539,49 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
dp++;
}
- /* Make last descrptor point to the first.
- */
+ /* Make last descrptor point to the first. */
dp--;
dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(ctp->chan_desc_base));
ctp->get_ptr = ctp->put_ptr = ctp->cur_ptr = ctp->chan_desc_base;
- return (u32)(ctp->chan_desc_base);
+ return (u32)ctp->chan_desc_base;
}
EXPORT_SYMBOL(au1xxx_dbdma_ring_alloc);
-/* Put a source buffer into the DMA ring.
+/*
+ * Put a source buffer into the DMA ring.
* This updates the source pointer and byte count. Normally used
* for memory to fifo transfers.
*/
-u32
-_au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
+u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
{
chan_tab_t *ctp;
au1x_ddma_desc_t *dp;
- /* I guess we could check this to be within the
+ /*
+ * I guess we could check this to be within the
* range of the table......
*/
- ctp = *((chan_tab_t **)chanid);
+ ctp = *(chan_tab_t **)chanid;
- /* We should have multiple callers for a particular channel,
+ /*
+ * We should have multiple callers for a particular channel,
* an interrupt doesn't affect this pointer nor the descriptor,
* so no locking should be needed.
*/
dp = ctp->put_ptr;
- /* If the descriptor is valid, we are way ahead of the DMA
+ /*
+ * If the descriptor is valid, we are way ahead of the DMA
* engine, so just return an error condition.
*/
- if (dp->dscr_cmd0 & DSCR_CMD0_V) {
+ if (dp->dscr_cmd0 & DSCR_CMD0_V)
return 0;
- }
- /* Load up buffer address and byte count.
- */
+ /* Load up buffer address and byte count. */
dp->dscr_source0 = virt_to_phys(buf);
dp->dscr_cmd1 = nbytes;
- /* Check flags */
+ /* Check flags */
if (flags & DDMA_FLAGS_IE)
dp->dscr_cmd0 |= DSCR_CMD0_IE;
if (flags & DDMA_FLAGS_NOIE)
@@ -595,23 +589,21 @@ _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
/*
* There is an errata on the Au1200/Au1550 parts that could result
- * in "stale" data being DMA'd. It has to do with the snoop logic on
- * the dache eviction buffer. NONCOHERENT_IO is on by default for
- * these parts. If it is fixedin the future, these dma_cache_inv will
+ * in "stale" data being DMA'ed. It has to do with the snoop logic on
+ * the cache eviction buffer. DMA_NONCOHERENT is on by default for
+ * these parts. If it is fixed in the future, these dma_cache_inv will
* just be nothing more than empty macros. See io.h.
- * */
+ */
dma_cache_wback_inv((unsigned long)buf, nbytes);
- dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
+ dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
au_sync();
dma_cache_wback_inv((unsigned long)dp, sizeof(dp));
- ctp->chan_ptr->ddma_dbell = 0;
+ ctp->chan_ptr->ddma_dbell = 0;
- /* Get next descriptor pointer.
- */
+ /* Get next descriptor pointer. */
ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
- /* return something not zero.
- */
+ /* Return something non-zero. */
return nbytes;
}
EXPORT_SYMBOL(_au1xxx_dbdma_put_source);
@@ -654,81 +646,77 @@ _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
dp->dscr_dest0 = virt_to_phys(buf);
dp->dscr_cmd1 = nbytes;
#if 0
- printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
- dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0,
- dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1 );
+ printk(KERN_DEBUG "cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
+ dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0,
+ dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
#endif
/*
* There is an errata on the Au1200/Au1550 parts that could result in
- * "stale" data being DMA'd. It has to do with the snoop logic on the
- * dache eviction buffer. NONCOHERENT_IO is on by default for these
- * parts. If it is fixedin the future, these dma_cache_inv will just
+ * "stale" data being DMA'ed. It has to do with the snoop logic on the
+ * cache eviction buffer. DMA_NONCOHERENT is on by default for these
+ * parts. If it is fixed in the future, these dma_cache_inv will just
* be nothing more than empty macros. See io.h.
- * */
+ */
dma_cache_inv((unsigned long)buf, nbytes);
dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
au_sync();
dma_cache_wback_inv((unsigned long)dp, sizeof(dp));
- ctp->chan_ptr->ddma_dbell = 0;
+ ctp->chan_ptr->ddma_dbell = 0;
- /* Get next descriptor pointer.
- */
+ /* Get next descriptor pointer. */
ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
- /* return something not zero.
- */
+ /* Return something non-zero. */
return nbytes;
}
EXPORT_SYMBOL(_au1xxx_dbdma_put_dest);
-/* Get a destination buffer into the DMA ring.
+/*
+ * Get a destination buffer into the DMA ring.
* Normally used to get a full buffer from the ring during fifo
* to memory transfers. This does not set the valid bit, you will
* have to put another destination buffer to keep the DMA going.
*/
-u32
-au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes)
+u32 au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes)
{
chan_tab_t *ctp;
au1x_ddma_desc_t *dp;
u32 rv;
- /* I guess we could check this to be within the
+ /*
+ * I guess we could check this to be within the
* range of the table......
*/
ctp = *((chan_tab_t **)chanid);
- /* We should have multiple callers for a particular channel,
+ /*
+ * We should have multiple callers for a particular channel,
* an interrupt doesn't affect this pointer nor the descriptor,
* so no locking should be needed.
*/
dp = ctp->get_ptr;
- /* If the descriptor is valid, we are way ahead of the DMA
+ /*
+ * If the descriptor is valid, we are way ahead of the DMA
* engine, so just return an error condition.
*/
if (dp->dscr_cmd0 & DSCR_CMD0_V)
return 0;
- /* Return buffer address and byte count.
- */
+ /* Return buffer address and byte count. */
*buf = (void *)(phys_to_virt(dp->dscr_dest0));
*nbytes = dp->dscr_cmd1;
rv = dp->dscr_stat;
- /* Get next descriptor pointer.
- */
+ /* Get next descriptor pointer. */
ctp->get_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
- /* return something not zero.
- */
+ /* Return something non-zero. */
return rv;
}
-
EXPORT_SYMBOL_GPL(au1xxx_dbdma_get_dest);
-void
-au1xxx_dbdma_stop(u32 chanid)
+void au1xxx_dbdma_stop(u32 chanid)
{
chan_tab_t *ctp;
au1x_dma_chan_t *cp;
@@ -743,7 +731,7 @@ au1xxx_dbdma_stop(u32 chanid)
udelay(1);
halt_timeout++;
if (halt_timeout > 100) {
- printk("warning: DMA channel won't halt\n");
+ printk(KERN_WARNING "warning: DMA channel won't halt\n");
break;
}
}
@@ -753,12 +741,12 @@ au1xxx_dbdma_stop(u32 chanid)
}
EXPORT_SYMBOL(au1xxx_dbdma_stop);
-/* Start using the current descriptor pointer. If the dbdma encounters
- * a not valid descriptor, it will stop. In this case, we can just
+/*
+ * Start using the current descriptor pointer. If the DBDMA encounters
+ * a non-valid descriptor, it will stop. In this case, we can just
* continue by adding a buffer to the list and starting again.
*/
-void
-au1xxx_dbdma_start(u32 chanid)
+void au1xxx_dbdma_start(u32 chanid)
{
chan_tab_t *ctp;
au1x_dma_chan_t *cp;
@@ -773,8 +761,7 @@ au1xxx_dbdma_start(u32 chanid)
}
EXPORT_SYMBOL(au1xxx_dbdma_start);
-void
-au1xxx_dbdma_reset(u32 chanid)
+void au1xxx_dbdma_reset(u32 chanid)
{
chan_tab_t *ctp;
au1x_ddma_desc_t *dp;
@@ -784,14 +771,14 @@ au1xxx_dbdma_reset(u32 chanid)
ctp = *((chan_tab_t **)chanid);
ctp->get_ptr = ctp->put_ptr = ctp->cur_ptr = ctp->chan_desc_base;
- /* Run through the descriptors and reset the valid indicator.
- */
+ /* Run through the descriptors and reset the valid indicator. */
dp = ctp->chan_desc_base;
do {
dp->dscr_cmd0 &= ~DSCR_CMD0_V;
- /* reset our SW status -- this is used to determine
- * if a descriptor is in use by upper level SW. Since
+ /*
+ * Reset our software status -- this is used to determine
+ * if a descriptor is in use by upper level software. Since
* posting can reset 'V' bit.
*/
dp->sw_status = 0;
@@ -800,8 +787,7 @@ au1xxx_dbdma_reset(u32 chanid)
}
EXPORT_SYMBOL(au1xxx_dbdma_reset);
-u32
-au1xxx_get_dma_residue(u32 chanid)
+u32 au1xxx_get_dma_residue(u32 chanid)
{
chan_tab_t *ctp;
au1x_dma_chan_t *cp;
@@ -810,18 +796,15 @@ au1xxx_get_dma_residue(u32 chanid)
ctp = *((chan_tab_t **)chanid);
cp = ctp->chan_ptr;
- /* This is only valid if the channel is stopped.
- */
+ /* This is only valid if the channel is stopped. */
rv = cp->ddma_bytecnt;
au_sync();
return rv;
}
-
EXPORT_SYMBOL_GPL(au1xxx_get_dma_residue);
-void
-au1xxx_dbdma_chan_free(u32 chanid)
+void au1xxx_dbdma_chan_free(u32 chanid)
{
chan_tab_t *ctp;
dbdev_tab_t *stp, *dtp;
@@ -842,8 +825,7 @@ au1xxx_dbdma_chan_free(u32 chanid)
}
EXPORT_SYMBOL(au1xxx_dbdma_chan_free);
-static irqreturn_t
-dbdma_interrupt(int irq, void *dev_id)
+static irqreturn_t dbdma_interrupt(int irq, void *dev_id)
{
u32 intstat;
u32 chan_index;
@@ -859,13 +841,12 @@ dbdma_interrupt(int irq, void *dev_id)
cp = ctp->chan_ptr;
dp = ctp->cur_ptr;
- /* Reset interrupt.
- */
+ /* Reset interrupt. */
cp->ddma_irq = 0;
au_sync();
if (ctp->chan_callback)
- (ctp->chan_callback)(irq, ctp->chan_callparam);
+ ctp->chan_callback(irq, ctp->chan_callparam);
ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
return IRQ_RETVAL(1);
@@ -890,47 +871,47 @@ static void au1xxx_dbdma_init(void)
if (request_irq(irq_nr, dbdma_interrupt, IRQF_DISABLED,
"Au1xxx dbdma", (void *)dbdma_gptr))
- printk("Can't get 1550 dbdma irq");
+ printk(KERN_ERR "Can't get 1550 dbdma irq");
}
-void
-au1xxx_dbdma_dump(u32 chanid)
+void au1xxx_dbdma_dump(u32 chanid)
{
- chan_tab_t *ctp;
- au1x_ddma_desc_t *dp;
- dbdev_tab_t *stp, *dtp;
- au1x_dma_chan_t *cp;
- u32 i = 0;
+ chan_tab_t *ctp;
+ au1x_ddma_desc_t *dp;
+ dbdev_tab_t *stp, *dtp;
+ au1x_dma_chan_t *cp;
+ u32 i = 0;
ctp = *((chan_tab_t **)chanid);
stp = ctp->chan_src;
dtp = ctp->chan_dest;
cp = ctp->chan_ptr;
- printk("Chan %x, stp %x (dev %d) dtp %x (dev %d) \n",
- (u32)ctp, (u32)stp, stp - dbdev_tab, (u32)dtp, dtp - dbdev_tab);
- printk("desc base %x, get %x, put %x, cur %x\n",
- (u32)(ctp->chan_desc_base), (u32)(ctp->get_ptr),
- (u32)(ctp->put_ptr), (u32)(ctp->cur_ptr));
-
- printk("dbdma chan %x\n", (u32)cp);
- printk("cfg %08x, desptr %08x, statptr %08x\n",
- cp->ddma_cfg, cp->ddma_desptr, cp->ddma_statptr);
- printk("dbell %08x, irq %08x, stat %08x, bytecnt %08x\n",
- cp->ddma_dbell, cp->ddma_irq, cp->ddma_stat, cp->ddma_bytecnt);
-
-
- /* Run through the descriptors
- */
+ printk(KERN_DEBUG "Chan %x, stp %x (dev %d) dtp %x (dev %d) \n",
+ (u32)ctp, (u32)stp, stp - dbdev_tab, (u32)dtp,
+ dtp - dbdev_tab);
+ printk(KERN_DEBUG "desc base %x, get %x, put %x, cur %x\n",
+ (u32)(ctp->chan_desc_base), (u32)(ctp->get_ptr),
+ (u32)(ctp->put_ptr), (u32)(ctp->cur_ptr));
+
+ printk(KERN_DEBUG "dbdma chan %x\n", (u32)cp);
+ printk(KERN_DEBUG "cfg %08x, desptr %08x, statptr %08x\n",
+ cp->ddma_cfg, cp->ddma_desptr, cp->ddma_statptr);
+ printk(KERN_DEBUG "dbell %08x, irq %08x, stat %08x, bytecnt %08x\n",
+ cp->ddma_dbell, cp->ddma_irq, cp->ddma_stat,
+ cp->ddma_bytecnt);
+
+ /* Run through the descriptors */
dp = ctp->chan_desc_base;
do {
- printk("Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n",
- i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
- printk("src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n",
- dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
- printk("stat %08x, nxtptr %08x\n",
- dp->dscr_stat, dp->dscr_nxtptr);
+ printk(KERN_DEBUG "Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n",
+ i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
+ printk(KERN_DEBUG "src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n",
+ dp->dscr_source0, dp->dscr_source1,
+ dp->dscr_dest0, dp->dscr_dest1);
+ printk(KERN_DEBUG "stat %08x, nxtptr %08x\n",
+ dp->dscr_stat, dp->dscr_nxtptr);
dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
} while (dp != ctp->chan_desc_base);
}
@@ -938,32 +919,33 @@ au1xxx_dbdma_dump(u32 chanid)
/* Put a descriptor into the DMA ring.
* This updates the source/destination pointers and byte count.
*/
-u32
-au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr )
+u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr)
{
chan_tab_t *ctp;
au1x_ddma_desc_t *dp;
- u32 nbytes=0;
+ u32 nbytes = 0;
- /* I guess we could check this to be within the
- * range of the table......
- */
+ /*
+ * I guess we could check this to be within the
+ * range of the table......
+ */
ctp = *((chan_tab_t **)chanid);
- /* We should have multiple callers for a particular channel,
- * an interrupt doesn't affect this pointer nor the descriptor,
- * so no locking should be needed.
- */
+ /*
+ * We should have multiple callers for a particular channel,
+ * an interrupt doesn't affect this pointer nor the descriptor,
+ * so no locking should be needed.
+ */
dp = ctp->put_ptr;
- /* If the descriptor is valid, we are way ahead of the DMA
- * engine, so just return an error condition.
- */
+ /*
+ * If the descriptor is valid, we are way ahead of the DMA
+ * engine, so just return an error condition.
+ */
if (dp->dscr_cmd0 & DSCR_CMD0_V)
return 0;
- /* Load up buffer addresses and byte count.
- */
+ /* Load up buffer addresses and byte count. */
dp->dscr_dest0 = dscr->dscr_dest0;
dp->dscr_source0 = dscr->dscr_source0;
dp->dscr_dest1 = dscr->dscr_dest1;
@@ -975,14 +957,11 @@ au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr )
dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
ctp->chan_ptr->ddma_dbell = 0;
- /* Get next descriptor pointer.
- */
+ /* Get next descriptor pointer. */
ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
- /* return something not zero.
- */
+ /* Return something non-zero. */
return nbytes;
}
#endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
-
diff --git a/arch/mips/au1000/common/dbg_io.c b/arch/mips/au1000/common/dbg_io.c
index eae1bb2ca26e..af5be7df2f2a 100644
--- a/arch/mips/au1000/common/dbg_io.c
+++ b/arch/mips/au1000/common/dbg_io.c
@@ -1,3 +1,4 @@
+#include <linux/types.h>
#include <asm/mach-au1x00/au1000.h>
@@ -8,12 +9,6 @@
* uart to be used for debugging.
*/
#define DEBUG_BASE UART_DEBUG_BASE
-/**/
-
-/* we need uint32 uint8 */
-/* #include "types.h" */
-typedef unsigned char uint8;
-typedef unsigned int uint32;
#define UART16550_BAUD_2400 2400
#define UART16550_BAUD_4800 4800
@@ -51,17 +46,15 @@ typedef unsigned int uint32;
#define UART_MOD_CNTRL 0x100 /* Module Control */
/* memory-mapped read/write of the port */
-#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff)
-#define UART16550_WRITE(y, z) (au_writel(z&0xff, DEBUG_BASE + y))
+#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff)
+#define UART16550_WRITE(y, z) (au_writel(z & 0xff, DEBUG_BASE + y))
extern unsigned long calc_clock(void);
-void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
+void debugInit(u32 baud, u8 data, u8 parity, u8 stop)
{
-
- if (UART16550_READ(UART_MOD_CNTRL) != 0x3) {
+ if (UART16550_READ(UART_MOD_CNTRL) != 0x3)
UART16550_WRITE(UART_MOD_CNTRL, 3);
- }
calc_clock();
/* disable interrupts */
@@ -69,7 +62,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
/* set up baud rate */
{
- uint32 divisor;
+ u32 divisor;
/* set divisor */
divisor = get_au1x00_uart_baud_base() / baud;
@@ -80,9 +73,9 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
UART16550_WRITE(UART_LCR, (data | parity | stop));
}
-static int remoteDebugInitialized = 0;
+static int remoteDebugInitialized;
-uint8 getDebugChar(void)
+u8 getDebugChar(void)
{
if (!remoteDebugInitialized) {
remoteDebugInitialized = 1;
@@ -92,15 +85,13 @@ uint8 getDebugChar(void)
UART16550_STOP_1BIT);
}
- while((UART16550_READ(UART_LSR) & 0x1) == 0);
+ while ((UART16550_READ(UART_LSR) & 0x1) == 0);
return UART16550_READ(UART_RX);
}
-int putDebugChar(uint8 byte)
+int putDebugChar(u8 byte)
{
-// int i;
-
if (!remoteDebugInitialized) {
remoteDebugInitialized = 1;
debugInit(UART16550_BAUD_115200,
@@ -109,9 +100,8 @@ int putDebugChar(uint8 byte)
UART16550_STOP_1BIT);
}
- while ((UART16550_READ(UART_LSR)&0x40) == 0);
+ while ((UART16550_READ(UART_LSR) & 0x40) == 0);
UART16550_WRITE(UART_TX, byte);
- //for (i=0;i<0xfff;i++);
return 1;
}
diff --git a/arch/mips/au1000/common/dma.c b/arch/mips/au1000/common/dma.c
index 95f69ea146e9..d6fbda232e6a 100644
--- a/arch/mips/au1000/common/dma.c
+++ b/arch/mips/au1000/common/dma.c
@@ -1,12 +1,11 @@
/*
*
* BRIEF MODULE DESCRIPTION
- * A DMA channel allocator for Au1000. API is modeled loosely off of
+ * A DMA channel allocator for Au1x00. API is modeled loosely off of
* linux/kernel/dma.c.
*
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * stevel@mvista.com or source@mvista.com
+ * Copyright 2000, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
* Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
*
* This program is free software; you can redistribute it and/or modify it
@@ -39,7 +38,8 @@
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/au1000_dma.h>
-#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
+#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || \
+ defined(CONFIG_SOC_AU1100)
/*
* A note on resource allocation:
*
@@ -56,7 +56,6 @@
* returned from request_dma.
*/
-
DEFINE_SPINLOCK(au1000_dma_spin_lock);
struct dma_chan au1000_dma_table[NUM_AU1000_DMA_CHANNELS] = {
@@ -71,7 +70,7 @@ struct dma_chan au1000_dma_table[NUM_AU1000_DMA_CHANNELS] = {
};
EXPORT_SYMBOL(au1000_dma_table);
-// Device FIFO addresses and default DMA modes
+/* Device FIFO addresses and default DMA modes */
static const struct dma_dev {
unsigned int fifo_addr;
unsigned int dma_mode;
@@ -80,8 +79,8 @@ static const struct dma_dev {
{UART0_ADDR + UART_RX, 0},
{0, 0},
{0, 0},
- {AC97C_DATA, DMA_DW16 }, // coherent
- {AC97C_DATA, DMA_DR | DMA_DW16 }, // coherent
+ {AC97C_DATA, DMA_DW16 }, /* coherent */
+ {AC97C_DATA, DMA_DR | DMA_DW16 }, /* coherent */
{UART3_ADDR + UART_TX, DMA_DW8 | DMA_NC},
{UART3_ADDR + UART_RX, DMA_DR | DMA_DW8 | DMA_NC},
{USBD_EP0RD, DMA_DR | DMA_DW8 | DMA_NC},
@@ -101,10 +100,10 @@ int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
struct dma_chan *chan;
for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) {
- if ((chan = get_dma_chan(i)) != NULL) {
+ chan = get_dma_chan(i);
+ if (chan != NULL)
len += sprintf(buf + len, "%2d: %s\n",
i, chan->dev_str);
- }
}
if (fpos >= len) {
@@ -113,18 +112,19 @@ int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
return 0;
}
*start = buf + fpos;
- if ((len -= fpos) > length)
+ len -= fpos;
+ if (len > length)
return length;
*eof = 1;
return len;
}
-// Device FIFO addresses and default DMA modes - 2nd bank
+/* Device FIFO addresses and default DMA modes - 2nd bank */
static const struct dma_dev dma_dev_table_bank2[DMA_NUM_DEV_BANK2] = {
- {SD0_XMIT_FIFO, DMA_DS | DMA_DW8}, // coherent
- {SD0_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8}, // coherent
- {SD1_XMIT_FIFO, DMA_DS | DMA_DW8}, // coherent
- {SD1_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8} // coherent
+ { SD0_XMIT_FIFO, DMA_DS | DMA_DW8 }, /* coherent */
+ { SD0_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8 }, /* coherent */
+ { SD1_XMIT_FIFO, DMA_DS | DMA_DW8 }, /* coherent */
+ { SD1_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8 } /* coherent */
};
void dump_au1000_dma_channel(unsigned int dmanr)
@@ -150,7 +150,6 @@ void dump_au1000_dma_channel(unsigned int dmanr)
au_readl(chan->io + DMA_BUFFER1_COUNT));
}
-
/*
* Finds a free channel, and binds the requested device to it.
* Returns the allocated channel number, or negative on error.
@@ -169,14 +168,14 @@ int request_au1000_dma(int dev_id, const char *dev_str,
if (dev_id < 0 || dev_id >= (DMA_NUM_DEV + DMA_NUM_DEV_BANK2))
return -EINVAL;
#else
- if (dev_id < 0 || dev_id >= DMA_NUM_DEV)
+ if (dev_id < 0 || dev_id >= DMA_NUM_DEV)
return -EINVAL;
#endif
- for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) {
+ for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++)
if (au1000_dma_table[i].dev_id < 0)
break;
- }
+
if (i == NUM_AU1000_DMA_CHANNELS)
return -ENODEV;
@@ -185,15 +184,15 @@ int request_au1000_dma(int dev_id, const char *dev_str,
if (dev_id >= DMA_NUM_DEV) {
dev_id -= DMA_NUM_DEV;
dev = &dma_dev_table_bank2[dev_id];
- } else {
+ } else
dev = &dma_dev_table[dev_id];
- }
if (irqhandler) {
chan->irq = AU1000_DMA_INT_BASE + i;
chan->irq_dev = irq_dev_id;
- if ((ret = request_irq(chan->irq, irqhandler, irqflags,
- dev_str, chan->irq_dev))) {
+ ret = request_irq(chan->irq, irqhandler, irqflags, dev_str,
+ chan->irq_dev);
+ if (ret) {
chan->irq = 0;
chan->irq_dev = NULL;
return ret;
@@ -203,7 +202,7 @@ int request_au1000_dma(int dev_id, const char *dev_str,
chan->irq_dev = NULL;
}
- // fill it in
+ /* fill it in */
chan->io = DMA_CHANNEL_BASE + i * DMA_CHANNEL_LEN;
chan->dev_id = dev_id;
chan->dev_str = dev_str;
@@ -220,8 +219,9 @@ EXPORT_SYMBOL(request_au1000_dma);
void free_au1000_dma(unsigned int dmanr)
{
struct dma_chan *chan = get_dma_chan(dmanr);
+
if (!chan) {
- printk("Trying to free DMA%d\n", dmanr);
+ printk(KERN_ERR "Error trying to free DMA%d\n", dmanr);
return;
}
@@ -235,4 +235,4 @@ void free_au1000_dma(unsigned int dmanr)
}
EXPORT_SYMBOL(free_au1000_dma);
-#endif // AU1000 AU1500 AU1100
+#endif /* AU1000 AU1500 AU1100 */
diff --git a/arch/mips/au1000/common/gpio.c b/arch/mips/au1000/common/gpio.c
index 525452589971..b485d94ce8a5 100644
--- a/arch/mips/au1000/common/gpio.c
+++ b/arch/mips/au1000/common/gpio.c
@@ -69,7 +69,7 @@ static int au1xxx_gpio2_direction_output(unsigned gpio, int value)
static int au1xxx_gpio1_read(unsigned gpio)
{
- return ((gpio1->pinstaterd >> gpio) & 0x01);
+ return (gpio1->pinstaterd >> gpio) & 0x01;
}
static void au1xxx_gpio1_write(unsigned gpio, int value)
@@ -104,7 +104,6 @@ int au1xxx_gpio_get_value(unsigned gpio)
else
return au1xxx_gpio1_read(gpio);
}
-
EXPORT_SYMBOL(au1xxx_gpio_get_value);
void au1xxx_gpio_set_value(unsigned gpio, int value)
@@ -118,7 +117,6 @@ void au1xxx_gpio_set_value(unsigned gpio, int value)
else
au1xxx_gpio1_write(gpio, value);
}
-
EXPORT_SYMBOL(au1xxx_gpio_set_value);
int au1xxx_gpio_direction_input(unsigned gpio)
@@ -132,7 +130,6 @@ int au1xxx_gpio_direction_input(unsigned gpio)
return au1xxx_gpio1_direction_input(gpio);
}
-
EXPORT_SYMBOL(au1xxx_gpio_direction_input);
int au1xxx_gpio_direction_output(unsigned gpio, int value)
@@ -146,5 +143,4 @@ int au1xxx_gpio_direction_output(unsigned gpio, int value)
return au1xxx_gpio1_direction_output(gpio, value);
}
-
EXPORT_SYMBOL(au1xxx_gpio_direction_output);
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index f0626992fd75..40c6ceceb5f9 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -210,10 +210,8 @@ static inline void mask_and_ack_either_edge_irq(unsigned int irq_nr)
au_sync();
}
-
static inline void mask_and_ack_level_irq(unsigned int irq_nr)
{
-
local_disable_irq(irq_nr);
au_sync();
#if defined(CONFIG_MIPS_PB1000)
@@ -263,14 +261,14 @@ void restore_local_and_enable(int controller, unsigned long mask)
unsigned long flags, new_mask;
spin_lock_irqsave(&irq_lock, flags);
- for (i = 0; i < 32; i++) {
+ for (i = 0; i < 32; i++)
if (mask & (1 << i)) {
if (controller)
local_enable_irq(i + 32);
else
local_enable_irq(i);
}
- }
+
if (controller)
new_mask = au_readl(IC1_MASKSET);
else
diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c
index 7e966b31e3e1..7866cf50cf99 100644
--- a/arch/mips/au1000/common/pci.c
+++ b/arch/mips/au1000/common/pci.c
@@ -2,9 +2,8 @@
* BRIEF MODULE DESCRIPTION
* Alchemy/AMD Au1x00 PCI support.
*
- * Copyright 2001-2003, 2007 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001-2003, 2007-2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
@@ -86,9 +85,9 @@ static int __init au1x_pci_setup(void)
u32 prid = read_c0_prid();
if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
- au_writel((1 << 16) | au_readl(Au1500_PCI_CFG),
- Au1500_PCI_CFG);
- printk("Non-coherent PCI accesses enabled\n");
+ au_writel((1 << 16) | au_readl(Au1500_PCI_CFG),
+ Au1500_PCI_CFG);
+ printk(KERN_INFO "Non-coherent PCI accesses enabled\n");
}
}
#endif
diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c
index 31d2a2270878..8cae7753ef79 100644
--- a/arch/mips/au1000/common/platform.c
+++ b/arch/mips/au1000/common/platform.c
@@ -269,8 +269,8 @@ static struct platform_device au1x00_pcmcia_device = {
#ifdef SMBUS_PSC_BASE
static struct resource pbdb_smbus_resources[] = {
{
- .start = SMBUS_PSC_BASE,
- .end = SMBUS_PSC_BASE + 0x24 - 1,
+ .start = CPHYSADDR(SMBUS_PSC_BASE),
+ .end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff),
.flags = IORESOURCE_MEM,
},
};
@@ -302,16 +302,17 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
#endif
};
-int __init au1xxx_platform_init(void)
+static int __init au1xxx_platform_init(void)
{
unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
int i;
/* Fill up uartclk. */
- for (i = 0; au1x00_uart_data[i].flags ; i++)
+ for (i = 0; au1x00_uart_data[i].flags; i++)
au1x00_uart_data[i].uartclk = uartclk;
- return platform_add_devices(au1xxx_platform_devices, ARRAY_SIZE(au1xxx_platform_devices));
+ return platform_add_devices(au1xxx_platform_devices,
+ ARRAY_SIZE(au1xxx_platform_devices));
}
arch_initcall(au1xxx_platform_init);
diff --git a/arch/mips/au1000/common/power.c b/arch/mips/au1000/common/power.c
index a8cd2c1b9e1b..2166b9e1e80c 100644
--- a/arch/mips/au1000/common/power.c
+++ b/arch/mips/au1000/common/power.c
@@ -1,10 +1,9 @@
/*
* BRIEF MODULE DESCRIPTION
- * Au1000 Power Management routines.
+ * Au1xx0 Power Management routines.
*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* Some of the routines are right out of init/main.c, whose
* copyrights apply here.
@@ -43,10 +42,10 @@
#ifdef CONFIG_PM
#define DEBUG 1
-#ifdef DEBUG
-# define DPRINTK(fmt, args...) printk("%s: " fmt, __func__, ## args)
+#ifdef DEBUG
+#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__, ## args)
#else
-# define DPRINTK(fmt, args...)
+#define DPRINTK(fmt, args...)
#endif
static void au1000_calibrate_delay(void);
@@ -57,7 +56,8 @@ extern void local_enable_irq(unsigned int irq_nr);
static DEFINE_SPINLOCK(pm_lock);
-/* We need to save/restore a bunch of core registers that are
+/*
+ * We need to save/restore a bunch of core registers that are
* either volatile or reset to some state across a processor sleep.
* If reading a register doesn't provide a proper result for a
* later restore, we have to provide a function for loading that
@@ -78,24 +78,25 @@ static unsigned int sleep_usbhost_enable;
static unsigned int sleep_usbdev_enable;
static unsigned int sleep_static_memctlr[4][3];
-/* Define this to cause the value you write to /proc/sys/pm/sleep to
+/*
+ * Define this to cause the value you write to /proc/sys/pm/sleep to
* set the TOY timer for the amount of time you want to sleep.
* This is done mainly for testing, but may be useful in other cases.
* The value is number of 32KHz ticks to sleep.
*/
#define SLEEP_TEST_TIMEOUT 1
-#ifdef SLEEP_TEST_TIMEOUT
-static int sleep_ticks;
+#ifdef SLEEP_TEST_TIMEOUT
+static int sleep_ticks;
void wakeup_counter0_set(int ticks);
#endif
-static void
-save_core_regs(void)
+static void save_core_regs(void)
{
extern void save_au1xxx_intctl(void);
extern void pm_eth0_shutdown(void);
- /* Do the serial ports.....these really should be a pm_*
+ /*
+ * Do the serial ports.....these really should be a pm_*
* registered function by the driver......but of course the
* standard serial driver doesn't understand our Au1xxx
* unique registers.
@@ -106,27 +107,24 @@ save_core_regs(void)
sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK);
sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL);
- /* Shutdown USB host/device.
- */
+ /* Shutdown USB host/device. */
sleep_usbhost_enable = au_readl(USB_HOST_CONFIG);
- /* There appears to be some undocumented reset register....
- */
+ /* There appears to be some undocumented reset register.... */
au_writel(0, 0xb0100004); au_sync();
au_writel(0, USB_HOST_CONFIG); au_sync();
sleep_usbdev_enable = au_readl(USBD_ENABLE);
au_writel(0, USBD_ENABLE); au_sync();
- /* Save interrupt controller state.
- */
+ /* Save interrupt controller state. */
save_au1xxx_intctl();
- /* Clocks and PLLs.
- */
+ /* Clocks and PLLs. */
sleep_aux_pll_cntrl = au_readl(SYS_AUXPLL);
- /* We don't really need to do this one, but unless we
+ /*
+ * We don't really need to do this one, but unless we
* write it again it won't have a valid value if we
* happen to read it.
*/
@@ -134,8 +132,7 @@ save_core_regs(void)
sleep_pin_function = au_readl(SYS_PINFUNC);
- /* Save the static memory controller configuration.
- */
+ /* Save the static memory controller configuration. */
sleep_static_memctlr[0][0] = au_readl(MEM_STCFG0);
sleep_static_memctlr[0][1] = au_readl(MEM_STTIME0);
sleep_static_memctlr[0][2] = au_readl(MEM_STADDR0);
@@ -150,8 +147,7 @@ save_core_regs(void)
sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3);
}
-static void
-restore_core_regs(void)
+static void restore_core_regs(void)
{
extern void restore_au1xxx_intctl(void);
extern void wakeup_counter0_adjust(void);
@@ -160,8 +156,7 @@ restore_core_regs(void)
au_writel(sleep_cpu_pll_cntrl, SYS_CPUPLL); au_sync();
au_writel(sleep_pin_function, SYS_PINFUNC); au_sync();
- /* Restore the static memory controller configuration.
- */
+ /* Restore the static memory controller configuration. */
au_writel(sleep_static_memctlr[0][0], MEM_STCFG0);
au_writel(sleep_static_memctlr[0][1], MEM_STTIME0);
au_writel(sleep_static_memctlr[0][2], MEM_STADDR0);
@@ -175,7 +170,8 @@ restore_core_regs(void)
au_writel(sleep_static_memctlr[3][1], MEM_STTIME3);
au_writel(sleep_static_memctlr[3][2], MEM_STADDR3);
- /* Enable the UART if it was enabled before sleep.
+ /*
+ * Enable the UART if it was enabled before sleep.
* I guess I should define module control bits........
*/
if (sleep_uart0_enable & 0x02) {
@@ -202,7 +198,7 @@ void wakeup_from_suspend(void)
int au_sleep(void)
{
unsigned long wakeup, flags;
- extern void save_and_sleep(void);
+ extern void save_and_sleep(void);
spin_lock_irqsave(&pm_lock, flags);
@@ -210,23 +206,22 @@ int au_sleep(void)
flush_cache_all();
- /** The code below is all system dependent and we should probably
+ /**
+ ** The code below is all system dependent and we should probably
** have a function call out of here to set this up. You need
** to configure the GPIO or timer interrupts that will bring
** you out of sleep.
** For testing, the TOY counter wakeup is useful.
**/
-
#if 0
au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD);
- /* gpio 6 can cause a wake up event */
+ /* GPIO 6 can cause a wake up event */
wakeup = au_readl(SYS_WAKEMSK);
wakeup &= ~(1 << 8); /* turn off match20 wakeup */
- wakeup |= 1 << 6; /* turn on gpio 6 wakeup */
+ wakeup |= 1 << 6; /* turn on GPIO 6 wakeup */
#else
- /* For testing, allow match20 to wake us up.
- */
+ /* For testing, allow match20 to wake us up. */
#ifdef SLEEP_TEST_TIMEOUT
wakeup_counter0_set(sleep_ticks);
#endif
@@ -240,7 +235,8 @@ int au_sleep(void)
save_and_sleep();
- /* after a wakeup, the cpu vectors back to 0x1fc00000 so
+ /*
+ * After a wakeup, the cpu vectors back to 0x1fc00000, so
* it's up to the boot code to get us back here.
*/
restore_core_regs();
@@ -248,24 +244,22 @@ int au_sleep(void)
return 0;
}
-static int pm_do_sleep(ctl_table * ctl, int write, struct file *file,
- void __user *buffer, size_t * len, loff_t *ppos)
+static int pm_do_sleep(ctl_table *ctl, int write, struct file *file,
+ void __user *buffer, size_t *len, loff_t *ppos)
{
#ifdef SLEEP_TEST_TIMEOUT
#define TMPBUFLEN2 16
char buf[TMPBUFLEN2], *p;
#endif
- if (!write) {
+ if (!write)
*len = 0;
- } else {
+ else {
#ifdef SLEEP_TEST_TIMEOUT
- if (*len > TMPBUFLEN2 - 1) {
+ if (*len > TMPBUFLEN2 - 1)
return -EFAULT;
- }
- if (copy_from_user(buf, buffer, *len)) {
+ if (copy_from_user(buf, buffer, *len))
return -EFAULT;
- }
buf[*len] = 0;
p = buf;
sleep_ticks = simple_strtoul(p, &p, 0);
@@ -276,8 +270,8 @@ static int pm_do_sleep(ctl_table * ctl, int write, struct file *file,
return 0;
}
-static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
- void __user *buffer, size_t * len, loff_t *ppos)
+static int pm_do_freq(ctl_table *ctl, int write, struct file *file,
+ void __user *buffer, size_t *len, loff_t *ppos)
{
int retval = 0, i;
unsigned long val, pll;
@@ -285,14 +279,14 @@ static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
#define MAX_CPU_FREQ 396
char buf[TMPBUFLEN], *p;
unsigned long flags, intc0_mask, intc1_mask;
- unsigned long old_baud_base, old_cpu_freq, baud_rate, old_clk,
- old_refresh;
+ unsigned long old_baud_base, old_cpu_freq, old_clk, old_refresh;
unsigned long new_baud_base, new_cpu_freq, new_clk, new_refresh;
+ unsigned long baud_rate;
spin_lock_irqsave(&pm_lock, flags);
- if (!write) {
+ if (!write)
*len = 0;
- } else {
+ else {
/* Parse the new frequency */
if (*len > TMPBUFLEN - 1) {
spin_unlock_irqrestore(&pm_lock, flags);
@@ -312,7 +306,7 @@ static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
pll = val / 12;
if ((pll > 33) || (pll < 7)) { /* 396 MHz max, 84 MHz min */
- /* revisit this for higher speed cpus */
+ /* Revisit this for higher speed CPUs */
spin_unlock_irqrestore(&pm_lock, flags);
return -EFAULT;
}
@@ -321,30 +315,28 @@ static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
old_cpu_freq = get_au1x00_speed();
new_cpu_freq = pll * 12 * 1000000;
- new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
+ new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)
+ & 0x03) + 2) * 16));
set_au1x00_speed(new_cpu_freq);
set_au1x00_uart_baud_base(new_baud_base);
old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff;
- new_refresh =
- ((old_refresh * new_cpu_freq) /
- old_cpu_freq) | (au_readl(MEM_SDREFCFG) & ~0x1ffffff);
+ new_refresh = ((old_refresh * new_cpu_freq) / old_cpu_freq) |
+ (au_readl(MEM_SDREFCFG) & ~0x1ffffff);
au_writel(pll, SYS_CPUPLL);
au_sync_delay(1);
au_writel(new_refresh, MEM_SDREFCFG);
au_sync_delay(1);
- for (i = 0; i < 4; i++) {
- if (au_readl
- (UART_BASE + UART_MOD_CNTRL +
- i * 0x00100000) == 3) {
- old_clk =
- au_readl(UART_BASE + UART_CLK +
- i * 0x00100000);
- // baud_rate = baud_base/clk
+ for (i = 0; i < 4; i++)
+ if (au_readl(UART_BASE + UART_MOD_CNTRL +
+ i * 0x00100000) == 3) {
+ old_clk = au_readl(UART_BASE + UART_CLK +
+ i * 0x00100000);
baud_rate = old_baud_base / old_clk;
- /* we won't get an exact baud rate and the error
+ /*
+ * We won't get an exact baud rate and the error
* could be significant enough that our new
* calculation will result in a clock that will
* give us a baud rate that's too far off from
@@ -359,18 +351,14 @@ static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
else if (baud_rate > 17000)
baud_rate = 19200;
else
- (baud_rate = 9600);
- // new_clk = new_baud_base/baud_rate
+ baud_rate = 9600;
new_clk = new_baud_base / baud_rate;
- au_writel(new_clk,
- UART_BASE + UART_CLK +
- i * 0x00100000);
+ au_writel(new_clk, UART_BASE + UART_CLK +
+ i * 0x00100000);
au_sync_delay(10);
}
- }
}
-
/*
* We don't want _any_ interrupts other than match20. Otherwise our
* au1000_calibrate_delay() calculation will be off, potentially a lot.
@@ -428,14 +416,15 @@ static int __init pm_init(void)
__initcall(pm_init);
-
/*
* This is right out of init/main.c
*/
-/* This is the number of bits of precision for the loops_per_jiffy. Each
- bit takes on average 1.5/HZ seconds. This (like the original) is a little
- better than 1% */
+/*
+ * This is the number of bits of precision for the loops_per_jiffy.
+ * Each bit takes on average 1.5/HZ seconds. This (like the original)
+ * is a little better than 1%.
+ */
#define LPS_PREC 8
static void au1000_calibrate_delay(void)
@@ -443,14 +432,14 @@ static void au1000_calibrate_delay(void)
unsigned long ticks, loopbit;
int lps_precision = LPS_PREC;
- loops_per_jiffy = (1 << 12);
+ loops_per_jiffy = 1 << 12;
while (loops_per_jiffy <<= 1) {
- /* wait for "start of" clock tick */
+ /* Wait for "start of" clock tick */
ticks = jiffies;
while (ticks == jiffies)
/* nothing */ ;
- /* Go .. */
+ /* Go ... */
ticks = jiffies;
__delay(loops_per_jiffy);
ticks = jiffies - ticks;
@@ -458,8 +447,10 @@ static void au1000_calibrate_delay(void)
break;
}
-/* Do a binary approximation to get loops_per_jiffy set to equal one clock
- (up to lps_precision bits) */
+ /*
+ * Do a binary approximation to get loops_per_jiffy set to be equal
+ * one clock (up to lps_precision bits)
+ */
loops_per_jiffy >>= 1;
loopbit = loops_per_jiffy;
while (lps_precision-- && (loopbit >>= 1)) {
@@ -472,4 +463,4 @@ static void au1000_calibrate_delay(void)
loops_per_jiffy &= ~loopbit;
}
}
-#endif /* CONFIG_PM */
+#endif /* CONFIG_PM */
diff --git a/arch/mips/au1000/common/prom.c b/arch/mips/au1000/common/prom.c
index f10af829e4ec..18b310b475ca 100644
--- a/arch/mips/au1000/common/prom.c
+++ b/arch/mips/au1000/common/prom.c
@@ -3,9 +3,8 @@
* BRIEF MODULE DESCRIPTION
* PROM library initialisation code, supports YAMON and U-Boot.
*
- * Copyright 2000, 2001, 2006 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2000-2001, 2006, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This file was derived from Carsten Langgaard's
* arch/mips/mips-boards/xx files.
@@ -57,7 +56,7 @@ void prom_init_cmdline(void)
actr = 1; /* Always ignore argv[0] */
cp = &(arcs_cmdline[0]);
- while(actr < prom_argc) {
+ while (actr < prom_argc) {
strcpy(cp, prom_argv[actr]);
cp += strlen(prom_argv[actr]);
*cp++ = ' ';
@@ -84,10 +83,8 @@ char *prom_getenv(char *envname)
if (yamon) {
if (strcmp(envname, *env++) == 0)
return *env;
- } else {
- if (strncmp(envname, *env, i) == 0 && (*env)[i] == '=')
- return *env + i + 1;
- }
+ } else if (strncmp(envname, *env, i) == 0 && (*env)[i] == '=')
+ return *env + i + 1;
env++;
}
@@ -110,13 +107,13 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
{
int i;
- for(i = 0; i < 6; i++) {
+ for (i = 0; i < 6; i++) {
unsigned char num;
- if((*str == '.') || (*str == ':'))
+ if ((*str == '.') || (*str == ':'))
str++;
- num = str2hexnum(*str++) << 4;
- num |= (str2hexnum(*str++));
+ num = str2hexnum(*str++) << 4;
+ num |= str2hexnum(*str++);
ea[i] = num;
}
}
diff --git a/arch/mips/au1000/common/puts.c b/arch/mips/au1000/common/puts.c
index e34c67e89293..55bbe24d45b6 100644
--- a/arch/mips/au1000/common/puts.c
+++ b/arch/mips/au1000/common/puts.c
@@ -1,11 +1,10 @@
/*
*
* BRIEF MODULE DESCRIPTION
- * Low level uart routines to directly access a 16550 uart.
+ * Low level UART routines to directly access Alchemy UART.
*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -40,12 +39,12 @@
static volatile unsigned long * const com1 = (unsigned long *)SERIAL_BASE;
-
#ifdef SLOW_DOWN
static inline void slow_down(void)
{
- int k;
- for (k=0; k<10000; k++);
+ int k;
+
+ for (k = 0; k < 10000; k++);
}
#else
#define slow_down()
@@ -54,16 +53,16 @@ static inline void slow_down(void)
void
prom_putchar(const unsigned char c)
{
- unsigned char ch;
- int i = 0;
+ unsigned char ch;
+ int i = 0;
+
+ do {
+ ch = com1[SER_CMD];
+ slow_down();
+ i++;
+ if (i > TIMEOUT)
+ break;
+ } while (0 == (ch & TX_BUSY));
- do {
- ch = com1[SER_CMD];
- slow_down();
- i++;
- if (i>TIMEOUT) {
- break;
- }
- } while (0 == (ch & TX_BUSY));
- com1[SER_DATA] = c;
+ com1[SER_DATA] = c;
}
diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/au1000/common/reset.c
index 60cec537c745..d555429c8d6f 100644
--- a/arch/mips/au1000/common/reset.c
+++ b/arch/mips/au1000/common/reset.c
@@ -1,11 +1,10 @@
/*
*
* BRIEF MODULE DESCRIPTION
- * Au1000 reset routines.
+ * Au1xx0 reset routines.
*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001, 2006, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -28,10 +27,11 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
+#include <asm/cacheflush.h>
+
#include <asm/mach-au1x00/au1000.h>
extern int au_sleep(void);
-extern void (*flush_cache_all)(void);
void au1000_restart(char *command)
{
@@ -40,8 +40,8 @@ void au1000_restart(char *command)
u32 prid = read_c0_prid();
printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
- switch (prid & 0xFF000000)
- {
+
+ switch (prid & 0xFF000000) {
case 0x00000000: /* Au1000 */
au_writel(0x02, 0xb0000010); /* ac97_enable */
au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
@@ -138,9 +138,6 @@ void au1000_restart(char *command)
au_writel(0x00, 0xb1900064); /* sys_auxpll */
au_writel(0x00, 0xb1900100); /* sys_pininputen */
break;
-
- default:
- break;
}
set_c0_status(ST0_BEV | ST0_ERL);
@@ -158,25 +155,25 @@ void au1000_restart(char *command)
void au1000_halt(void)
{
#if defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)
- /* power off system */
- printk("\n** Powering off...\n");
- au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C);
+ /* Power off system */
+ printk(KERN_NOTICE "\n** Powering off...\n");
+ au_writew(au_readw(0xAF00001C) | (3 << 14), 0xAF00001C);
au_sync();
- while(1); /* should not get here */
+ while (1); /* should not get here */
#else
printk(KERN_NOTICE "\n** You can safely turn off the power\n");
#ifdef CONFIG_MIPS_MIRAGE
au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
#endif
#ifdef CONFIG_MIPS_DB1200
- au_writew(au_readw(0xB980001C) | (1<<14), 0xB980001C);
+ au_writew(au_readw(0xB980001C) | (1 << 14), 0xB980001C);
#endif
#ifdef CONFIG_PM
au_sleep();
- /* should not get here */
- printk(KERN_ERR "Unable to put cpu in sleep mode\n");
- while(1);
+ /* Should not get here */
+ printk(KERN_ERR "Unable to put CPU in sleep mode\n");
+ while (1);
#else
while (1)
__asm__(".set\tmips3\n\t"
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index 0e86f7a6b4a7..1ac6b06f42a3 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -1,7 +1,6 @@
/*
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2000, 2007-2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com
*
* Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc.
*
@@ -48,7 +47,7 @@ void __init plat_mem_setup(void)
{
struct cpu_spec *sp;
char *argptr;
- unsigned long prid, cpufreq, bclk = 1;
+ unsigned long prid, cpufreq, bclk;
set_cpuspec();
sp = cur_cpu_spec[0];
@@ -66,42 +65,39 @@ void __init plat_mem_setup(void)
cpufreq = (au_readl(SYS_CPUPLL) & 0x3F) * 12;
printk(KERN_INFO "(PRID %08lx) @ %ld MHz\n", prid, cpufreq);
- bclk = sp->cpu_bclk;
- if (bclk)
- {
+ if (sp->cpu_bclk) {
/* Enable BCLK switching */
- bclk = au_readl(0xB190003C);
- au_writel(bclk | 0x60, 0xB190003C);
- printk("BCLK switching enabled!\n");
+ bclk = au_readl(SYS_POWERCTRL);
+ au_writel(bclk | 0x60, SYS_POWERCTRL);
+ printk(KERN_INFO "BCLK switching enabled!\n");
}
- if (sp->cpu_od) {
- /* Various early Au1000 Errata corrected by this */
- set_c0_config(1<<19); /* Set Config[OD] */
- }
- else {
+ if (sp->cpu_od)
+ /* Various early Au1xx0 errata corrected by this */
+ set_c0_config(1 << 19); /* Set Config[OD] */
+ else
/* Clear to obtain best system bus performance */
- clear_c0_config(1<<19); /* Clear Config[OD] */
- }
+ clear_c0_config(1 << 19); /* Clear Config[OD] */
argptr = prom_getcmdline();
#ifdef CONFIG_SERIAL_8250_CONSOLE
- if ((argptr = strstr(argptr, "console=")) == NULL) {
+ argptr = strstr(argptr, "console=");
+ if (argptr == NULL) {
argptr = prom_getcmdline();
strcat(argptr, " console=ttyS0,115200");
}
#endif
#ifdef CONFIG_FB_AU1100
- if ((argptr = strstr(argptr, "video=")) == NULL) {
- argptr = prom_getcmdline();
- /* default panel */
- /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
- }
+ argptr = strstr(argptr, "video=");
+ if (argptr == NULL) {
+ argptr = prom_getcmdline();
+ /* default panel */
+ /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
+ }
#endif
-
#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
/* au1000 does not support vra, au1500 and au1100 do */
strcat(argptr, " au1000_audio=vra");
@@ -129,7 +125,7 @@ void __init plat_mem_setup(void)
/* This routine should be valid for all Au1x based boards */
phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
{
- /* Don't fixup 36 bit addresses */
+ /* Don't fixup 36-bit addresses */
if ((phys_addr >> 32) != 0)
return phys_addr;
@@ -145,17 +141,17 @@ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
}
#endif
- /* All Au1x SOCs have a pcmcia controller */
- /* We setup our 32 bit pseudo addresses to be equal to the
- * 36 bit addr >> 4, to make it easier to check the address
+ /*
+ * All Au1xx0 SOCs have a PCMCIA controller.
+ * We setup our 32-bit pseudo addresses to be equal to the
+ * 36-bit addr >> 4, to make it easier to check the address
* and fix it.
- * The Au1x socket 0 phys attribute address is 0xF 4000 0000.
+ * The PCMCIA socket 0 physical attribute address is 0xF 4000 0000.
* The pseudo address we use is 0xF400 0000. Any address over
- * 0xF400 0000 is a pcmcia pseudo address.
+ * 0xF400 0000 is a PCMCIA pseudo address.
*/
- if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF)) {
+ if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF))
return (phys_t)(phys_addr << 4);
- }
/* default nop */
return phys_addr;
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index bdb6d73b26fb..563d9390a872 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -25,11 +25,9 @@
*
* Setting up the clock on the MIPS boards.
*
- * Update. Always configure the kernel with CONFIG_NEW_TIME_C. This
- * will use the user interface gettimeofday() functions from the
- * arch/mips/kernel/time.c, and we provide the clock interrupt processing
- * and the timer offset compute functions. If CONFIG_PM is selected,
- * we also ensure the 32KHz timer is available. -- Dan
+ * We provide the clock interrupt processing and the timer offset compute
+ * functions. If CONFIG_PM is selected, we also ensure the 32KHz timer is
+ * available. -- Dan
*/
#include <linux/types.h>
@@ -47,8 +45,7 @@ extern int allow_au1k_wait; /* default off for CP0 Counter */
#if HZ < 100 || HZ > 1000
#error "unsupported HZ value! Must be in [100,1000]"
#endif
-#define MATCH20_INC (328*100/HZ) /* magic number 328 is for HZ=100... */
-extern void startup_match20_interrupt(irq_handler_t handler);
+#define MATCH20_INC (328 * 100 / HZ) /* magic number 328 is for HZ=100... */
static unsigned long last_pc0, last_match20;
#endif
@@ -61,7 +58,7 @@ static irqreturn_t counter0_irq(int irq, void *dev_id)
{
unsigned long pc0;
int time_elapsed;
- static int jiffie_drift = 0;
+ static int jiffie_drift;
if (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20) {
/* should never happen! */
@@ -70,13 +67,11 @@ static irqreturn_t counter0_irq(int irq, void *dev_id)
}
pc0 = au_readl(SYS_TOYREAD);
- if (pc0 < last_match20) {
+ if (pc0 < last_match20)
/* counter overflowed */
time_elapsed = (0xffffffff - last_match20) + pc0;
- }
- else {
+ else
time_elapsed = pc0 - last_match20;
- }
while (time_elapsed > 0) {
do_timer(1);
@@ -92,8 +87,9 @@ static irqreturn_t counter0_irq(int irq, void *dev_id)
au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
au_sync();
- /* our counter ticks at 10.009765625 ms/tick, we we're running
- * almost 10uS too slow per tick.
+ /*
+ * Our counter ticks at 10.009765625 ms/tick, we we're running
+ * almost 10 uS too slow per tick.
*/
if (jiffie_drift >= 999) {
@@ -117,20 +113,17 @@ struct irqaction counter0_action = {
/* When we wakeup from sleep, we have to "catch up" on all of the
* timer ticks we have missed.
*/
-void
-wakeup_counter0_adjust(void)
+void wakeup_counter0_adjust(void)
{
unsigned long pc0;
int time_elapsed;
pc0 = au_readl(SYS_TOYREAD);
- if (pc0 < last_match20) {
+ if (pc0 < last_match20)
/* counter overflowed */
time_elapsed = (0xffffffff - last_match20) + pc0;
- }
- else {
+ else
time_elapsed = pc0 - last_match20;
- }
while (time_elapsed > 0) {
time_elapsed -= MATCH20_INC;
@@ -143,10 +136,8 @@ wakeup_counter0_adjust(void)
}
-/* This is just for debugging to set the timer for a sleep delay.
-*/
-void
-wakeup_counter0_set(int ticks)
+/* This is just for debugging to set the timer for a sleep delay. */
+void wakeup_counter0_set(int ticks)
{
unsigned long pc0;
@@ -157,21 +148,22 @@ wakeup_counter0_set(int ticks)
}
#endif
-/* I haven't found anyone that doesn't use a 12 MHz source clock,
+/*
+ * I haven't found anyone that doesn't use a 12 MHz source clock,
* but just in case.....
*/
#define AU1000_SRC_CLK 12000000
/*
* We read the real processor speed from the PLL. This is important
- * because it is more accurate than computing it from the 32KHz
+ * because it is more accurate than computing it from the 32 KHz
* counter, if it exists. If we don't have an accurate processor
* speed, all of the peripherals that derive their clocks based on
* this advertised speed will introduce error and sometimes not work
* properly. This function is futher convoluted to still allow configurations
* to do that in case they have really, really old silicon with a
- * write-only PLL register, that we need the 32KHz when power management
- * "wait" is enabled, and we need to detect if the 32KHz isn't present
+ * write-only PLL register, that we need the 32 KHz when power management
+ * "wait" is enabled, and we need to detect if the 32 KHz isn't present
* but requested......got it? :-) -- Dan
*/
unsigned long calc_clock(void)
@@ -182,8 +174,7 @@ unsigned long calc_clock(void)
spin_lock_irqsave(&time_lock, flags);
- /* Power management cares if we don't have a 32KHz counter.
- */
+ /* Power management cares if we don't have a 32 KHz counter. */
no_au1xxx_32khz = 0;
counter = au_readl(SYS_COUNTER_CNTRL);
if (counter & SYS_CNTRL_E0) {
@@ -193,7 +184,7 @@ unsigned long calc_clock(void)
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
/* RTC now ticks at 32.768/16 kHz */
- au_writel(trim_divide-1, SYS_RTCTRIM);
+ au_writel(trim_divide - 1, SYS_RTCTRIM);
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
@@ -215,9 +206,11 @@ unsigned long calc_clock(void)
#endif
else
cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
+ /* On Alchemy CPU:counter ratio is 1:1 */
mips_hpt_frequency = cpu_speed;
- // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
- set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
+ /* Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) */
+ set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)
+ & 0x03) + 2) * 16));
spin_unlock_irqrestore(&time_lock, flags);
return cpu_speed;
}
@@ -228,10 +221,10 @@ void __init plat_time_init(void)
est_freq += 5000; /* round */
est_freq -= est_freq%10000;
- printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
- (est_freq%1000000)*100/1000000);
- set_au1x00_speed(est_freq);
- set_au1x00_lcd_clock(); // program the LCD clock
+ printk(KERN_INFO "CPU frequency %u.%02u MHz\n",
+ est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000);
+ set_au1x00_speed(est_freq);
+ set_au1x00_lcd_clock(); /* program the LCD clock */
#ifdef CONFIG_PM
/*
@@ -243,30 +236,29 @@ void __init plat_time_init(void)
* counter 0 interrupt as a special irq and it doesn't show
* up under /proc/interrupts.
*
- * Check to ensure we really have a 32KHz oscillator before
+ * Check to ensure we really have a 32 KHz oscillator before
* we do this.
*/
if (no_au1xxx_32khz)
- printk("WARNING: no 32KHz clock found.\n");
+ printk(KERN_WARNING "WARNING: no 32KHz clock found.\n");
else {
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
au_writel(0, SYS_TOYWRITE);
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
- au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK);
+ au_writel(au_readl(SYS_WAKEMSK) | (1 << 8), SYS_WAKEMSK);
au_writel(~0, SYS_WAKESRC);
au_sync();
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
- /* setup match20 to interrupt once every HZ */
+ /* Setup match20 to interrupt once every HZ */
last_pc0 = last_match20 = au_readl(SYS_TOYREAD);
au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
au_sync();
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
setup_irq(AU1000_TOY_MATCH2_INT, &counter0_action);
- /* We can use the real 'wait' instruction.
- */
+ /* We can use the real 'wait' instruction. */
allow_au1k_wait = 1;
}
diff --git a/arch/mips/au1000/db1x00/Makefile b/arch/mips/au1000/db1x00/Makefile
index 51d62bd5d900..274db3b55d82 100644
--- a/arch/mips/au1000/db1x00/Makefile
+++ b/arch/mips/au1000/db1x00/Makefile
@@ -1,8 +1,8 @@
#
-# Copyright 2000 MontaVista Software Inc.
-# Author: MontaVista Software, Inc.
-# ppopov@mvista.com or source@mvista.com
+# Copyright 2000, 2008 MontaVista Software Inc.
+# Author: MontaVista Software, Inc. <source@mvista.com>
+#
+# Makefile for the Alchemy Semiconductor DBAu1xx0 boards.
#
-# Makefile for the Alchemy Semiconductor Db1x00 board.
lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/db1x00/board_setup.c b/arch/mips/au1000/db1x00/board_setup.c
index b7dcbad5c586..9e5ccbbfcedd 100644
--- a/arch/mips/au1000/db1x00/board_setup.c
+++ b/arch/mips/au1000/db1x00/board_setup.c
@@ -3,9 +3,8 @@
* BRIEF MODULE DESCRIPTION
* Alchemy Db1x00 board setup.
*
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2000, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -37,49 +36,49 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
void board_reset(void)
{
- /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
+ /* Hit BCSR.SW_RESET[RESET] */
bcsr->swreset = 0x0000;
}
void __init board_setup(void)
{
- u32 pin_func;
+ u32 pin_func = 0;
- pin_func = 0;
- /* not valid for 1550 */
-
-#if defined(CONFIG_IRDA) && (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
- /* set IRFIRSEL instead of GPIO15 */
- pin_func = au_readl(SYS_PINFUNC) | (u32)((1<<8));
+ /* Not valid for Au1550 */
+#if defined(CONFIG_IRDA) && \
+ (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
+ /* Set IRFIRSEL instead of GPIO15 */
+ pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
au_writel(pin_func, SYS_PINFUNC);
- /* power off until the driver is in use */
+ /* Power off until the driver is in use */
bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
- bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF;
+ bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF;
au_sync();
#endif
bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */
#ifdef CONFIG_MIPS_MIRAGE
- /* enable GPIO[31:0] inputs */
+ /* Enable GPIO[31:0] inputs */
au_writel(0, SYS_PININPUTEN);
- /* GPIO[20] is output, tristate the other input primary GPIO's */
- au_writel((u32)(~(1<<20)), SYS_TRIOUTCLR);
+ /* GPIO[20] is output, tristate the other input primary GPIOs */
+ au_writel(~(1 << 20), SYS_TRIOUTCLR);
- /* set GPIO[210:208] instead of SSI_0 */
- pin_func = au_readl(SYS_PINFUNC) | (u32)(1);
+ /* Set GPIO[210:208] instead of SSI_0 */
+ pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;
- /* set GPIO[215:211] for LED's */
- pin_func |= (u32)((5<<2));
+ /* Set GPIO[215:211] for LEDs */
+ pin_func |= 5 << 2;
- /* set GPIO[214:213] for more LED's */
- pin_func |= (u32)((5<<12));
+ /* Set GPIO[214:213] for more LEDs */
+ pin_func |= 5 << 12;
- /* set GPIO[207:200] instead of PCMCIA/LCD */
- pin_func |= (u32)((3<<17));
+ /* Set GPIO[207:200] instead of PCMCIA/LCD */
+ pin_func |= SYS_PF_LCD | SYS_PF_PC;
au_writel(pin_func, SYS_PINFUNC);
- /* Enable speaker amplifier. This should
+ /*
+ * Enable speaker amplifier. This should
* be part of the audio driver.
*/
au_writel(au_readl(GPIO2_DIR) | 0x200, GPIO2_DIR);
@@ -89,21 +88,21 @@ void __init board_setup(void)
au_sync();
#ifdef CONFIG_MIPS_DB1000
- printk("AMD Alchemy Au1000/Db1000 Board\n");
+ printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1500
- printk("AMD Alchemy Au1500/Db1500 Board\n");
+ printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1100
- printk("AMD Alchemy Au1100/Db1100 Board\n");
+ printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
#endif
#ifdef CONFIG_MIPS_BOSPORUS
- printk("AMD Alchemy Bosporus Board\n");
+ printk(KERN_INFO "AMD Alchemy Bosporus Board\n");
#endif
#ifdef CONFIG_MIPS_MIRAGE
- printk("AMD Alchemy Mirage Board\n");
+ printk(KERN_INFO "AMD Alchemy Mirage Board\n");
#endif
#ifdef CONFIG_MIPS_DB1550
- printk("AMD Alchemy Au1550/Db1550 Board\n");
+ printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n");
#endif
}
diff --git a/arch/mips/au1000/db1x00/init.c b/arch/mips/au1000/db1x00/init.c
index d3b967caf70c..5ebe0de5e459 100644
--- a/arch/mips/au1000/db1x00/init.c
+++ b/arch/mips/au1000/db1x00/init.c
@@ -2,9 +2,8 @@
* BRIEF MODULE DESCRIPTION
* PB1000 board setup
*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -49,8 +48,8 @@ void __init prom_init(void)
unsigned long memsize;
prom_argc = fw_arg0;
- prom_argv = (char **) fw_arg1;
- prom_envp = (char **) fw_arg2;
+ prom_argv = (char **)fw_arg1;
+ prom_envp = (char **)fw_arg2;
prom_init_cmdline();
@@ -58,6 +57,6 @@ void __init prom_init(void)
if (!memsize_str)
memsize = 0x04000000;
else
- memsize = simple_strtol(memsize_str, NULL, 0);
+ memsize = strict_strtol(memsize_str, 0, NULL);
add_memory_region(0, memsize, BOOT_MEM_RAM);
}
diff --git a/arch/mips/au1000/db1x00/irqmap.c b/arch/mips/au1000/db1x00/irqmap.c
index eaa50c7b6341..94c090e8bf7a 100644
--- a/arch/mips/au1000/db1x00/irqmap.c
+++ b/arch/mips/au1000/db1x00/irqmap.c
@@ -32,32 +32,32 @@
#ifdef CONFIG_MIPS_DB1500
char irq_tab_alchemy[][5] __initdata = {
- [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT371 */
- [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */
+ [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT371 */
+ [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */
};
#endif
#ifdef CONFIG_MIPS_BOSPORUS
char irq_tab_alchemy[][5] __initdata = {
- [11] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 11 - miniPCI */
- [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - SN1741 */
- [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */
+ [11] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 11 - miniPCI */
+ [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - SN1741 */
+ [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */
};
#endif
#ifdef CONFIG_MIPS_MIRAGE
char irq_tab_alchemy[][5] __initdata = {
- [11] = { -1, INTD, INTX, INTX, INTX}, /* IDSEL 11 - SMI VGX */
- [12] = { -1, INTX, INTX, INTC, INTX}, /* IDSEL 12 - PNX1300 */
- [13] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 13 - miniPCI */
+ [11] = { -1, INTD, INTX, INTX, INTX }, /* IDSEL 11 - SMI VGX */
+ [12] = { -1, INTX, INTX, INTC, INTX }, /* IDSEL 12 - PNX1300 */
+ [13] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 13 - miniPCI */
};
#endif
#ifdef CONFIG_MIPS_DB1550
char irq_tab_alchemy[][5] __initdata = {
- [11] = { -1, INTC, INTX, INTX, INTX}, /* IDSEL 11 - on-board HPT371 */
- [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */
- [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */
+ [11] = { -1, INTC, INTX, INTX, INTX }, /* IDSEL 11 - on-board HPT371 */
+ [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */
+ [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */
};
#endif
diff --git a/arch/mips/au1000/mtx-1/Makefile b/arch/mips/au1000/mtx-1/Makefile
index 85a90941de4f..7c67b3d33bec 100644
--- a/arch/mips/au1000/mtx-1/Makefile
+++ b/arch/mips/au1000/mtx-1/Makefile
@@ -1,7 +1,6 @@
#
# Copyright 2003 MontaVista Software Inc.
-# Author: MontaVista Software, Inc.
-# ppopov@mvista.com or source@mvista.com
+# Author: MontaVista Software, Inc. <source@mvista.com>
# Bruno Randolf <bruno.randolf@4g-systems.biz>
#
# Makefile for 4G Systems MTX-1 board.
diff --git a/arch/mips/au1000/mtx-1/board_setup.c b/arch/mips/au1000/mtx-1/board_setup.c
index 5736354829c6..3f8079186cf2 100644
--- a/arch/mips/au1000/mtx-1/board_setup.c
+++ b/arch/mips/au1000/mtx-1/board_setup.c
@@ -3,9 +3,8 @@
* BRIEF MODULE DESCRIPTION
* 4G Systems MTX-1 board setup.
*
- * Copyright 2003 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2003, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
* Bruno Randolf <bruno.randolf@4g-systems.biz>
*
* This program is free software; you can redistribute it and/or modify it
@@ -34,7 +33,7 @@
#include <asm/mach-au1x00/au1000.h>
extern int (*board_pci_idsel)(unsigned int devsel, int assert);
-int mtx1_pci_idsel(unsigned int devsel, int assert);
+int mtx1_pci_idsel(unsigned int devsel, int assert);
void board_reset(void)
{
@@ -45,36 +44,36 @@ void board_reset(void)
void __init board_setup(void)
{
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
- // enable USB power switch
- au_writel( au_readl(GPIO2_DIR) | 0x10, GPIO2_DIR );
- au_writel( 0x100000, GPIO2_OUTPUT );
+ /* Enable USB power switch */
+ au_writel(au_readl(GPIO2_DIR) | 0x10, GPIO2_DIR);
+ au_writel(0x100000, GPIO2_OUTPUT);
#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
#ifdef CONFIG_PCI
#if defined(__MIPSEB__)
- au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
+ au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
#else
au_writel(0xf, Au1500_PCI_CFG);
#endif
#endif
- // initialize sys_pinfunc:
- au_writel( SYS_PF_NI2, SYS_PINFUNC );
+ /* Initialize sys_pinfunc */
+ au_writel(SYS_PF_NI2, SYS_PINFUNC);
- // initialize GPIO
- au_writel( 0xFFFFFFFF, SYS_TRIOUTCLR );
- au_writel( 0x00000001, SYS_OUTPUTCLR ); // set M66EN (PCI 66MHz) to OFF
- au_writel( 0x00000008, SYS_OUTPUTSET ); // set PCI CLKRUN# to OFF
- au_writel( 0x00000002, SYS_OUTPUTSET ); // set EXT_IO3 ON
- au_writel( 0x00000020, SYS_OUTPUTCLR ); // set eth PHY TX_ER to OFF
+ /* Initialize GPIO */
+ au_writel(0xFFFFFFFF, SYS_TRIOUTCLR);
+ au_writel(0x00000001, SYS_OUTPUTCLR); /* set M66EN (PCI 66MHz) to OFF */
+ au_writel(0x00000008, SYS_OUTPUTSET); /* set PCI CLKRUN# to OFF */
+ au_writel(0x00000002, SYS_OUTPUTSET); /* set EXT_IO3 ON */
+ au_writel(0x00000020, SYS_OUTPUTCLR); /* set eth PHY TX_ER to OFF */
- // enable LED and set it to green
- au_writel( au_readl(GPIO2_DIR) | 0x1800, GPIO2_DIR );
- au_writel( 0x18000800, GPIO2_OUTPUT );
+ /* Enable LED and set it to green */
+ au_writel(au_readl(GPIO2_DIR) | 0x1800, GPIO2_DIR);
+ au_writel(0x18000800, GPIO2_OUTPUT);
board_pci_idsel = mtx1_pci_idsel;
- printk("4G Systems MTX-1 Board\n");
+ printk(KERN_INFO "4G Systems MTX-1 Board\n");
}
int
@@ -82,20 +81,18 @@ mtx1_pci_idsel(unsigned int devsel, int assert)
{
#define MTX_IDSEL_ONLY_0_AND_3 0
#if MTX_IDSEL_ONLY_0_AND_3
- if (devsel != 0 && devsel != 3) {
- printk("*** not 0 or 3\n");
- return 0;
- }
+ if (devsel != 0 && devsel != 3) {
+ printk(KERN_ERR "*** not 0 or 3\n");
+ return 0;
+ }
#endif
- if (assert && devsel != 0) {
- // suppress signal to cardbus
- au_writel( 0x00000002, SYS_OUTPUTCLR ); // set EXT_IO3 OFF
- }
- else {
- au_writel( 0x00000002, SYS_OUTPUTSET ); // set EXT_IO3 ON
- }
- au_sync_udelay(1);
- return 1;
+ if (assert && devsel != 0)
+ /* Suppress signal to Cardbus */
+ au_writel(0x00000002, SYS_OUTPUTCLR); /* set EXT_IO3 OFF */
+ else
+ au_writel(0x00000002, SYS_OUTPUTSET); /* set EXT_IO3 ON */
+ au_sync_udelay(1);
+ return 1;
}
diff --git a/arch/mips/au1000/mtx-1/init.c b/arch/mips/au1000/mtx-1/init.c
index c015cbce1cca..33a4aebe0cba 100644
--- a/arch/mips/au1000/mtx-1/init.c
+++ b/arch/mips/au1000/mtx-1/init.c
@@ -3,9 +3,8 @@
* BRIEF MODULE DESCRIPTION
* 4G Systems MTX-1 board setup
*
- * Copyright 2003 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2003, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
* Bruno Randolf <bruno.randolf@4g-systems.biz>
*
* This program is free software; you can redistribute it and/or modify it
@@ -47,8 +46,8 @@ void __init prom_init(void)
unsigned long memsize;
prom_argc = fw_arg0;
- prom_argv = (char **) fw_arg1;
- prom_envp = (char **) fw_arg2;
+ prom_argv = (char **)fw_arg1;
+ prom_envp = (char **)fw_arg2;
prom_init_cmdline();
@@ -56,6 +55,6 @@ void __init prom_init(void)
if (!memsize_str)
memsize = 0x04000000;
else
- memsize = simple_strtol(memsize_str, NULL, 0);
+ memsize = strict_strtol(memsize_str, 0, NULL);
add_memory_region(0, memsize, BOOT_MEM_RAM);
}
diff --git a/arch/mips/au1000/mtx-1/irqmap.c b/arch/mips/au1000/mtx-1/irqmap.c
index 78d70c42c9db..f2bf02951e9c 100644
--- a/arch/mips/au1000/mtx-1/irqmap.c
+++ b/arch/mips/au1000/mtx-1/irqmap.c
@@ -31,18 +31,18 @@
#include <asm/mach-au1x00/au1000.h>
char irq_tab_alchemy[][5] __initdata = {
- [0] = { -1, INTA, INTA, INTX, INTX}, /* IDSEL 00 - AdapterA-Slot0 (top) */
- [1] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
- [2] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 02 - AdapterB-Slot0 (top) */
- [3] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
- [4] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 04 - AdapterC-Slot0 (top) */
- [5] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
- [6] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 06 - AdapterD-Slot0 (top) */
- [7] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
+ [0] = { -1, INTA, INTA, INTX, INTX }, /* IDSEL 00 - AdapterA-Slot0 (top) */
+ [1] = { -1, INTB, INTA, INTX, INTX }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
+ [2] = { -1, INTC, INTD, INTX, INTX }, /* IDSEL 02 - AdapterB-Slot0 (top) */
+ [3] = { -1, INTD, INTC, INTX, INTX }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
+ [4] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 04 - AdapterC-Slot0 (top) */
+ [5] = { -1, INTB, INTA, INTX, INTX }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
+ [6] = { -1, INTC, INTD, INTX, INTX }, /* IDSEL 06 - AdapterD-Slot0 (top) */
+ [7] = { -1, INTD, INTC, INTX, INTX }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
};
struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
- { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 },
{ AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
{ AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
{ AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
diff --git a/arch/mips/au1000/mtx-1/platform.c b/arch/mips/au1000/mtx-1/platform.c
index a7edbf0829ac..9807be37c32f 100644
--- a/arch/mips/au1000/mtx-1/platform.c
+++ b/arch/mips/au1000/mtx-1/platform.c
@@ -21,11 +21,10 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
+#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
-#include <asm/gpio.h>
-
static struct gpio_keys_button mtx1_gpio_button[] = {
{
.gpio = 207,
diff --git a/arch/mips/au1000/pb1000/Makefile b/arch/mips/au1000/pb1000/Makefile
index daa1a507e72f..99bbec0ca41b 100644
--- a/arch/mips/au1000/pb1000/Makefile
+++ b/arch/mips/au1000/pb1000/Makefile
@@ -1,8 +1,8 @@
#
-# Copyright 2000 MontaVista Software Inc.
-# Author: MontaVista Software, Inc.
-# ppopov@mvista.com or source@mvista.com
+# Copyright 2000, 2008 MontaVista Software Inc.
+# Author: MontaVista Software, Inc. <source@mvista.com>
+#
+# Makefile for the Alchemy Semiconductor Pb1000 board.
#
-# Makefile for the Alchemy Semiconductor PB1000 board.
lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1000/board_setup.c b/arch/mips/au1000/pb1000/board_setup.c
index 33f15acc1b17..25df167a95b3 100644
--- a/arch/mips/au1000/pb1000/board_setup.c
+++ b/arch/mips/au1000/pb1000/board_setup.c
@@ -1,7 +1,6 @@
/*
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2000, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -40,128 +39,126 @@ void __init board_setup(void)
u32 sys_freqctrl, sys_clksrc;
u32 prid = read_c0_prid();
- // set AUX clock to 12MHz * 8 = 96 MHz
+ /* Set AUX clock to 12 MHz * 8 = 96 MHz */
au_writel(8, SYS_AUXPLL);
au_writel(0, SYS_PINSTATERD);
udelay(100);
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
- /* zero and disable FREQ2 */
+ /* Zero and disable FREQ2 */
sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
au_writel(sys_freqctrl, SYS_FREQCTRL0);
- /* zero and disable USBH/USBD clocks */
+ /* Zero and disable USBH/USBD clocks */
sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x00007FE0;
+ sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
+ SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
au_writel(sys_clksrc, SYS_CLKSRC);
sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x00007FE0;
+ sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
+ SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
- switch (prid & 0x000000FF)
- {
+ switch (prid & 0x000000FF) {
case 0x00: /* DA */
case 0x01: /* HA */
case 0x02: /* HB */
- /* CPU core freq to 48MHz to slow it way down... */
- au_writel(4, SYS_CPUPLL);
+ /* CPU core freq to 48 MHz to slow it way down... */
+ au_writel(4, SYS_CPUPLL);
- /*
- * Setup 48MHz FREQ2 from CPUPLL for USB Host
- */
- /* FRDIV2=3 -> div by 8 of 384MHz -> 48MHz */
- sys_freqctrl |= ((3<<22) | (1<<21) | (0<<20));
- au_writel(sys_freqctrl, SYS_FREQCTRL0);
+ /*
+ * Setup 48 MHz FREQ2 from CPUPLL for USB Host
+ * FRDIV2 = 3 -> div by 8 of 384 MHz -> 48 MHz
+ */
+ sys_freqctrl |= (3 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2;
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
- /* CPU core freq to 384MHz */
- au_writel(0x20, SYS_CPUPLL);
+ /* CPU core freq to 384 MHz */
+ au_writel(0x20, SYS_CPUPLL);
- printk("Au1000: 48MHz OHCI workaround enabled\n");
+ printk(KERN_INFO "Au1000: 48 MHz OHCI workaround enabled\n");
break;
- default: /* HC and newer */
- // FREQ2 = aux/2 = 48 MHz
- sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
- au_writel(sys_freqctrl, SYS_FREQCTRL0);
+ default: /* HC and newer */
+ /* FREQ2 = aux / 2 = 48 MHz */
+ sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
+ SYS_FC_FE2 | SYS_FC_FS2;
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
break;
}
/*
- * Route 48MHz FREQ2 into USB Host and/or Device
+ * Route 48 MHz FREQ2 into USB Host and/or Device
*/
-#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
- sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
-#endif
+ sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT;
au_writel(sys_clksrc, SYS_CLKSRC);
- // configure pins GPIO[14:9] as GPIO
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8080);
+ /* Configure pins GPIO[14:9] as GPIO */
+ pin_func = au_readl(SYS_PINFUNC) & ~(SYS_PF_UR3 | SYS_PF_USB);
- // 2nd USB port is USB host
- pin_func |= 0x8000;
+ /* 2nd USB port is USB host */
+ pin_func |= SYS_PF_USB;
au_writel(pin_func, SYS_PINFUNC);
au_writel(0x2800, SYS_TRIOUTCLR);
au_writel(0x0030, SYS_OUTPUTCLR);
#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
- // make gpio 15 an input (for interrupt line)
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x100);
- // we don't need I2S, so make it available for GPIO[31:29]
- pin_func |= (1<<5);
+ /* Make GPIO 15 an input (for interrupt line) */
+ pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_IRF;
+ /* We don't need I2S, so make it available for GPIO[31:29] */
+ pin_func |= SYS_PF_I2S;
au_writel(pin_func, SYS_PINFUNC);
au_writel(0x8000, SYS_TRIOUTCLR);
- static_cfg0 = au_readl(MEM_STCFG0) & (u32)(~0xc00);
+ static_cfg0 = au_readl(MEM_STCFG0) & ~0xc00;
au_writel(static_cfg0, MEM_STCFG0);
- // configure RCE2* for LCD
+ /* configure RCE2* for LCD */
au_writel(0x00000004, MEM_STCFG2);
- // MEM_STTIME2
+ /* MEM_STTIME2 */
au_writel(0x09000000, MEM_STTIME2);
- // Set 32-bit base address decoding for RCE2*
+ /* Set 32-bit base address decoding for RCE2* */
au_writel(0x10003ff0, MEM_STADDR2);
- // PCI CPLD setup
- // expand CE0 to cover PCI
+ /*
+ * PCI CPLD setup
+ * Expand CE0 to cover PCI
+ */
au_writel(0x11803e40, MEM_STADDR1);
- // burst visibility on
+ /* Burst visibility on */
au_writel(au_readl(MEM_STCFG0) | 0x1000, MEM_STCFG0);
- au_writel(0x83, MEM_STCFG1); // ewait enabled, flash timing
- au_writel(0x33030a10, MEM_STTIME1); // slower timing for FPGA
+ au_writel(0x83, MEM_STCFG1); /* ewait enabled, flash timing */
+ au_writel(0x33030a10, MEM_STTIME1); /* slower timing for FPGA */
- /* setup the static bus controller */
+ /* Setup the static bus controller */
au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
-#ifdef CONFIG_PCI
- au_writel(0, PCI_BRIDGE_CONFIG); // set extend byte to 0
- au_writel(0, SDRAM_MBAR); // set mbar to 0
- au_writel(0x2, SDRAM_CMD); // enable memory accesses
- au_sync_delay(1);
-#endif
-
- /* Enable Au1000 BCLK switching - note: sed1356 must not use
- * its BCLK (Au1000 LCLK) for any timings */
- switch (prid & 0x000000FF)
- {
+ /*
+ * Enable Au1000 BCLK switching - note: sed1356 must not use
+ * its BCLK (Au1000 LCLK) for any timings
+ */
+ switch (prid & 0x000000FF) {
case 0x00: /* DA */
case 0x01: /* HA */
case 0x02: /* HB */
break;
default: /* HC and newer */
- /* Enable sys bus clock divider when IDLE state or no bus
- activity. */
+ /*
+ * Enable sys bus clock divider when IDLE state or no bus
+ * activity.
+ */
au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
break;
}
diff --git a/arch/mips/au1000/pb1000/init.c b/arch/mips/au1000/pb1000/init.c
index 549447df71d6..3837365d613d 100644
--- a/arch/mips/au1000/pb1000/init.c
+++ b/arch/mips/au1000/pb1000/init.c
@@ -1,10 +1,9 @@
/*
* BRIEF MODULE DESCRIPTION
- * PB1000 board setup
+ * Pb1000 board setup
*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -44,16 +43,15 @@ void __init prom_init(void)
unsigned char *memsize_str;
unsigned long memsize;
- prom_argc = (int) fw_arg0;
- prom_argv = (char **) fw_arg1;
- prom_envp = (char **) fw_arg2;
+ prom_argc = (int)fw_arg0;
+ prom_argv = (char **)fw_arg1;
+ prom_envp = (char **)fw_arg2;
prom_init_cmdline();
memsize_str = prom_getenv("memsize");
- if (!memsize_str) {
+ if (!memsize_str)
memsize = 0x04000000;
- } else {
- memsize = simple_strtol(memsize_str, NULL, 0);
- }
+ else
+ memsize = strict_strtol(memsize_str, 0, NULL);
add_memory_region(0, memsize, BOOT_MEM_RAM);
}
diff --git a/arch/mips/au1000/pb1100/Makefile b/arch/mips/au1000/pb1100/Makefile
index 996236df6375..793e97c49e46 100644
--- a/arch/mips/au1000/pb1100/Makefile
+++ b/arch/mips/au1000/pb1100/Makefile
@@ -1,8 +1,8 @@
#
-# Copyright 2000,2001 MontaVista Software Inc.
-# Author: MontaVista Software, Inc.
-# ppopov@mvista.com or source@mvista.com
+# Copyright 2000, 2001, 2008 MontaVista Software Inc.
+# Author: MontaVista Software, Inc. <source@mvista.com>
#
# Makefile for the Alchemy Semiconductor Pb1100 board.
+#
lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/au1000/pb1100/board_setup.c
index 656164c8e9ca..c0bfd59a7a36 100644
--- a/arch/mips/au1000/pb1100/board_setup.c
+++ b/arch/mips/au1000/pb1100/board_setup.c
@@ -1,7 +1,6 @@
/*
- * Copyright 2002 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2002, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -32,15 +31,15 @@
void board_reset(void)
{
- /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
- au_writel(0x00000000, 0xAE00001C);
+ /* Hit BCSR.RST_VDDI[SOFT_RESET] */
+ au_writel(0x00000000, PB1100_RST_VDDI);
}
void __init board_setup(void)
{
- volatile void __iomem * base = (volatile void __iomem *) 0xac000000UL;
+ volatile void __iomem *base = (volatile void __iomem *)0xac000000UL;
- // set AUX clock to 12MHz * 8 = 96 MHz
+ /* Set AUX clock to 12 MHz * 8 = 96 MHz */
au_writel(8, SYS_AUXPLL);
au_writel(0, SYS_PININPUTEN);
udelay(100);
@@ -49,44 +48,47 @@ void __init board_setup(void)
{
u32 pin_func, sys_freqctrl, sys_clksrc;
- // configure pins GPIO[14:9] as GPIO
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80);
+ /* Configure pins GPIO[14:9] as GPIO */
+ pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
- /* zero and disable FREQ2 */
+ /* Zero and disable FREQ2 */
sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
au_writel(sys_freqctrl, SYS_FREQCTRL0);
- /* zero and disable USBH/USBD/IrDA clock */
+ /* Zero and disable USBH/USBD/IrDA clock */
sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x0000001F;
+ sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
au_writel(sys_clksrc, SYS_CLKSRC);
sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x0000001F;
+ sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
- // FREQ2 = aux/2 = 48 MHz
- sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
+ /* FREQ2 = aux / 2 = 48 MHz */
+ sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
+ SYS_FC_FE2 | SYS_FC_FS2;
au_writel(sys_freqctrl, SYS_FREQCTRL0);
/*
- * Route 48MHz FREQ2 into USBH/USBD/IrDA
+ * Route 48 MHz FREQ2 into USBH/USBD/IrDA
*/
- sys_clksrc |= ((4<<2) | (0<<1) | 0 );
+ sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT;
au_writel(sys_clksrc, SYS_CLKSRC);
- /* setup the static bus controller */
+ /* Setup the static bus controller */
au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
- // get USB Functionality pin state (device vs host drive pins)
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
- // 2nd USB port is USB host
- pin_func |= 0x8000;
+ /*
+ * Get USB Functionality pin state (device vs host drive pins).
+ */
+ pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
+ /* 2nd USB port is USB host. */
+ pin_func |= SYS_PF_USB;
au_writel(pin_func, SYS_PINFUNC);
}
#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
@@ -94,12 +96,12 @@ void __init board_setup(void)
/* Enable sys bus clock divider when IDLE state or no bus activity. */
au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
- // Enable the RTC if not already enabled
+ /* Enable the RTC if not already enabled. */
if (!(readb(base + 0x28) & 0x20)) {
writeb(readb(base + 0x28) | 0x20, base + 0x28);
au_sync();
}
- // Put the clock in BCD mode
+ /* Put the clock in BCD mode. */
if (readb(base + 0x2C) & 0x4) { /* reg B */
writeb(readb(base + 0x2c) & ~0x4, base + 0x2c);
au_sync();
diff --git a/arch/mips/au1000/pb1100/init.c b/arch/mips/au1000/pb1100/init.c
index c91344648ed3..8355483f3de2 100644
--- a/arch/mips/au1000/pb1100/init.c
+++ b/arch/mips/au1000/pb1100/init.c
@@ -3,9 +3,8 @@
* BRIEF MODULE DESCRIPTION
* Pb1100 board setup
*
- * Copyright 2002 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2002, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -46,8 +45,8 @@ void __init prom_init(void)
unsigned long memsize;
prom_argc = fw_arg0;
- prom_argv = (char **) fw_arg1;
- prom_envp = (char **) fw_arg3;
+ prom_argv = (char **)fw_arg1;
+ prom_envp = (char **)fw_arg3;
prom_init_cmdline();
@@ -55,7 +54,7 @@ void __init prom_init(void)
if (!memsize_str)
memsize = 0x04000000;
else
- memsize = simple_strtol(memsize_str, NULL, 0);
+ memsize = strict_strtol(memsize_str, 0, NULL);
add_memory_region(0, memsize, BOOT_MEM_RAM);
}
diff --git a/arch/mips/au1000/pb1100/irqmap.c b/arch/mips/au1000/pb1100/irqmap.c
index b5021e3d477f..9b7dd8b41283 100644
--- a/arch/mips/au1000/pb1100/irqmap.c
+++ b/arch/mips/au1000/pb1100/irqmap.c
@@ -1,6 +1,6 @@
/*
* BRIEF MODULE DESCRIPTION
- * Au1xxx irq map table
+ * Au1xx0 IRQ map table
*
* Copyright 2003 Embedded Edge, LLC
* dan@embeddededge.com
@@ -31,10 +31,10 @@
#include <asm/mach-au1x00/au1000.h>
struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
- { AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card Fully_Interted#
- { AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card STSCHG#
- { AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card IRQ#
- { AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, // DC_IRQ#
+ { AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card Fully_Inserted# */
+ { AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card STSCHG# */
+ { AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card IRQ# */
+ { AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, /* DC_IRQ# */
};
int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
diff --git a/arch/mips/au1000/pb1200/Makefile b/arch/mips/au1000/pb1200/Makefile
index 4fe02ea65a60..d678adf7ce85 100644
--- a/arch/mips/au1000/pb1200/Makefile
+++ b/arch/mips/au1000/pb1200/Makefile
@@ -1,5 +1,5 @@
#
-# Makefile for the Alchemy Semiconductor PB1200 board.
+# Makefile for the Alchemy Semiconductor Pb1200/DBAu1200 boards.
#
lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c
index 4493a792cc4c..6cb2115059ad 100644
--- a/arch/mips/au1000/pb1200/board_setup.c
+++ b/arch/mips/au1000/pb1200/board_setup.c
@@ -27,16 +27,8 @@
#include <linux/init.h>
#include <linux/sched.h>
-#include <au1000.h>
#include <prom.h>
-
-#ifdef CONFIG_MIPS_PB1200
-#include <asm/mach-pb1x00/pb1200.h>
-#endif
-
-#ifdef CONFIG_MIPS_DB1200
-#include <asm/mach-db1x00/db1200.h>
-#endif
+#include <au1xxx.h>
extern void _board_init_irq(void);
extern void (*board_init_irq)(void);
@@ -53,56 +45,57 @@ void __init board_setup(void)
#if 0
{
- u32 pin_func;
-
- /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
- * but it is board specific code, so put it here.
- */
- pin_func = au_readl(SYS_PINFUNC);
- au_sync();
- pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
- au_writel(pin_func, SYS_PINFUNC);
-
- au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
- au_sync();
+ u32 pin_func;
+
+ /*
+ * Enable PSC1 SYNC for AC97. Normaly done in audio driver,
+ * but it is board specific code, so put it here.
+ */
+ pin_func = au_readl(SYS_PINFUNC);
+ au_sync();
+ pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
+ au_writel(pin_func, SYS_PINFUNC);
+
+ au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
+ au_sync();
}
#endif
#if defined(CONFIG_I2C_AU1550)
{
- u32 freq0, clksrc;
- u32 pin_func;
-
- /* Select SMBUS in CPLD */
- bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
-
- pin_func = au_readl(SYS_PINFUNC);
- au_sync();
- pin_func &= ~(3<<17 | 1<<4);
- /* Set GPIOs correctly */
- pin_func |= 2<<17;
- au_writel(pin_func, SYS_PINFUNC);
- au_sync();
-
- /* The i2c driver depends on 50Mhz clock */
- freq0 = au_readl(SYS_FREQCTRL0);
- au_sync();
- freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
- freq0 |= (3<<SYS_FC_FRDIV1_BIT);
- /* 396Mhz / (3+1)*2 == 49.5Mhz */
- au_writel(freq0, SYS_FREQCTRL0);
- au_sync();
- freq0 |= SYS_FC_FE1;
- au_writel(freq0, SYS_FREQCTRL0);
- au_sync();
-
- clksrc = au_readl(SYS_CLKSRC);
- au_sync();
- clksrc &= ~0x01f00000;
- /* bit 22 is EXTCLK0 for PSC0 */
- clksrc |= (0x3 << 22);
- au_writel(clksrc, SYS_CLKSRC);
- au_sync();
+ u32 freq0, clksrc;
+ u32 pin_func;
+
+ /* Select SMBus in CPLD */
+ bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
+
+ pin_func = au_readl(SYS_PINFUNC);
+ au_sync();
+ pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
+ /* Set GPIOs correctly */
+ pin_func |= 2 << 17;
+ au_writel(pin_func, SYS_PINFUNC);
+ au_sync();
+
+ /* The I2C driver depends on 50 MHz clock */
+ freq0 = au_readl(SYS_FREQCTRL0);
+ au_sync();
+ freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
+ freq0 |= 3 << SYS_FC_FRDIV1_BIT;
+ /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
+ au_writel(freq0, SYS_FREQCTRL0);
+ au_sync();
+ freq0 |= SYS_FC_FE1;
+ au_writel(freq0, SYS_FREQCTRL0);
+ au_sync();
+
+ clksrc = au_readl(SYS_CLKSRC);
+ au_sync();
+ clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
+ /* Bit 22 is EXTCLK0 for PSC0 */
+ clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
+ au_writel(clksrc, SYS_CLKSRC);
+ au_sync();
}
#endif
@@ -116,27 +109,27 @@ void __init board_setup(void)
#endif
#endif
- /* The Pb1200 development board uses external MUX for PSC0 to
- support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
- */
+ /*
+ * The Pb1200 development board uses external MUX for PSC0 to
+ * support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
+ */
#ifdef CONFIG_I2C_AU1550
- bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
+ bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
#endif
au_sync();
#ifdef CONFIG_MIPS_PB1200
- printk("AMD Alchemy Pb1200 Board\n");
+ printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1200
- printk("AMD Alchemy Db1200 Board\n");
+ printk(KERN_INFO "AMD Alchemy Db1200 Board\n");
#endif
/* Setup Pb1200 External Interrupt Controller */
board_init_irq = _board_init_irq;
}
-int
-board_au1200fb_panel(void)
+int board_au1200fb_panel(void)
{
BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
int p;
@@ -147,23 +140,23 @@ board_au1200fb_panel(void)
return p;
}
-int
-board_au1200fb_panel_init(void)
+int board_au1200fb_panel_init(void)
{
/* Apply power */
- BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
- bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
- /*printk("board_au1200fb_panel_init()\n"); */
+ BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
+
+ bcsr->board |= BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL;
+ /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */
return 0;
}
-int
-board_au1200fb_panel_shutdown(void)
+int board_au1200fb_panel_shutdown(void)
{
/* Remove power */
- BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
- bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
- /*printk("board_au1200fb_panel_shutdown()\n"); */
+ BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
+
+ bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
+ BCSR_BOARD_LCDBL);
+ /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */
return 0;
}
-
diff --git a/arch/mips/au1000/pb1200/init.c b/arch/mips/au1000/pb1200/init.c
index 72af5500660b..09fd63b86062 100644
--- a/arch/mips/au1000/pb1200/init.c
+++ b/arch/mips/au1000/pb1200/init.c
@@ -3,9 +3,8 @@
* BRIEF MODULE DESCRIPTION
* PB1200 board setup
*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -45,16 +44,15 @@ void __init prom_init(void)
unsigned char *memsize_str;
unsigned long memsize;
- prom_argc = (int) fw_arg0;
- prom_argv = (char **) fw_arg1;
- prom_envp = (char **) fw_arg2;
+ prom_argc = (int)fw_arg0;
+ prom_argv = (char **)fw_arg1;
+ prom_envp = (char **)fw_arg2;
prom_init_cmdline();
memsize_str = prom_getenv("memsize");
- if (!memsize_str) {
+ if (!memsize_str)
memsize = 0x08000000;
- } else {
- memsize = simple_strtol(memsize_str, NULL, 0);
- }
+ else
+ memsize = strict_strtol(memsize_str, 0, NULL);
add_memory_region(0, memsize, BOOT_MEM_RAM);
}
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
index e61eb8e0b76b..2a505ad8715b 100644
--- a/arch/mips/au1000/pb1200/irqmap.c
+++ b/arch/mips/au1000/pb1200/irqmap.c
@@ -39,25 +39,25 @@
#endif
struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
- { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
+ /* This is external interrupt cascade */
+ { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 },
};
int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
/*
- * Support for External interrupts on the PbAu1200 Development platform.
+ * Support for External interrupts on the Pb1200 Development platform.
*/
-static volatile int pb1200_cascade_en=0;
+static volatile int pb1200_cascade_en;
-irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
+irqreturn_t pb1200_cascade_handler(int irq, void *dev_id)
{
unsigned short bisr = bcsr->int_status;
int extirq_nr = 0;
- /* Clear all the edge interrupts. This has no effect on level */
+ /* Clear all the edge interrupts. This has no effect on level. */
bcsr->int_status = bisr;
- for( ; bisr; bisr &= (bisr-1) )
- {
+ for ( ; bisr; bisr &= bisr - 1) {
extirq_nr = PB1200_INT_BEGIN + __ffs(bisr);
/* Ack and dispatch IRQ */
do_IRQ(extirq_nr);
@@ -68,26 +68,20 @@ irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
inline void pb1200_enable_irq(unsigned int irq_nr)
{
- bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
- bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
+ bcsr->intset_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
+ bcsr->intset = 1 << (irq_nr - PB1200_INT_BEGIN);
}
inline void pb1200_disable_irq(unsigned int irq_nr)
{
- bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
- bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
+ bcsr->intclr_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
+ bcsr->intclr = 1 << (irq_nr - PB1200_INT_BEGIN);
}
static unsigned int pb1200_setup_cascade(void)
{
- int err;
-
- err = request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
- 0, "Pb1200 Cascade", &pb1200_cascade_handler);
- if (err)
- return err;
-
- return 0;
+ return request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
+ 0, "Pb1200 Cascade", &pb1200_cascade_handler);
}
static unsigned int pb1200_startup_irq(unsigned int irq)
@@ -132,23 +126,23 @@ void _board_init_irq(void)
unsigned int irq;
#ifdef CONFIG_MIPS_PB1200
- /* We have a problem with CPLD rev3. Enable a workaround */
+ /* We have a problem with CPLD rev 3. */
if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) {
- printk("\nWARNING!!!\n");
- printk("\nWARNING!!!\n");
- printk("\nWARNING!!!\n");
- printk("\nWARNING!!!\n");
- printk("\nWARNING!!!\n");
- printk("\nWARNING!!!\n");
- printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
- printk("updated to latest revision. This software will not\n");
- printk("work on anything less than CPLD rev4\n");
- printk("\nWARNING!!!\n");
- printk("\nWARNING!!!\n");
- printk("\nWARNING!!!\n");
- printk("\nWARNING!!!\n");
- printk("\nWARNING!!!\n");
- printk("\nWARNING!!!\n");
+ printk(KERN_ERR "WARNING!!!\n");
+ printk(KERN_ERR "WARNING!!!\n");
+ printk(KERN_ERR "WARNING!!!\n");
+ printk(KERN_ERR "WARNING!!!\n");
+ printk(KERN_ERR "WARNING!!!\n");
+ printk(KERN_ERR "WARNING!!!\n");
+ printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
+ printk(KERN_ERR "updated to latest revision. This software will\n");
+ printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
+ printk(KERN_ERR "WARNING!!!\n");
+ printk(KERN_ERR "WARNING!!!\n");
+ printk(KERN_ERR "WARNING!!!\n");
+ printk(KERN_ERR "WARNING!!!\n");
+ printk(KERN_ERR "WARNING!!!\n");
+ printk(KERN_ERR "WARNING!!!\n");
panic("Game over. Your score is 0.");
}
#endif
@@ -161,6 +155,6 @@ void _board_init_irq(void)
/*
* GPIO_7 can not be hooked here, so it is hooked upon first
- * request of any source attached to the cascade
+ * request of any source attached to the cascade.
*/
}
diff --git a/arch/mips/au1000/pb1500/Makefile b/arch/mips/au1000/pb1500/Makefile
index 97a730813cd3..602f38df20bb 100644
--- a/arch/mips/au1000/pb1500/Makefile
+++ b/arch/mips/au1000/pb1500/Makefile
@@ -1,8 +1,8 @@
#
-# Copyright 2000,2001 MontaVista Software Inc.
-# Author: MontaVista Software, Inc.
-# ppopov@mvista.com or source@mvista.com
+# Copyright 2000, 2001, 2008 MontaVista Software Inc.
+# Author: MontaVista Software, Inc. <source@mvista.com>
#
# Makefile for the Alchemy Semiconductor Pb1500 board.
+#
lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1500/board_setup.c b/arch/mips/au1000/pb1500/board_setup.c
index 24c652e8ec4b..035771c6e5b8 100644
--- a/arch/mips/au1000/pb1500/board_setup.c
+++ b/arch/mips/au1000/pb1500/board_setup.c
@@ -1,7 +1,6 @@
/*
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2000, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -32,8 +31,8 @@
void board_reset(void)
{
- /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
- au_writel(0x00000000, 0xAE00001C);
+ /* Hit BCSR.RST_VDDI[SOFT_RESET] */
+ au_writel(0x00000000, PB1500_RST_VDDI);
}
void __init board_setup(void)
@@ -42,7 +41,7 @@ void __init board_setup(void)
u32 sys_freqctrl, sys_clksrc;
sys_clksrc = sys_freqctrl = pin_func = 0;
- // set AUX clock to 12MHz * 8 = 96 MHz
+ /* Set AUX clock to 12 MHz * 8 = 96 MHz */
au_writel(8, SYS_AUXPLL);
au_writel(0, SYS_PINSTATERD);
udelay(100);
@@ -51,51 +50,48 @@ void __init board_setup(void)
/* GPIO201 is input for PCMCIA card detect */
/* GPIO203 is input for PCMCIA interrupt request */
- au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR);
+ au_writel(au_readl(GPIO2_DIR) & ~((1 << 1) | (1 << 3)), GPIO2_DIR);
- /* zero and disable FREQ2 */
+ /* Zero and disable FREQ2 */
sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
au_writel(sys_freqctrl, SYS_FREQCTRL0);
/* zero and disable USBH/USBD clocks */
sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x00007FE0;
+ sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
+ SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
au_writel(sys_clksrc, SYS_CLKSRC);
sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x00007FE0;
+ sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
+ SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
- // FREQ2 = aux/2 = 48 MHz
- sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
+ /* FREQ2 = aux/2 = 48 MHz */
+ sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2 | SYS_FC_FS2;
au_writel(sys_freqctrl, SYS_FREQCTRL0);
/*
* Route 48MHz FREQ2 into USB Host and/or Device
*/
-#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
- sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
-#endif
+ sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT;
au_writel(sys_clksrc, SYS_CLKSRC);
-
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
- // 2nd USB port is USB host
- pin_func |= 0x8000;
+ pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
+ /* 2nd USB port is USB host */
+ pin_func |= SYS_PF_USB;
au_writel(pin_func, SYS_PINFUNC);
#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
-
-
#ifdef CONFIG_PCI
- // Setup PCI bus controller
+ /* Setup PCI bus controller */
au_writel(0, Au1500_PCI_CMEM);
au_writel(0x00003fff, Au1500_CFG_BASE);
#if defined(__MIPSEB__)
- au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
+ au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
#else
au_writel(0xf, Au1500_PCI_CFG);
#endif
@@ -112,11 +108,11 @@ void __init board_setup(void)
/* Enable the RTC if not already enabled */
if (!(au_readl(0xac000028) & 0x20)) {
- printk("enabling clock ...\n");
+ printk(KERN_INFO "enabling clock ...\n");
au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
}
/* Put the clock in BCD mode */
- if (au_readl(0xac00002C) & 0x4) { /* reg B */
+ if (au_readl(0xac00002c) & 0x4) { /* reg B */
au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
au_sync();
}
diff --git a/arch/mips/au1000/pb1500/init.c b/arch/mips/au1000/pb1500/init.c
index 488507c07db9..49f51e165863 100644
--- a/arch/mips/au1000/pb1500/init.c
+++ b/arch/mips/au1000/pb1500/init.c
@@ -1,11 +1,10 @@
/*
*
* BRIEF MODULE DESCRIPTION
- * PB1500 board setup
+ * Pb1500 board setup
*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -45,16 +44,15 @@ void __init prom_init(void)
unsigned char *memsize_str;
unsigned long memsize;
- prom_argc = (int) fw_arg0;
- prom_argv = (char **) fw_arg1;
- prom_envp = (char **) fw_arg2;
+ prom_argc = (int)fw_arg0;
+ prom_argv = (char **)fw_arg1;
+ prom_envp = (char **)fw_arg2;
prom_init_cmdline();
memsize_str = prom_getenv("memsize");
- if (!memsize_str) {
+ if (!memsize_str)
memsize = 0x04000000;
- } else {
- memsize = simple_strtol(memsize_str, NULL, 0);
- }
+ else
+ memsize = strict_strtol(memsize_str, 0, NULL);
add_memory_region(0, memsize, BOOT_MEM_RAM);
}
diff --git a/arch/mips/au1000/pb1500/irqmap.c b/arch/mips/au1000/pb1500/irqmap.c
index 4817ab44d07f..39c4682766a8 100644
--- a/arch/mips/au1000/pb1500/irqmap.c
+++ b/arch/mips/au1000/pb1500/irqmap.c
@@ -31,12 +31,12 @@
#include <asm/mach-au1x00/au1000.h>
char irq_tab_alchemy[][5] __initdata = {
- [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT370 */
- [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */
+ [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT370 */
+ [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */
};
struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
- { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 },
{ AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
{ AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
{ AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
diff --git a/arch/mips/au1000/pb1550/Makefile b/arch/mips/au1000/pb1550/Makefile
index aa35bc6cb8cf..7d8beca87fa5 100644
--- a/arch/mips/au1000/pb1550/Makefile
+++ b/arch/mips/au1000/pb1550/Makefile
@@ -1,9 +1,8 @@
#
-# Copyright 2000 MontaVista Software Inc.
-# Author: MontaVista Software, Inc.
-# ppopov@mvista.com or source@mvista.com
+# Copyright 2000, 2008 MontaVista Software Inc.
+# Author: MontaVista Software, Inc. <source@mvista.com>
#
-# Makefile for the Alchemy Semiconductor PB1000 board.
+# Makefile for the Alchemy Semiconductor Pb1550 board.
#
lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1550/board_setup.c b/arch/mips/au1000/pb1550/board_setup.c
index 45d60872b565..0ed76b64b6ab 100644
--- a/arch/mips/au1000/pb1550/board_setup.c
+++ b/arch/mips/au1000/pb1550/board_setup.c
@@ -3,9 +3,8 @@
* BRIEF MODULE DESCRIPTION
* Alchemy Pb1550 board setup.
*
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2000, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -35,15 +34,16 @@
void board_reset(void)
{
- /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
- au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
+ /* Hit BCSR.SYSTEM[RESET] */
+ au_writew(au_readw(0xAF00001C) & ~BCSR_SYSTEM_RESET, 0xAF00001C);
}
void __init board_setup(void)
{
u32 pin_func;
- /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
+ /*
+ * Enable PSC1 SYNC for AC'97. Normaly done in audio driver,
* but it is board specific code, so put it here.
*/
pin_func = au_readl(SYS_PINFUNC);
@@ -51,8 +51,8 @@ void __init board_setup(void)
pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
au_writel(pin_func, SYS_PINFUNC);
- au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
+ au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
au_sync();
- printk("AMD Alchemy Pb1550 Board\n");
+ printk(KERN_INFO "AMD Alchemy Pb1550 Board\n");
}
diff --git a/arch/mips/au1000/pb1550/init.c b/arch/mips/au1000/pb1550/init.c
index f6b2fc587980..1b5f58434bb7 100644
--- a/arch/mips/au1000/pb1550/init.c
+++ b/arch/mips/au1000/pb1550/init.c
@@ -1,11 +1,10 @@
/*
*
* BRIEF MODULE DESCRIPTION
- * PB1550 board setup
+ * Pb1550 board setup
*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -45,16 +44,15 @@ void __init prom_init(void)
unsigned char *memsize_str;
unsigned long memsize;
- prom_argc = (int) fw_arg0;
- prom_argv = (char **) fw_arg1;
- prom_envp = (char **) fw_arg2;
+ prom_argc = (int)fw_arg0;
+ prom_argv = (char **)fw_arg1;
+ prom_envp = (char **)fw_arg2;
prom_init_cmdline();
memsize_str = prom_getenv("memsize");
- if (!memsize_str) {
+ if (!memsize_str)
memsize = 0x08000000;
- } else {
- memsize = simple_strtol(memsize_str, NULL, 0);
- }
+ else
+ memsize = strict_strtol(memsize_str, 0, NULL);
add_memory_region(0, memsize, BOOT_MEM_RAM);
}
diff --git a/arch/mips/au1000/pb1550/irqmap.c b/arch/mips/au1000/pb1550/irqmap.c
index e1dac37af08a..a02a4d1fa899 100644
--- a/arch/mips/au1000/pb1550/irqmap.c
+++ b/arch/mips/au1000/pb1550/irqmap.c
@@ -1,6 +1,6 @@
/*
* BRIEF MODULE DESCRIPTION
- * Au1xxx irq map table
+ * Au1xx0 IRQ map table
*
* Copyright 2003 Embedded Edge, LLC
* dan@embeddededge.com
@@ -31,8 +31,8 @@
#include <asm/mach-au1x00/au1000.h>
char irq_tab_alchemy[][5] __initdata = {
- [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */
- [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */
+ [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */
+ [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */
};
struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
diff --git a/arch/mips/au1000/xxs1500/Makefile b/arch/mips/au1000/xxs1500/Makefile
index 44d7f7056ae7..db3c526f64d8 100644
--- a/arch/mips/au1000/xxs1500/Makefile
+++ b/arch/mips/au1000/xxs1500/Makefile
@@ -1,7 +1,6 @@
#
# Copyright 2003 MontaVista Software Inc.
-# Author: MontaVista Software, Inc.
-# ppopov@mvista.com or source@mvista.com
+# Author: MontaVista Software, Inc. <source@mvista.com>
#
# Makefile for MyCable XXS1500 board.
#
diff --git a/arch/mips/au1000/xxs1500/board_setup.c b/arch/mips/au1000/xxs1500/board_setup.c
index 79d1798621bf..4c587acac5c3 100644
--- a/arch/mips/au1000/xxs1500/board_setup.c
+++ b/arch/mips/au1000/xxs1500/board_setup.c
@@ -1,7 +1,6 @@
/*
- * Copyright 2000-2003 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2000-2003, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -39,40 +38,40 @@ void __init board_setup(void)
{
u32 pin_func;
- // set multiple use pins (UART3/GPIO) to UART (it's used as UART too)
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~SYS_PF_UR3);
+ /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
+ pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
pin_func |= SYS_PF_UR3;
au_writel(pin_func, SYS_PINFUNC);
- // enable UART
- au_writel(0x01, UART3_ADDR+UART_MOD_CNTRL); // clock enable (CE)
+ /* Enable UART */
+ au_writel(0x01, UART3_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
mdelay(10);
- au_writel(0x03, UART3_ADDR+UART_MOD_CNTRL); // CE and "enable"
+ au_writel(0x03, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
mdelay(10);
- // enable DTR = USB power up
- au_writel(0x01, UART3_ADDR+UART_MCR); //? UART_MCR_DTR is 0x01???
+ /* Enable DTR = USB power up */
+ au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */
#ifdef CONFIG_PCMCIA_XXS1500
- /* setup pcmcia signals */
+ /* Setup PCMCIA signals */
au_writel(0, SYS_PININPUTEN);
- /* gpio 0, 1, and 4 are inputs */
- au_writel(1 | (1<<1) | (1<<4), SYS_TRIOUTCLR);
+ /* GPIO 0, 1, and 4 are inputs */
+ au_writel(1 | (1 << 1) | (1 << 4), SYS_TRIOUTCLR);
- /* enable GPIO2 if not already enabled */
+ /* Enable GPIO2 if not already enabled */
au_writel(1, GPIO2_ENABLE);
- /* gpio2 208/9/10/11 are inputs */
- au_writel((1<<8) | (1<<9) | (1<<10) | (1<<11), GPIO2_DIR);
+ /* GPIO2 208/9/10/11 are inputs */
+ au_writel((1 << 8) | (1 << 9) | (1 << 10) | (1 << 11), GPIO2_DIR);
- /* turn off power */
- au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<14))|(1<<30), GPIO2_OUTPUT);
+ /* Turn off power */
+ au_writel((au_readl(GPIO2_PINSTATE) & ~(1 << 14)) | (1 << 30),
+ GPIO2_OUTPUT);
#endif
-
#ifdef CONFIG_PCI
#if defined(__MIPSEB__)
- au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
+ au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
#else
au_writel(0xf, Au1500_PCI_CFG);
#endif
diff --git a/arch/mips/au1000/xxs1500/init.c b/arch/mips/au1000/xxs1500/init.c
index 24fc6e132dc0..b849bf501c04 100644
--- a/arch/mips/au1000/xxs1500/init.c
+++ b/arch/mips/au1000/xxs1500/init.c
@@ -2,9 +2,8 @@
* BRIEF MODULE DESCRIPTION
* XXS1500 board setup
*
- * Copyright 2003 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2003, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -45,8 +44,8 @@ void __init prom_init(void)
unsigned long memsize;
prom_argc = fw_arg0;
- prom_argv = (char **) fw_arg1;
- prom_envp = (char **) fw_arg2;
+ prom_argv = (char **)fw_arg1;
+ prom_envp = (char **)fw_arg2;
prom_init_cmdline();
@@ -54,6 +53,6 @@ void __init prom_init(void)
if (!memsize_str)
memsize = 0x04000000;
else
- memsize = simple_strtol(memsize_str, NULL, 0);
+ memsize = strict_strtol(memsize_str, 0, NULL);
add_memory_region(0, memsize, BOOT_MEM_RAM);
}
diff --git a/arch/mips/au1000/xxs1500/irqmap.c b/arch/mips/au1000/xxs1500/irqmap.c
index dd6e3d1eb4d4..edf06ed11870 100644
--- a/arch/mips/au1000/xxs1500/irqmap.c
+++ b/arch/mips/au1000/xxs1500/irqmap.c
@@ -31,7 +31,7 @@
#include <asm/mach-au1x00/au1000.h>
struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
- { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 },
{ AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
{ AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
{ AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c
index 82f9e9013e70..62bfb455d1b1 100644
--- a/arch/mips/emma2rh/markeins/setup.c
+++ b/arch/mips/emma2rh/markeins/setup.c
@@ -76,7 +76,9 @@ static void markeins_machine_power_off(void)
while (1) ;
}
-static unsigned long clock[4] = { 166500000, 187312500, 199800000, 210600000 };
+static unsigned long __initdata emma2rh_clock[4] = {
+ 166500000, 187312500, 199800000, 210600000
+};
static unsigned int __init detect_bus_frequency(unsigned long rtc_base)
{
@@ -85,7 +87,8 @@ static unsigned int __init detect_bus_frequency(unsigned long rtc_base)
/* detect from boot strap */
reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
reg = (reg >> 4) & 0x3;
- return clock[reg];
+
+ return emma2rh_clock[reg];
}
void __init plat_time_init(void)
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 45545be3eb86..cc0244036aec 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -56,9 +56,9 @@ obj-$(CONFIG_MIPS_MT_SMP) += smp-mt.o
obj-$(CONFIG_MIPS_CMP) += smp-cmp.o
obj-$(CONFIG_CPU_MIPSR2) += spram.o
-obj-$(CONFIG_MIPS_APSP_KSPD) += kspd.o
obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o
obj-$(CONFIG_MIPS_VPE_APSP_API) += rtlx.o
+obj-$(CONFIG_MIPS_APSP_KSPD) += kspd.o
obj-$(CONFIG_I8259) += i8259.o
obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index a1b48af0992f..02b7713cf71c 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -38,7 +38,7 @@ static inline void align_mod(const int align, const int mod)
".endr\n\t"
".set pop"
:
- : GCC_IMM_ASM(align), GCC_IMM_ASM(mod));
+ : GCC_IMM_ASM() (align), GCC_IMM_ASM() (mod));
}
static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index 290d8e3a664d..469c7237e5ba 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -578,7 +578,7 @@ static inline int map_interpreter(struct elf_phdr *epp, struct elfhdr *ihp,
* process and the system, here we map the page and fill the
* structure
*/
-static void irix_map_prda_page(void)
+static int irix_map_prda_page(void)
{
unsigned long v;
struct prda *pp;
@@ -587,8 +587,8 @@ static void irix_map_prda_page(void)
v = do_brk(PRDA_ADDRESS, PAGE_SIZE);
up_write(&current->mm->mmap_sem);
- if (v < 0)
- return;
+ if (v != PRDA_ADDRESS)
+ return v; /* v must be an error code */
pp = (struct prda *) v;
pp->prda_sys.t_pid = task_pid_vnr(current);
@@ -596,6 +596,8 @@ static void irix_map_prda_page(void)
pp->prda_sys.t_rpid = task_pid_vnr(current);
/* We leave the rest set to zero */
+
+ return 0;
}
@@ -781,7 +783,8 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs)
* IRIX maps a page at 0x200000 which holds some system
* information. Programs depend on this.
*/
- irix_map_prda_page();
+ if (irix_map_prda_page())
+ goto out_free_dentry;
padzero(elf_bss);
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index ceb62dce1c9c..b0591ae0ce56 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -257,7 +257,7 @@ void sp_work_handle_request(void)
vcwd = vpe_getcwd(tclimit);
- /* change to the cwd of the process that loaded the SP program */
+ /* change to cwd of the process that loaded the SP program */
old_fs = get_fs();
set_fs(KERNEL_DS);
sys_chdir(vcwd);
@@ -323,6 +323,9 @@ static void sp_cleanup(void)
set >>= 1;
}
}
+
+ /* Put daemon cwd back to root to avoid umount problems */
+ sys_chdir("/");
}
static int channel_open = 0;
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index 0233798f7155..b88f1c18ff4d 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -72,6 +72,15 @@ static void rtlx_dispatch(void)
static irqreturn_t rtlx_interrupt(int irq, void *dev_id)
{
int i;
+ unsigned int flags, vpeflags;
+
+ /* Ought not to be strictly necessary for SMTC builds */
+ local_irq_save(flags);
+ vpeflags = dvpe();
+ set_c0_status(0x100 << MIPS_CPU_RTLX_IRQ);
+ irq_enable_hazard();
+ evpe(vpeflags);
+ local_irq_restore(flags);
for (i = 0; i < RTLX_CHANNELS; i++) {
wake_up(&channel_wqs[i].lx_queue);
@@ -108,7 +117,8 @@ static void __used dump_rtlx(void)
static int rtlx_init(struct rtlx_info *rtlxi)
{
if (rtlxi->id != RTLX_ID) {
- printk(KERN_ERR "no valid RTLX id at 0x%p 0x%lx\n", rtlxi, rtlxi->id);
+ printk(KERN_ERR "no valid RTLX id at 0x%p 0x%lx\n",
+ rtlxi, rtlxi->id);
return -ENOEXEC;
}
@@ -162,18 +172,17 @@ int rtlx_open(int index, int can_sleep)
if (rtlx == NULL) {
if( (p = vpe_get_shared(tclimit)) == NULL) {
- if (can_sleep) {
- __wait_event_interruptible(channel_wqs[index].lx_queue,
- (p = vpe_get_shared(tclimit)),
- ret);
- if (ret)
- goto out_fail;
- } else {
- printk(KERN_DEBUG "No SP program loaded, and device "
- "opened with O_NONBLOCK\n");
- ret = -ENOSYS;
+ if (can_sleep) {
+ __wait_event_interruptible(channel_wqs[index].lx_queue,
+ (p = vpe_get_shared(tclimit)), ret);
+ if (ret)
goto out_fail;
- }
+ } else {
+ printk(KERN_DEBUG "No SP program loaded, and device "
+ "opened with O_NONBLOCK\n");
+ ret = -ENOSYS;
+ goto out_fail;
+ }
}
smp_rmb();
@@ -182,7 +191,9 @@ int rtlx_open(int index, int can_sleep)
DEFINE_WAIT(wait);
for (;;) {
- prepare_to_wait(&channel_wqs[index].lx_queue, &wait, TASK_INTERRUPTIBLE);
+ prepare_to_wait(
+ &channel_wqs[index].lx_queue,
+ &wait, TASK_INTERRUPTIBLE);
smp_rmb();
if (*p != NULL)
break;
@@ -195,7 +206,7 @@ int rtlx_open(int index, int can_sleep)
}
finish_wait(&channel_wqs[index].lx_queue, &wait);
} else {
- printk(" *vpe_get_shared is NULL. "
+ pr_err(" *vpe_get_shared is NULL. "
"Has an SP program been loaded?\n");
ret = -ENOSYS;
goto out_fail;
@@ -203,8 +214,9 @@ int rtlx_open(int index, int can_sleep)
}
if ((unsigned int)*p < KSEG0) {
- printk(KERN_WARNING "vpe_get_shared returned an invalid pointer "
- "maybe an error code %d\n", (int)*p);
+ printk(KERN_WARNING "vpe_get_shared returned an "
+ "invalid pointer maybe an error code %d\n",
+ (int)*p);
ret = -ENOSYS;
goto out_fail;
}
@@ -232,6 +244,10 @@ out_ret:
int rtlx_release(int index)
{
+ if (rtlx == NULL) {
+ pr_err("rtlx_release() with null rtlx\n");
+ return 0;
+ }
rtlx->channel[index].lx_state = RTLX_STATE_UNUSED;
return 0;
}
@@ -251,8 +267,8 @@ unsigned int rtlx_read_poll(int index, int can_sleep)
int ret = 0;
__wait_event_interruptible(channel_wqs[index].lx_queue,
- chan->lx_read != chan->lx_write || sp_stopping,
- ret);
+ (chan->lx_read != chan->lx_write) ||
+ sp_stopping, ret);
if (ret)
return ret;
@@ -282,7 +298,9 @@ static inline int write_spacefree(int read, int write, int size)
unsigned int rtlx_write_poll(int index)
{
struct rtlx_channel *chan = &rtlx->channel[index];
- return write_spacefree(chan->rt_read, chan->rt_write, chan->buffer_size);
+
+ return write_spacefree(chan->rt_read, chan->rt_write,
+ chan->buffer_size);
}
ssize_t rtlx_read(int index, void __user *buff, size_t count)
@@ -344,8 +362,8 @@ ssize_t rtlx_write(int index, const void __user *buffer, size_t count)
rt_read = rt->rt_read;
/* total number of bytes to copy */
- count = min(count,
- (size_t)write_spacefree(rt_read, rt->rt_write, rt->buffer_size));
+ count = min(count, (size_t)write_spacefree(rt_read, rt->rt_write,
+ rt->buffer_size));
/* first bit from write pointer to the end of the buffer, or count */
fl = min(count, (size_t) rt->buffer_size - rt->rt_write);
@@ -514,6 +532,11 @@ static int __init rtlx_module_init(void)
if (cpu_has_vint)
set_vi_handler(MIPS_CPU_RTLX_IRQ, rtlx_dispatch);
+ else {
+ pr_err("APRP RTLX init on non-vectored-interrupt processor\n");
+ err = -ENODEV;
+ goto out_chrdev;
+ }
rtlx_irq.dev_id = rtlx;
setup_irq(rtlx_irq_num, &rtlx_irq);
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 39f3dfe134fb..c6a063b2a0d9 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -331,6 +331,7 @@ static void __init bootmem_init(void)
/*
* Determine low and high memory ranges
*/
+ max_pfn = max_low_pfn;
if (max_low_pfn > PFN_DOWN(HIGHMEM_START)) {
#ifdef CONFIG_HIGHMEM
highstart_pfn = PFN_DOWN(HIGHMEM_START);
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 33780cc61ce9..63370cdd3c90 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -87,8 +87,8 @@ struct plat_smp_ops *mp_ops;
__cpuinit void register_smp_ops(struct plat_smp_ops *ops)
{
- if (ops)
- printk(KERN_WARNING "Overriding previous set SMP ops\n");
+ if (mp_ops)
+ printk(KERN_WARNING "Overriding previously set SMP ops\n");
mp_ops = ops;
}
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 39804c584edd..2794501ff302 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -269,7 +269,7 @@ static void *alloc_progmem(unsigned long len)
* This means you must tell Linux to use less memory than you
* physically have, for example by passing a mem= boot argument.
*/
- addr = pfn_to_kaddr(max_pfn);
+ addr = pfn_to_kaddr(max_low_pfn);
memset(addr, 0, len);
#else
/* simple grab some mem for now */
@@ -781,10 +781,15 @@ static int vpe_run(struct vpe * v)
/* take system out of configuration state */
clear_c0_mvpcontrol(MVPCONTROL_VPC);
+ /*
+ * SMTC/SMVP kernels manage VPE enable independently,
+ * but uniprocessor kernels need to turn it on, even
+ * if that wasn't the pre-dvpe() state.
+ */
#ifdef CONFIG_SMP
- evpe(EVPE_ENABLE);
-#else
evpe(vpeflags);
+#else
+ evpe(EVPE_ENABLE);
#endif
emt(dmt_flag);
local_irq_restore(flags);
@@ -840,7 +845,7 @@ static int vpe_elfload(struct vpe * v)
/* Sanity checks against insmoding binaries or wrong arch,
weird elf version */
- if (memcmp(hdr->e_ident, ELFMAG, 4) != 0
+ if (memcmp(hdr->e_ident, ELFMAG, SELFMAG) != 0
|| (hdr->e_type != ET_REL && hdr->e_type != ET_EXEC)
|| !elf_check_arch(hdr)
|| hdr->e_shentsize != sizeof(*sechdrs)) {
@@ -947,12 +952,14 @@ static int vpe_elfload(struct vpe * v)
struct elf_phdr *phdr = (struct elf_phdr *) ((char *)hdr + hdr->e_phoff);
for (i = 0; i < hdr->e_phnum; i++) {
- if (phdr->p_type != PT_LOAD)
- continue;
-
- memcpy((void *)phdr->p_paddr, (char *)hdr + phdr->p_offset, phdr->p_filesz);
- memset((void *)phdr->p_paddr + phdr->p_filesz, 0, phdr->p_memsz - phdr->p_filesz);
- phdr++;
+ if (phdr->p_type == PT_LOAD) {
+ memcpy((void *)phdr->p_paddr,
+ (char *)hdr + phdr->p_offset,
+ phdr->p_filesz);
+ memset((void *)phdr->p_paddr + phdr->p_filesz,
+ 0, phdr->p_memsz - phdr->p_filesz);
+ }
+ phdr++;
}
for (i = 0; i < hdr->e_shnum; i++) {
@@ -1107,7 +1114,7 @@ static int vpe_release(struct inode *inode, struct file *filp)
return -ENODEV;
hdr = (Elf_Ehdr *) v->pbuffer;
- if (memcmp(hdr->e_ident, ELFMAG, 4) == 0) {
+ if (memcmp(hdr->e_ident, ELFMAG, SELFMAG) == 0) {
if (vpe_elfload(v) >= 0) {
vpe_run(v);
} else {
diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c
index 10dd2af2343b..8f2cd8eda741 100644
--- a/arch/mips/mm/highmem.c
+++ b/arch/mips/mm/highmem.c
@@ -116,4 +116,3 @@ EXPORT_SYMBOL(__kmap);
EXPORT_SYMBOL(__kunmap);
EXPORT_SYMBOL(__kmap_atomic);
EXPORT_SYMBOL(__kunmap_atomic);
-EXPORT_SYMBOL(__kmap_atomic_to_page);
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index da8cbb6899dc..b40df7d2cf44 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -281,7 +281,7 @@ static inline int n_counters(void)
static void reset_counters(void *arg)
{
- int counters = (int)arg;
+ int counters = (int)(long)arg;
switch (counters) {
case 4:
w_c0_perfctrl3(0);
@@ -313,7 +313,7 @@ static int __init mipsxx_init(void)
if (!cpu_has_mipsmt_pertccounters)
counters = counters_total_to_per_cpu(counters);
#endif
- on_each_cpu(reset_counters, (void *)counters, 0, 1);
+ on_each_cpu(reset_counters, (void *)(long)counters, 0, 1);
op_model_mipsxx_ops.num_counters = counters;
switch (current_cpu_type()) {
@@ -382,7 +382,7 @@ static void mipsxx_exit(void)
int counters = op_model_mipsxx_ops.num_counters;
counters = counters_per_cpu_to_total(counters);
- on_each_cpu(reset_counters, (void *)counters, 0, 1);
+ on_each_cpu(reset_counters, (void *)(long)counters, 0, 1);
perf_irq = save_perf_irq;
}
diff --git a/arch/mips/pci/fixup-au1000.c b/arch/mips/pci/fixup-au1000.c
index 00c36c9dbe0e..e2ddfc49237c 100644
--- a/arch/mips/pci/fixup-au1000.c
+++ b/arch/mips/pci/fixup-au1000.c
@@ -1,10 +1,9 @@
/*
* BRIEF MODULE DESCRIPTION
- * Board specific pci fixups.
+ * Board specific PCI fixups.
*
- * Copyright 2001-2003 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001-2003, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c
index 1314bd58f036..9a57c5ab91dd 100644
--- a/arch/mips/pci/ops-au1000.c
+++ b/arch/mips/pci/ops-au1000.c
@@ -1,10 +1,9 @@
/*
* BRIEF MODULE DESCRIPTION
- * Alchemy/AMD Au1x00 PCI support.
+ * Alchemy/AMD Au1xx0 PCI support.
*
- * Copyright 2001-2003, 2007 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
+ * Copyright 2001-2003, 2007-2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
*
* Support for all devices (greater than 16) added by David Gathright.
*
@@ -28,6 +27,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
+
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
@@ -36,9 +36,9 @@
#include <asm/mach-au1x00/au1000.h>
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
+#undef DEBUG
+#ifdef DEBUG
+#define DBG(x...) printk(KERN_DEBUG x)
#else
#define DBG(x...)
#endif
@@ -46,7 +46,6 @@
#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1
-
int (*board_pci_idsel)(unsigned int devsel, int assert);
void mod_wired_entry(int entry, unsigned long entrylo0,
@@ -92,10 +91,9 @@ void __init au1x_pci_cfg_init(void)
}
static int config_access(unsigned char access_type, struct pci_bus *bus,
- unsigned int dev_fn, unsigned char where,
- u32 * data)
+ unsigned int dev_fn, unsigned char where, u32 *data)
{
-#if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
+#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
unsigned int device = PCI_SLOT(dev_fn);
unsigned int function = PCI_FUNC(dev_fn);
unsigned long offset, status;
@@ -114,38 +112,36 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
Au1500_PCI_STATCMD);
au_sync_udelay(1);
- /* Allow board vendors to implement their own off-chip idsel.
+ /*
+ * Allow board vendors to implement their own off-chip IDSEL.
* If it doesn't succeed, may as well bail out at this point.
*/
- if (board_pci_idsel) {
- if (board_pci_idsel(device, 1) == 0) {
- *data = 0xffffffff;
- local_irq_restore(flags);
- return -1;
- }
+ if (board_pci_idsel && board_pci_idsel(device, 1) == 0) {
+ *data = 0xffffffff;
+ local_irq_restore(flags);
+ return -1;
}
- /* setup the config window */
- if (bus->number == 0) {
- cfg_base = ((1<<device)<<11);
- } else {
- cfg_base = 0x80000000 | (bus->number<<16) | (device<<11);
- }
+ /* Setup the config window */
+ if (bus->number == 0)
+ cfg_base = (1 << device) << 11;
+ else
+ cfg_base = 0x80000000 | (bus->number << 16) | (device << 11);
- /* setup the lower bits of the 36 bit address */
- offset = (function << 8) | (where & ~0x3);
- /* pick up any address that falls below the page mask */
+ /* Setup the lower bits of the 36-bit address */
+ offset = (function << 8) | (where & ~0x3);
+ /* Pick up any address that falls below the page mask */
offset |= cfg_base & ~PAGE_MASK;
- /* page boundary */
+ /* Page boundary */
cfg_base = cfg_base & PAGE_MASK;
/*
* To improve performance, if the current device is the same as
* the last device accessed, we don't touch the TLB.
*/
- entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7;
- entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7;
+ entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7;
+ entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7;
if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) {
mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1,
(unsigned long)pci_cfg_vm->addr, PM_4K);
@@ -153,38 +149,37 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
last_entryLo1 = entryLo1;
}
- if (access_type == PCI_ACCESS_WRITE) {
+ if (access_type == PCI_ACCESS_WRITE)
au_writel(*data, (int)(pci_cfg_vm->addr + offset));
- } else {
+ else
*data = au_readl((int)(pci_cfg_vm->addr + offset));
- }
+
au_sync_udelay(2);
- DBG("cfg_access %d bus->number %d dev %d at %x *data %x conf %x\n",
- access_type, bus->number, device, where, *data, offset);
+ DBG("cfg_access %d bus->number %u dev %u at %x *data %x conf %lx\n",
+ access_type, bus->number, device, where, *data, offset);
- /* check master abort */
+ /* Check master abort */
status = au_readl(Au1500_PCI_STATCMD);
- if (status & (1<<29)) {
+ if (status & (1 << 29)) {
*data = 0xffffffff;
error = -1;
DBG("Au1x Master Abort\n");
} else if ((status >> 28) & 0xf) {
- DBG("PCI ERR detected: device %d, status %x\n", device, ((status >> 28) & 0xf));
+ DBG("PCI ERR detected: device %u, status %lx\n",
+ device, (status >> 28) & 0xf);
- /* clear errors */
+ /* Clear errors */
au_writel(status & 0xf000ffff, Au1500_PCI_STATCMD);
*data = 0xffffffff;
error = -1;
}
- /* Take away the idsel.
- */
- if (board_pci_idsel) {
+ /* Take away the IDSEL. */
+ if (board_pci_idsel)
(void)board_pci_idsel(device, 0);
- }
local_irq_restore(flags);
return error;
@@ -192,7 +187,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
}
static int read_config_byte(struct pci_bus *bus, unsigned int devfn,
- int where, u8 * val)
+ int where, u8 *val)
{
u32 data;
int ret;
@@ -206,9 +201,8 @@ static int read_config_byte(struct pci_bus *bus, unsigned int devfn,
return ret;
}
-
static int read_config_word(struct pci_bus *bus, unsigned int devfn,
- int where, u16 * val)
+ int where, u16 *val)
{
u32 data;
int ret;
@@ -221,7 +215,7 @@ static int read_config_word(struct pci_bus *bus, unsigned int devfn,
}
static int read_config_dword(struct pci_bus *bus, unsigned int devfn,
- int where, u32 * val)
+ int where, u32 *val)
{
int ret;
@@ -229,9 +223,8 @@ static int read_config_dword(struct pci_bus *bus, unsigned int devfn,
return ret;
}
-static int
-write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
- u8 val)
+static int write_config_byte(struct pci_bus *bus, unsigned int devfn,
+ int where, u8 val)
{
u32 data = 0;
@@ -239,7 +232,7 @@ write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
return -1;
data = (data & ~(0xff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
+ (val << ((where & 3) << 3));
if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return -1;
@@ -247,9 +240,8 @@ write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
return PCIBIOS_SUCCESSFUL;
}
-static int
-write_config_word(struct pci_bus *bus, unsigned int devfn, int where,
- u16 val)
+static int write_config_word(struct pci_bus *bus, unsigned int devfn,
+ int where, u16 val)
{
u32 data = 0;
@@ -257,18 +249,16 @@ write_config_word(struct pci_bus *bus, unsigned int devfn, int where,
return -1;
data = (data & ~(0xffff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
+ (val << ((where & 3) << 3));
if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return -1;
-
return PCIBIOS_SUCCESSFUL;
}
-static int
-write_config_dword(struct pci_bus *bus, unsigned int devfn, int where,
- u32 val)
+static int write_config_dword(struct pci_bus *bus, unsigned int devfn,
+ int where, u32 val)
{
if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val))
return -1;
@@ -277,18 +267,20 @@ write_config_dword(struct pci_bus *bus, unsigned int devfn, int where,
}
static int config_read(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 * val)
+ int where, int size, u32 *val)
{
switch (size) {
case 1: {
u8 _val;
int rc = read_config_byte(bus, devfn, where, &_val);
+
*val = _val;
return rc;
}
- case 2: {
+ case 2: {
u16 _val;
int rc = read_config_word(bus, devfn, where, &_val);
+
*val = _val;
return rc;
}
@@ -310,7 +302,6 @@ static int config_write(struct pci_bus *bus, unsigned int devfn,
}
}
-
struct pci_ops au1x_pci_ops = {
config_read,
config_write
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c b/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c
index ab96a2d7f4c4..11769b55438c 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c
@@ -126,9 +126,6 @@ static irqreturn_t hwbutton_handler(int irq, void *data)
struct hwbutton_interrupt *hirq = data;
unsigned long cic_ext = *CIC_EXT_CFG_REG;
- if (irq != hirq->irq)
- return IRQ_NONE;
-
if (CIC_EXT_IS_ACTIVE_HI(cic_ext, hirq->eirq)) {
/* Interrupt: pin is now HI */
CIC_EXT_SET_ACTIVE_LO(cic_ext, hirq->eirq);
@@ -164,7 +161,7 @@ static int msp_hwbutton_register(struct hwbutton_interrupt *hirq)
*CIC_EXT_CFG_REG = cic_ext;
return request_irq(hirq->irq, hwbutton_handler, IRQF_DISABLED,
- hirq->name, (void *)hirq);
+ hirq->name, hirq);
}
static int __init msp_hwbutton_setup(void)
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 25d3baf0ebc4..9cebc9e7da63 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -158,7 +158,7 @@ static void rt_set_mode(enum clock_event_mode mode,
}
}
-unsigned int rt_timer_irq;
+int rt_timer_irq;
static irqreturn_t hub_rt_counter_handler(int irq, void *dev_id)
{
@@ -219,7 +219,7 @@ static void __cpuinit hub_rt_clock_event_init(void)
static void __init hub_rt_clock_event_global_init(void)
{
- unsigned int irq;
+ int irq;
do {
smp_wmb();
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 6a6409adc564..e856218da90d 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -186,17 +186,6 @@ config PREEMPT
Say Y here if you are building a kernel for a desktop, embedded
or real-time system. Say N if you are unsure.
-config PREEMPT_BKL
- bool "Preempt The Big Kernel Lock"
- depends on PREEMPT
- default y
- help
- This option reduces the latency of the kernel by making the
- big kernel lock preemptible.
-
- Say Y here if you are building a kernel for a desktop system.
- Say N if you are unsure.
-
config MN10300_CURRENT_IN_E2
bool "Hold current task address in E2 register"
default y
diff --git a/arch/mn10300/boot/install.sh b/arch/mn10300/boot/install.sh
index 072951c83976..abba30971191 100644
--- a/arch/mn10300/boot/install.sh
+++ b/arch/mn10300/boot/install.sh
@@ -26,42 +26,42 @@ rm -fr $4/../usr/include/linux $4/../usr/include/asm
install -c -m 0755 $2 $4/vmlinuz
install -c -m 0755 $5 $4/boot.rom
install -c -m 0755 -d $4/../usr/include/linux
-cd $TOPDIR/include/linux
+cd ${srctree}/include/linux
for i in `find . -maxdepth 1 -name '*.h' -print`; do
install -c -m 0644 $i $4/../usr/include/linux
done
install -c -m 0755 -d $4/../usr/include/linux/byteorder
-cd $TOPDIR/include/linux/byteorder
+cd ${srctree}/include/linux/byteorder
for i in `find . -name '*.h' -print`; do
install -c -m 0644 $i $4/../usr/include/linux/byteorder
done
install -c -m 0755 -d $4/../usr/include/linux/lockd
-cd $TOPDIR/include/linux/lockd
+cd ${srctree}/include/linux/lockd
for i in `find . -name '*.h' -print`; do
install -c -m 0644 $i $4/../usr/include/linux/lockd
done
install -c -m 0755 -d $4/../usr/include/linux/netfilter_ipv4
-cd $TOPDIR/include/linux/netfilter_ipv4
+cd ${srctree}/include/linux/netfilter_ipv4
for i in `find . -name '*.h' -print`; do
install -c -m 0644 $i $4/../usr/include/linux/netfilter_ipv4
done
install -c -m 0755 -d $4/../usr/include/linux/nfsd
-cd $TOPDIR/include/linux/nfsd
+cd ${srctree}/include/linux/nfsd
for i in `find . -name '*.h' -print`; do
install -c -m 0644 $i $4/../usr/include/linux/nfsd/$i
done
install -c -m 0755 -d $4/../usr/include/linux/raid
-cd $TOPDIR/include/linux/raid
+cd ${srctree}/include/linux/raid
for i in `find . -name '*.h' -print`; do
install -c -m 0644 $i $4/../usr/include/linux/raid
done
install -c -m 0755 -d $4/../usr/include/linux/sunrpc
-cd $TOPDIR/include/linux/sunrpc
+cd ${srctree}/include/linux/sunrpc
for i in `find . -name '*.h' -print`; do
install -c -m 0644 $i $4/../usr/include/linux/sunrpc
done
install -c -m 0755 -d $4/../usr/include/asm
-cd $TOPDIR/include/asm
+cd ${srctree}/include/asm
for i in `find . -name '*.h' -print`; do
install -c -m 0644 $i $4/../usr/include/asm
done
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index 1f012843150f..b0ed709d5743 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -606,7 +606,7 @@ void show_mem(void)
int i, j;
for (i = 0; i < npmem_ranges; i++) {
- zl = node_zonelist(i);
+ zl = node_zonelist(i, 0);
for (j = 0; j < MAX_NR_ZONES; j++) {
struct zoneref *z;
struct zone *zone;
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index a1ae4d6ec990..72d67564bdfc 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -342,9 +342,14 @@
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
+ * From the 440EPx user manual:
+ * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
+ * I/O 1 E800 0000 1 E800 FFFF 64KB
+ * I/O 1 E880 0000 1 EBFF FFFF 56MB
*/
- ranges = <02000000 0 80000000 1 80000000 0 10000000
- 01000000 0 00000000 1 e8000000 0 00100000>;
+ ranges = <02000000 0 80000000 1 80000000 0 40000000
+ 01000000 0 00000000 1 e8000000 0 00010000
+ 01000000 0 00000000 1 e8800000 0 03800000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <42000000 0 0 0 0 0 80000000>;
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index d14cebf62bb0..2346d271fbfd 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -105,6 +105,9 @@ PHONY += systbl_chk
systbl_chk: $(src)/systbl_chk.sh $(obj)/systbl_chk.i
$(call cmd,systbl_chk)
+
+ifeq ($(CONFIG_PPC_MERGE),y)
+
$(obj)/built-in.o: prom_init_check
quiet_cmd_prom_init_check = CALL $<
@@ -114,4 +117,7 @@ PHONY += prom_init_check
prom_init_check: $(src)/prom_init_check.sh $(obj)/prom_init.o
$(call cmd,prom_init_check)
+endif
+
+
clean-files := vmlinux.lds
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index 9f9377745490..d8f0329b1344 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -16,7 +16,6 @@
#include <asm/mmu.h>
#include <asm/pgtable.h>
#include <asm/io.h>
-#include <asm/prom.h>
#include <asm/processor.h>
#include <asm/udbg.h>
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 36080d4d1922..e44d5530f0a6 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1208,6 +1208,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
+ { /* default match */
+ .pvr_mask = 0x00000000,
+ .pvr_value = 0x00000000,
+ .cpu_name = "(generic 40x PPC)",
+ .cpu_features = CPU_FTRS_40X,
+ .cpu_user_features = PPC_FEATURE_32 |
+ PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .machine_check = machine_check_4xx,
+ .platform = "ppc405",
+ }
#endif /* CONFIG_40x */
#ifdef CONFIG_44x
@@ -1421,8 +1433,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check = machine_check_440A,
.platform = "ppc440",
},
+ { /* default match */
+ .pvr_mask = 0x00000000,
+ .pvr_value = 0x00000000,
+ .cpu_name = "(generic 44x PPC)",
+ .cpu_features = CPU_FTRS_44X,
+ .cpu_user_features = COMMON_USER_BOOKE,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .machine_check = machine_check_4xx,
+ .platform = "ppc440",
+ }
#endif /* CONFIG_44x */
-#ifdef CONFIG_FSL_BOOKE
#ifdef CONFIG_E200
{ /* e200z5 */
.pvr_mask = 0xfff00000,
@@ -1451,7 +1473,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check = machine_check_e200,
.platform = "ppc5554",
},
-#elif defined(CONFIG_E500)
+ { /* default match */
+ .pvr_mask = 0x00000000,
+ .pvr_value = 0x00000000,
+ .cpu_name = "(generic E200 PPC)",
+ .cpu_features = CPU_FTRS_E200,
+ .cpu_user_features = COMMON_USER_BOOKE |
+ PPC_FEATURE_HAS_EFP_SINGLE |
+ PPC_FEATURE_UNIFIED_CACHE,
+ .dcache_bsize = 32,
+ .machine_check = machine_check_e200,
+ .platform = "ppc5554",
+ }
+#endif /* CONFIG_E200 */
+#ifdef CONFIG_E500
{ /* e500 */
.pvr_mask = 0xffff0000,
.pvr_value = 0x80200000,
@@ -1487,20 +1522,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check = machine_check_e500,
.platform = "ppc8548",
},
-#endif
-#endif
-#if !CLASSIC_PPC
{ /* default match */
.pvr_mask = 0x00000000,
.pvr_value = 0x00000000,
- .cpu_name = "(generic PPC)",
- .cpu_features = CPU_FTRS_GENERIC_32,
- .cpu_user_features = PPC_FEATURE_32,
+ .cpu_name = "(generic E500 PPC)",
+ .cpu_features = CPU_FTRS_E500,
+ .cpu_user_features = COMMON_USER_BOOKE |
+ PPC_FEATURE_HAS_SPE_COMP |
+ PPC_FEATURE_HAS_EFP_SINGLE_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .machine_check = machine_check_e500,
.platform = "powerpc",
}
-#endif /* !CLASSIC_PPC */
+#endif /* CONFIG_E500 */
#endif /* CONFIG_PPC32 */
};
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index b84ec6a2fc94..c2b9dc4fce5d 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -653,7 +653,14 @@ finish_tlb_load:
rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */
rlwimi r12, r10, 0, 26, 31 /* Insert static perms */
- rlwinm r12, r12, 0, 20, 15 /* Clear U0-U3 */
+
+ /*
+ * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
+ * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
+ * include/asm-powerpc/pgtable-ppc32.h for details).
+ */
+ rlwinm r12, r12, 0, 20, 10
+
tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */
/* Done...restore registers and get out of here.
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 024805e1747d..25e84c0e1166 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -1517,10 +1517,6 @@ _INIT_STATIC(start_here_multiplatform)
addi r2,r2,0x4000
add r2,r2,r26
- /* Set initial ptr to current */
- LOAD_REG_IMMEDIATE(r4, init_task)
- std r4,PACACURRENT(r13)
-
/* Do very early kernel initializations, including initial hash table,
* stab and slb setup before we turn on relocation. */
diff --git a/arch/powerpc/kernel/isa-bridge.c b/arch/powerpc/kernel/isa-bridge.c
index 289af348978d..4d5731b2429a 100644
--- a/arch/powerpc/kernel/isa-bridge.c
+++ b/arch/powerpc/kernel/isa-bridge.c
@@ -108,9 +108,6 @@ static void __devinit pci_process_ISA_OF_ranges(struct device_node *isa_node,
if (size > 0x10000)
size = 0x10000;
- printk(KERN_ERR "no ISA IO ranges or unexpected isa range, "
- "mapping 64k\n");
-
__ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE,
size, _PAGE_NO_CACHE|_PAGE_GUARDED);
return;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 25e3fd8606ab..098fd96a394a 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -170,6 +170,8 @@ void __init setup_paca(int cpu)
void __init early_setup(unsigned long dt_ptr)
{
+ /* -------- printk is _NOT_ safe to use here ! ------- */
+
/* Fill in any unititialised pacas */
initialise_pacas();
@@ -179,12 +181,14 @@ void __init early_setup(unsigned long dt_ptr)
/* Assume we're on cpu 0 for now. Don't write to the paca yet! */
setup_paca(0);
- /* Enable early debugging if any specified (see udbg.h) */
- udbg_early_init();
-
/* Initialize lockdep early or else spinlocks will blow */
lockdep_init();
+ /* -------- printk is now safe to use ------- */
+
+ /* Enable early debugging if any specified (see udbg.h) */
+ udbg_early_init();
+
DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
/*
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 4bb023f4c869..c71d37dc6a88 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -10,6 +10,7 @@ ifeq ($(CONFIG_PPC_MERGE),y)
obj-y := string.o alloc.o \
checksum_$(CONFIG_WORD_SIZE).o
obj-$(CONFIG_PPC32) += div64.o copy_32.o
+obj-$(CONFIG_HAS_IOMEM) += devres.o
endif
obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \
diff --git a/arch/powerpc/lib/devres.c b/arch/powerpc/lib/devres.c
new file mode 100644
index 000000000000..292115d98ea9
--- /dev/null
+++ b/arch/powerpc/lib/devres.c
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/device.h> /* devres_*(), devm_ioremap_release() */
+#include <linux/io.h> /* ioremap_flags() */
+#include <linux/module.h> /* EXPORT_SYMBOL() */
+
+/**
+ * devm_ioremap_prot - Managed ioremap_flags()
+ * @dev: Generic device to remap IO address for
+ * @offset: BUS offset to map
+ * @size: Size of map
+ * @flags: Page flags
+ *
+ * Managed ioremap_prot(). Map is automatically unmapped on driver
+ * detach.
+ */
+void __iomem *devm_ioremap_prot(struct device *dev, resource_size_t offset,
+ size_t size, unsigned long flags)
+{
+ void __iomem **ptr, *addr;
+
+ ptr = devres_alloc(devm_ioremap_release, sizeof(*ptr), GFP_KERNEL);
+ if (!ptr)
+ return NULL;
+
+ addr = ioremap_flags(offset, size, flags);
+ if (addr) {
+ *ptr = addr;
+ devres_add(dev, ptr);
+ } else
+ devres_free(ptr);
+
+ return addr;
+}
+EXPORT_SYMBOL(devm_ioremap_prot);
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 04f74f9f9ab6..5bf7df146022 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -35,6 +35,7 @@
#include <linux/percpu.h>
#include <linux/types.h>
#include <linux/ioport.h>
+#include <linux/kernel_stat.h>
#include <asm/io.h>
#include <asm/pgtable.h>
@@ -231,6 +232,54 @@ static int iic_host_match(struct irq_host *h, struct device_node *node)
"IBM,CBEA-Internal-Interrupt-Controller");
}
+extern int noirqdebug;
+
+static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
+{
+ const unsigned int cpu = smp_processor_id();
+
+ spin_lock(&desc->lock);
+
+ desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
+
+ /*
+ * If we're currently running this IRQ, or its disabled,
+ * we shouldn't process the IRQ. Mark it pending, handle
+ * the necessary masking and go out
+ */
+ if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
+ !desc->action)) {
+ desc->status |= IRQ_PENDING;
+ goto out_eoi;
+ }
+
+ kstat_cpu(cpu).irqs[irq]++;
+
+ /* Mark the IRQ currently in progress.*/
+ desc->status |= IRQ_INPROGRESS;
+
+ do {
+ struct irqaction *action = desc->action;
+ irqreturn_t action_ret;
+
+ if (unlikely(!action))
+ goto out_eoi;
+
+ desc->status &= ~IRQ_PENDING;
+ spin_unlock(&desc->lock);
+ action_ret = handle_IRQ_event(irq, action);
+ if (!noirqdebug)
+ note_interrupt(irq, desc, action_ret);
+ spin_lock(&desc->lock);
+
+ } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
+
+ desc->status &= ~IRQ_INPROGRESS;
+out_eoi:
+ desc->chip->eoi(irq);
+ spin_unlock(&desc->lock);
+}
+
static int iic_host_map(struct irq_host *h, unsigned int virq,
irq_hw_number_t hw)
{
@@ -240,10 +289,10 @@ static int iic_host_map(struct irq_host *h, unsigned int virq,
break;
case IIC_IRQ_TYPE_IOEXC:
set_irq_chip_and_handler(virq, &iic_ioexc_chip,
- handle_fasteoi_irq);
+ handle_iic_irq);
break;
default:
- set_irq_chip_and_handler(virq, &iic_chip, handle_fasteoi_irq);
+ set_irq_chip_and_handler(virq, &iic_chip, handle_iic_irq);
}
return 0;
}
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index 6bab44b7716b..70c660121ec4 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -141,6 +141,10 @@ static void spu_restart_dma(struct spu *spu)
if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
+ else {
+ set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
+ mb();
+ }
}
static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
@@ -226,11 +230,13 @@ static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
return 0;
}
- spu->class_0_pending = 0;
- spu->dar = ea;
- spu->dsisr = dsisr;
+ spu->class_1_dar = ea;
+ spu->class_1_dsisr = dsisr;
+
+ spu->stop_callback(spu, 1);
- spu->stop_callback(spu);
+ spu->class_1_dar = 0;
+ spu->class_1_dsisr = 0;
return 0;
}
@@ -318,11 +324,15 @@ spu_irq_class_0(int irq, void *data)
stat = spu_int_stat_get(spu, 0) & mask;
spu->class_0_pending |= stat;
- spu->dsisr = spu_mfc_dsisr_get(spu);
- spu->dar = spu_mfc_dar_get(spu);
+ spu->class_0_dsisr = spu_mfc_dsisr_get(spu);
+ spu->class_0_dar = spu_mfc_dar_get(spu);
spin_unlock(&spu->register_lock);
- spu->stop_callback(spu);
+ spu->stop_callback(spu, 0);
+
+ spu->class_0_pending = 0;
+ spu->class_0_dsisr = 0;
+ spu->class_0_dar = 0;
spu_int_stat_clear(spu, 0, stat);
@@ -363,6 +373,9 @@ spu_irq_class_1(int irq, void *data)
if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
;
+ spu->class_1_dsisr = 0;
+ spu->class_1_dar = 0;
+
return stat ? IRQ_HANDLED : IRQ_NONE;
}
@@ -396,10 +409,10 @@ spu_irq_class_2(int irq, void *data)
spu->ibox_callback(spu);
if (stat & CLASS2_SPU_STOP_INTR)
- spu->stop_callback(spu);
+ spu->stop_callback(spu, 2);
if (stat & CLASS2_SPU_HALT_INTR)
- spu->stop_callback(spu);
+ spu->stop_callback(spu, 2);
if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
spu->mfc_callback(spu);
diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.c b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
index 67fa7247b80a..906a0a2a9fe1 100644
--- a/arch/powerpc/platforms/cell/spu_priv1_mmio.c
+++ b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
@@ -28,6 +28,7 @@
#include <linux/io.h>
#include <linux/mutex.h>
#include <linux/device.h>
+#include <linux/sched.h>
#include <asm/spu.h>
#include <asm/spu_priv1.h>
@@ -75,8 +76,19 @@ static u64 int_stat_get(struct spu *spu, int class)
static void cpu_affinity_set(struct spu *spu, int cpu)
{
- u64 target = iic_get_target_id(cpu);
- u64 route = target << 48 | target << 32 | target << 16;
+ u64 target;
+ u64 route;
+
+ if (nr_cpus_node(spu->node)) {
+ cpumask_t spumask = node_to_cpumask(spu->node);
+ cpumask_t cpumask = node_to_cpumask(cpu_to_node(cpu));
+
+ if (!cpus_intersects(spumask, cpumask))
+ return;
+ }
+
+ target = iic_get_target_id(cpu);
+ route = target << 48 | target << 32 | target << 16;
out_be64(&spu->priv1->int_route_RW, route);
}
diff --git a/arch/powerpc/platforms/cell/spufs/fault.c b/arch/powerpc/platforms/cell/spufs/fault.c
index e46d300e21a5..f093a581ac74 100644
--- a/arch/powerpc/platforms/cell/spufs/fault.c
+++ b/arch/powerpc/platforms/cell/spufs/fault.c
@@ -83,13 +83,18 @@ int spufs_handle_class0(struct spu_context *ctx)
return 0;
if (stat & CLASS0_DMA_ALIGNMENT_INTR)
- spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_DMA_ALIGNMENT);
+ spufs_handle_event(ctx, ctx->csa.class_0_dar,
+ SPE_EVENT_DMA_ALIGNMENT);
if (stat & CLASS0_INVALID_DMA_COMMAND_INTR)
- spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_INVALID_DMA);
+ spufs_handle_event(ctx, ctx->csa.class_0_dar,
+ SPE_EVENT_INVALID_DMA);
if (stat & CLASS0_SPU_ERROR_INTR)
- spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_SPE_ERROR);
+ spufs_handle_event(ctx, ctx->csa.class_0_dar,
+ SPE_EVENT_SPE_ERROR);
+
+ ctx->csa.class_0_pending = 0;
return -EIO;
}
@@ -119,8 +124,8 @@ int spufs_handle_class1(struct spu_context *ctx)
* in time, we can still expect to get the same fault
* the immediately after the context restore.
*/
- ea = ctx->csa.dar;
- dsisr = ctx->csa.dsisr;
+ ea = ctx->csa.class_1_dar;
+ dsisr = ctx->csa.class_1_dsisr;
if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)))
return 0;
@@ -158,7 +163,7 @@ int spufs_handle_class1(struct spu_context *ctx)
* time slicing will not preempt the context while the page fault
* handler is running. Context switch code removes mappings.
*/
- ctx->csa.dar = ctx->csa.dsisr = 0;
+ ctx->csa.class_1_dar = ctx->csa.class_1_dsisr = 0;
/*
* If we handled the fault successfully and are in runnable
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 0c32a05ab068..f407b2471855 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -23,6 +23,7 @@
#include <linux/file.h>
#include <linux/fs.h>
+#include <linux/fsnotify.h>
#include <linux/backing-dev.h>
#include <linux/init.h>
#include <linux/ioctl.h>
@@ -223,7 +224,7 @@ static int spufs_dir_close(struct inode *inode, struct file *file)
parent = dir->d_parent->d_inode;
ctx = SPUFS_I(dir->d_inode)->i_ctx;
- mutex_lock(&parent->i_mutex);
+ mutex_lock_nested(&parent->i_mutex, I_MUTEX_PARENT);
ret = spufs_rmdir(parent, dir);
mutex_unlock(&parent->i_mutex);
WARN_ON(ret);
@@ -618,12 +619,15 @@ long spufs_create(struct nameidata *nd, unsigned int flags, mode_t mode,
mode &= ~current->fs->umask;
if (flags & SPU_CREATE_GANG)
- return spufs_create_gang(nd->path.dentry->d_inode,
+ ret = spufs_create_gang(nd->path.dentry->d_inode,
dentry, nd->path.mnt, mode);
else
- return spufs_create_context(nd->path.dentry->d_inode,
+ ret = spufs_create_context(nd->path.dentry->d_inode,
dentry, nd->path.mnt, flags, mode,
filp);
+ if (ret >= 0)
+ fsnotify_mkdir(nd->path.dentry->d_inode, dentry);
+ return ret;
out_dput:
dput(dentry);
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index a9c35b7b719f..b7493b865812 100644
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -11,7 +11,7 @@
#include "spufs.h"
/* interrupt-level stop callback function. */
-void spufs_stop_callback(struct spu *spu)
+void spufs_stop_callback(struct spu *spu, int irq)
{
struct spu_context *ctx = spu->ctx;
@@ -24,9 +24,19 @@ void spufs_stop_callback(struct spu *spu)
*/
if (ctx) {
/* Copy exception arguments into module specific structure */
- ctx->csa.class_0_pending = spu->class_0_pending;
- ctx->csa.dsisr = spu->dsisr;
- ctx->csa.dar = spu->dar;
+ switch(irq) {
+ case 0 :
+ ctx->csa.class_0_pending = spu->class_0_pending;
+ ctx->csa.class_0_dsisr = spu->class_0_dsisr;
+ ctx->csa.class_0_dar = spu->class_0_dar;
+ break;
+ case 1 :
+ ctx->csa.class_1_dsisr = spu->class_1_dsisr;
+ ctx->csa.class_1_dar = spu->class_1_dar;
+ break;
+ case 2 :
+ break;
+ }
/* ensure that the exception status has hit memory before a
* thread waiting on the context's stop queue is woken */
@@ -34,11 +44,6 @@ void spufs_stop_callback(struct spu *spu)
wake_up_all(&ctx->stop_wq);
}
-
- /* Clear callback arguments from spu structure */
- spu->class_0_pending = 0;
- spu->dsisr = 0;
- spu->dar = 0;
}
int spu_stopped(struct spu_context *ctx, u32 *stat)
@@ -56,7 +61,11 @@ int spu_stopped(struct spu_context *ctx, u32 *stat)
if (!(*stat & SPU_STATUS_RUNNING) && (*stat & stopped))
return 1;
- dsisr = ctx->csa.dsisr;
+ dsisr = ctx->csa.class_0_dsisr;
+ if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
+ return 1;
+
+ dsisr = ctx->csa.class_1_dsisr;
if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
return 1;
@@ -294,7 +303,7 @@ static int spu_process_callback(struct spu_context *ctx)
u32 ls_pointer, npc;
void __iomem *ls;
long spu_ret;
- int ret, ret2;
+ int ret;
/* get syscall block from local store */
npc = ctx->ops->npc_read(ctx) & ~3;
@@ -316,11 +325,9 @@ static int spu_process_callback(struct spu_context *ctx)
if (spu_ret <= -ERESTARTSYS) {
ret = spu_handle_restartsys(ctx, &spu_ret, &npc);
}
- ret2 = spu_acquire(ctx);
+ mutex_lock(&ctx->state_mutex);
if (ret == -ERESTARTSYS)
return ret;
- if (ret2)
- return -EINTR;
}
/* need to re-get the ls, as it may have changed when we released the
@@ -343,13 +350,14 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
if (mutex_lock_interruptible(&ctx->run_mutex))
return -ERESTARTSYS;
- spu_enable_spu(ctx);
ctx->event_return = 0;
ret = spu_acquire(ctx);
if (ret)
goto out_unlock;
+ spu_enable_spu(ctx);
+
spu_update_sched_info(ctx);
ret = spu_run_init(ctx, npc);
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 7298e7db2c83..2e411f23462b 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -140,6 +140,9 @@ void __spu_update_sched_info(struct spu_context *ctx)
* if it is timesliced or preempted.
*/
ctx->cpus_allowed = current->cpus_allowed;
+
+ /* Save the current cpu id for spu interrupt routing. */
+ ctx->last_ran = raw_smp_processor_id();
}
void spu_update_sched_info(struct spu_context *ctx)
@@ -243,7 +246,6 @@ static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
spu_switch_log_notify(spu, ctx, SWITCH_LOG_START, 0);
spu_restore(&ctx->csa, spu);
spu->timestamp = jiffies;
- spu_cpu_affinity_set(spu, raw_smp_processor_id());
spu_switch_notify(spu, ctx);
ctx->state = SPU_STATE_RUNNABLE;
@@ -657,7 +659,8 @@ static struct spu *find_victim(struct spu_context *ctx)
victim->stats.invol_ctx_switch++;
spu->stats.invol_ctx_switch++;
- spu_add_to_rq(victim);
+ if (test_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags))
+ spu_add_to_rq(victim);
mutex_unlock(&victim->state_mutex);
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 7312745b7540..454c277c1457 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -121,6 +121,7 @@ struct spu_context {
cpumask_t cpus_allowed;
int policy;
int prio;
+ int last_ran;
/* statistics */
struct {
@@ -331,7 +332,7 @@ size_t spu_ibox_read(struct spu_context *ctx, u32 *data);
/* irq callback funcs. */
void spufs_ibox_callback(struct spu *spu);
void spufs_wbox_callback(struct spu *spu);
-void spufs_stop_callback(struct spu *spu);
+void spufs_stop_callback(struct spu *spu, int irq);
void spufs_mfc_callback(struct spu *spu);
void spufs_dma_callback(struct spu *spu, int type);
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index d2a1249d36dd..3df9a36eb2f5 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -132,6 +132,14 @@ static inline void disable_interrupts(struct spu_state *csa, struct spu *spu)
spu_int_mask_set(spu, 2, 0ul);
eieio();
spin_unlock_irq(&spu->register_lock);
+
+ /*
+ * This flag needs to be set before calling synchronize_irq so
+ * that the update will be visible to the relevant handlers
+ * via a simple load.
+ */
+ set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
+ clear_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
synchronize_irq(spu->irqs[0]);
synchronize_irq(spu->irqs[1]);
synchronize_irq(spu->irqs[2]);
@@ -166,9 +174,8 @@ static inline void set_switch_pending(struct spu_state *csa, struct spu *spu)
/* Save, Step 7:
* Restore, Step 5:
* Set a software context switch pending flag.
+ * Done above in Step 3 - disable_interrupts().
*/
- set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
- mb();
}
static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
@@ -186,20 +193,21 @@ static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
MFC_CNTL_SUSPEND_COMPLETE);
/* fall through */
case MFC_CNTL_SUSPEND_COMPLETE:
- if (csa) {
+ if (csa)
csa->priv2.mfc_control_RW =
- MFC_CNTL_SUSPEND_MASK |
+ in_be64(&priv2->mfc_control_RW) |
MFC_CNTL_SUSPEND_DMA_QUEUE;
- }
break;
case MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION:
out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE);
POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
MFC_CNTL_SUSPEND_DMA_STATUS_MASK) ==
MFC_CNTL_SUSPEND_COMPLETE);
- if (csa) {
- csa->priv2.mfc_control_RW = 0;
- }
+ if (csa)
+ csa->priv2.mfc_control_RW =
+ in_be64(&priv2->mfc_control_RW) &
+ ~MFC_CNTL_SUSPEND_DMA_QUEUE &
+ ~MFC_CNTL_SUSPEND_MASK;
break;
}
}
@@ -249,16 +257,21 @@ static inline void save_spu_status(struct spu_state *csa, struct spu *spu)
}
}
-static inline void save_mfc_decr(struct spu_state *csa, struct spu *spu)
+static inline void save_mfc_stopped_status(struct spu_state *csa,
+ struct spu *spu)
{
struct spu_priv2 __iomem *priv2 = spu->priv2;
+ const u64 mask = MFC_CNTL_DECREMENTER_RUNNING |
+ MFC_CNTL_DMA_QUEUES_EMPTY;
/* Save, Step 12:
* Read MFC_CNTL[Ds]. Update saved copy of
* CSA.MFC_CNTL[Ds].
+ *
+ * update: do the same with MFC_CNTL[Q].
*/
- csa->priv2.mfc_control_RW |=
- in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DECREMENTER_RUNNING;
+ csa->priv2.mfc_control_RW &= ~mask;
+ csa->priv2.mfc_control_RW |= in_be64(&priv2->mfc_control_RW) & mask;
}
static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu)
@@ -462,7 +475,9 @@ static inline void purge_mfc_queue(struct spu_state *csa, struct spu *spu)
* Restore, Step 14.
* Write MFC_CNTL[Pc]=1 (purge queue).
*/
- out_be64(&priv2->mfc_control_RW, MFC_CNTL_PURGE_DMA_REQUEST);
+ out_be64(&priv2->mfc_control_RW,
+ MFC_CNTL_PURGE_DMA_REQUEST |
+ MFC_CNTL_SUSPEND_MASK);
eieio();
}
@@ -725,10 +740,14 @@ static inline void set_switch_active(struct spu_state *csa, struct spu *spu)
/* Save, Step 48:
* Restore, Step 23.
* Change the software context switch pending flag
- * to context switch active.
+ * to context switch active. This implementation does
+ * not uses a switch active flag.
*
- * This implementation does not uses a switch active flag.
+ * Now that we have saved the mfc in the csa, we can add in the
+ * restart command if an exception occurred.
*/
+ if (test_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags))
+ csa->priv2.mfc_control_RW |= MFC_CNTL_RESTART_DMA_COMMAND;
clear_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
mb();
}
@@ -1690,6 +1709,13 @@ static inline void restore_mfc_sr1(struct spu_state *csa, struct spu *spu)
eieio();
}
+static inline void set_int_route(struct spu_state *csa, struct spu *spu)
+{
+ struct spu_context *ctx = spu->ctx;
+
+ spu_cpu_affinity_set(spu, ctx->last_ran);
+}
+
static inline void restore_other_spu_access(struct spu_state *csa,
struct spu *spu)
{
@@ -1721,15 +1747,15 @@ static inline void restore_mfc_cntl(struct spu_state *csa, struct spu *spu)
*/
out_be64(&priv2->mfc_control_RW, csa->priv2.mfc_control_RW);
eieio();
+
/*
- * FIXME: this is to restart a DMA that we were processing
- * before the save. better remember the fault information
- * in the csa instead.
+ * The queue is put back into the same state that was evident prior to
+ * the context switch. The suspend flag is added to the saved state in
+ * the csa, if the operational state was suspending or suspended. In
+ * this case, the code that suspended the mfc is responsible for
+ * continuing it. Note that SPE faults do not change the operational
+ * state of the spu.
*/
- if ((csa->priv2.mfc_control_RW & MFC_CNTL_SUSPEND_DMA_QUEUE_MASK)) {
- out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
- eieio();
- }
}
static inline void enable_user_access(struct spu_state *csa, struct spu *spu)
@@ -1788,7 +1814,7 @@ static int quiece_spu(struct spu_state *prev, struct spu *spu)
save_spu_runcntl(prev, spu); /* Step 9. */
save_mfc_sr1(prev, spu); /* Step 10. */
save_spu_status(prev, spu); /* Step 11. */
- save_mfc_decr(prev, spu); /* Step 12. */
+ save_mfc_stopped_status(prev, spu); /* Step 12. */
halt_mfc_decr(prev, spu); /* Step 13. */
save_timebase(prev, spu); /* Step 14. */
remove_other_spu_access(prev, spu); /* Step 15. */
@@ -2000,6 +2026,7 @@ static void restore_csa(struct spu_state *next, struct spu *spu)
check_ppuint_mb_stat(next, spu); /* Step 67. */
spu_invalidate_slbs(spu); /* Modified Step 68. */
restore_mfc_sr1(next, spu); /* Step 69. */
+ set_int_route(next, spu); /* NEW */
restore_other_spu_access(next, spu); /* Step 70. */
restore_spu_runcntl(next, spu); /* Step 71. */
restore_mfc_cntl(next, spu); /* Step 72. */
diff --git a/arch/powerpc/platforms/chrp/pegasos_eth.c b/arch/powerpc/platforms/chrp/pegasos_eth.c
index 5bcc58d9a4dd..130ff72d99dd 100644
--- a/arch/powerpc/platforms/chrp/pegasos_eth.c
+++ b/arch/powerpc/platforms/chrp/pegasos_eth.c
@@ -58,7 +58,9 @@ static struct resource mv643xx_eth0_resources[] = {
static struct mv643xx_eth_platform_data eth0_pd = {
+ .shared = &mv643xx_eth_shared_device,
.port_number = 0,
+
.tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0,
.tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
.tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
@@ -88,7 +90,9 @@ static struct resource mv643xx_eth1_resources[] = {
};
static struct mv643xx_eth_platform_data eth1_pd = {
+ .shared = &mv643xx_eth_shared_device,
.port_number = 1,
+
.tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1,
.tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
.tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
diff --git a/arch/powerpc/platforms/pseries/scanlog.c b/arch/powerpc/platforms/pseries/scanlog.c
index bec3803f0618..417eca79df69 100644
--- a/arch/powerpc/platforms/pseries/scanlog.c
+++ b/arch/powerpc/platforms/pseries/scanlog.c
@@ -55,11 +55,6 @@ static ssize_t scanlog_read(struct file *file, char __user *buf,
dp = PDE(inode);
data = (unsigned int *)dp->data;
- if (!data) {
- printk(KERN_ERR "scanlog: read failed no data\n");
- return -EIO;
- }
-
if (count > RTAS_DATA_BUF_SIZE)
count = RTAS_DATA_BUF_SIZE;
@@ -146,11 +141,6 @@ static int scanlog_open(struct inode * inode, struct file * file)
struct proc_dir_entry *dp = PDE(inode);
unsigned int *data = (unsigned int *)dp->data;
- if (!data) {
- printk(KERN_ERR "scanlog: open failed no data\n");
- return -EIO;
- }
-
if (data[0] != 0) {
/* This imperfect test stops a second copy of the
* data (or a reset while data is being copied)
@@ -168,10 +158,6 @@ static int scanlog_release(struct inode * inode, struct file * file)
struct proc_dir_entry *dp = PDE(inode);
unsigned int *data = (unsigned int *)dp->data;
- if (!data) {
- printk(KERN_ERR "scanlog: release failed no data\n");
- return -EIO;
- }
data[0] = 0;
return 0;
@@ -200,12 +186,11 @@ static int __init scanlog_init(void)
if (!data)
goto err;
- ent = proc_create("ppc64/rtas/scan-log-dump", S_IRUSR, NULL,
- &scanlog_fops);
+ ent = proc_create_data("ppc64/rtas/scan-log-dump", S_IRUSR, NULL,
+ &scanlog_fops, data);
if (!ent)
goto err;
- ent->data = data;
proc_ppc64_scan_log_dump = ent;
return 0;
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c
index 41af1223e2a0..a132e0de8ca5 100644
--- a/arch/powerpc/sysdev/mv64x60_dev.c
+++ b/arch/powerpc/sysdev/mv64x60_dev.c
@@ -239,6 +239,8 @@ static int __init mv64x60_eth_device_setup(struct device_node *np, int id,
memset(&pdata, 0, sizeof(pdata));
+ pdata.shared = shared_pdev;
+
prop = of_get_property(np, "reg", NULL);
if (!prop)
return -ENODEV;
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 1814adbd2236..b4a54c52e880 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -1387,28 +1387,59 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
resource_size_t size = res->end - res->start + 1;
u64 sa;
- /* Calculate window size */
- sa = (0xffffffffffffffffull << ilog2(size));;
- if (res->flags & IORESOURCE_PREFETCH)
- sa |= 0x8;
+ if (port->endpoint) {
+ resource_size_t ep_addr = 0;
+ resource_size_t ep_size = 32 << 20;
+
+ /* Currently we map a fixed 64MByte window to PLB address
+ * 0 (SDRAM). This should probably be configurable via a dts
+ * property.
+ */
+
+ /* Calculate window size */
+ sa = (0xffffffffffffffffull << ilog2(ep_size));;
+
+ /* Setup BAR0 */
+ out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
+ out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) |
+ PCI_BASE_ADDRESS_MEM_TYPE_64);
- out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
- out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
+ /* Disable BAR1 & BAR2 */
+ out_le32(mbase + PECFG_BAR1MPA, 0);
+ out_le32(mbase + PECFG_BAR2HMPA, 0);
+ out_le32(mbase + PECFG_BAR2LMPA, 0);
- /* The setup of the split looks weird to me ... let's see if it works */
- out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
- out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
- out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
- out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
- out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
- out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
+ out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa));
+ out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa));
+
+ out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr));
+ out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr));
+ } else {
+ /* Calculate window size */
+ sa = (0xffffffffffffffffull << ilog2(size));;
+ if (res->flags & IORESOURCE_PREFETCH)
+ sa |= 0x8;
+
+ out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
+ out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
+
+ /* The setup of the split looks weird to me ... let's see
+ * if it works
+ */
+ out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
+ out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
+ out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
+ out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
+ out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
+ out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
+
+ out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
+ out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
+ }
/* Enable inbound mapping */
out_le32(mbase + PECFG_PIMEN, 0x1);
- out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
- out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
-
/* Enable I/O, Mem, and Busmaster cycles */
out_le16(mbase + PCI_COMMAND,
in_le16(mbase + PCI_COMMAND) |
@@ -1422,13 +1453,8 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
const int *bus_range;
int primary = 0, busses;
void __iomem *mbase = NULL, *cfg_data = NULL;
-
- /* XXX FIXME: Handle endpoint mode properly */
- if (port->endpoint) {
- printk(KERN_WARNING "PCIE%d: Port in endpoint mode !\n",
- port->index);
- return;
- }
+ const u32 *pval;
+ u32 val;
/* Check if primary bridge */
if (of_get_property(port->node, "primary", NULL))
@@ -1462,21 +1488,30 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
hose->last_busno = hose->first_busno + busses;
}
- /* We map the external config space in cfg_data and the host config
- * space in cfg_addr. External space is 1M per bus, internal space
- * is 4K
+ if (!port->endpoint) {
+ /* Only map the external config space in cfg_data for
+ * PCIe root-complexes. External space is 1M per bus
+ */
+ cfg_data = ioremap(port->cfg_space.start +
+ (hose->first_busno + 1) * 0x100000,
+ busses * 0x100000);
+ if (cfg_data == NULL) {
+ printk(KERN_ERR "%s: Can't map external config space !",
+ port->node->full_name);
+ goto fail;
+ }
+ hose->cfg_data = cfg_data;
+ }
+
+ /* Always map the host config space in cfg_addr.
+ * Internal space is 4K
*/
- cfg_data = ioremap(port->cfg_space.start +
- (hose->first_busno + 1) * 0x100000,
- busses * 0x100000);
mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
- if (cfg_data == NULL || mbase == NULL) {
- printk(KERN_ERR "%s: Can't map config space !",
+ if (mbase == NULL) {
+ printk(KERN_ERR "%s: Can't map internal config space !",
port->node->full_name);
goto fail;
}
-
- hose->cfg_data = cfg_data;
hose->cfg_addr = mbase;
pr_debug("PCIE %s, bus %d..%d\n", port->node->full_name,
@@ -1489,12 +1524,14 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
port->hose = hose;
mbase = (void __iomem *)hose->cfg_addr;
- /*
- * Set bus numbers on our root port
- */
- out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
- out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
- out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
+ if (!port->endpoint) {
+ /*
+ * Set bus numbers on our root port
+ */
+ out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
+ out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
+ out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
+ }
/*
* OMRs are already reset, also disable PIMs
@@ -1515,17 +1552,49 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window);
/* The root complex doesn't show up if we don't set some vendor
- * and device IDs into it. Those are the same bogus one that the
- * initial code in arch/ppc add. We might want to change that.
+ * and device IDs into it. The defaults below are the same bogus
+ * one that the initial code in arch/ppc had. This can be
+ * overwritten by setting the "vendor-id/device-id" properties
+ * in the pciex node.
*/
- out_le16(mbase + 0x200, 0xaaa0 + port->index);
- out_le16(mbase + 0x202, 0xbed0 + port->index);
- /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
- out_le32(mbase + 0x208, 0x06040001);
+ /* Get the (optional) vendor-/device-id from the device-tree */
+ pval = of_get_property(port->node, "vendor-id", NULL);
+ if (pval) {
+ val = *pval;
+ } else {
+ if (!port->endpoint)
+ val = 0xaaa0 + port->index;
+ else
+ val = 0xeee0 + port->index;
+ }
+ out_le16(mbase + 0x200, val);
+
+ pval = of_get_property(port->node, "device-id", NULL);
+ if (pval) {
+ val = *pval;
+ } else {
+ if (!port->endpoint)
+ val = 0xbed0 + port->index;
+ else
+ val = 0xfed0 + port->index;
+ }
+ out_le16(mbase + 0x202, val);
+
+ if (!port->endpoint) {
+ /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
+ out_le32(mbase + 0x208, 0x06040001);
+
+ printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
+ port->index);
+ } else {
+ /* Set Class Code to Processor/PPC */
+ out_le32(mbase + 0x208, 0x0b200001);
+
+ printk(KERN_INFO "PCIE%d: successfully set as endpoint\n",
+ port->index);
+ }
- printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
- port->index);
return;
fail:
if (hose)
@@ -1542,6 +1611,7 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
const u32 *pval;
int portno;
unsigned int dcrs;
+ const char *val;
/* First, proceed to core initialization as we assume there's
* only one PCIe core in the system
@@ -1573,8 +1643,20 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
}
port->sdr_base = *pval;
- /* XXX Currently, we only support root complex mode */
- port->endpoint = 0;
+ /* Check if device_type property is set to "pci" or "pci-endpoint".
+ * Resulting from this setup this PCIe port will be configured
+ * as root-complex or as endpoint.
+ */
+ val = of_get_property(port->node, "device_type", NULL);
+ if (!strcmp(val, "pci-endpoint")) {
+ port->endpoint = 1;
+ } else if (!strcmp(val, "pci")) {
+ port->endpoint = 0;
+ } else {
+ printk(KERN_ERR "PCIE: missing or incorrect device_type for %s\n",
+ np->full_name);
+ return;
+ }
/* Fetch config space registers address */
if (of_address_to_resource(np, 0, &port->cfg_space)) {
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 52c74780f403..1702de9395ee 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2842,9 +2842,11 @@ static void dump_spu_fields(struct spu *spu)
DUMP_FIELD(spu, "0x%lx", ls_size);
DUMP_FIELD(spu, "0x%x", node);
DUMP_FIELD(spu, "0x%lx", flags);
- DUMP_FIELD(spu, "0x%lx", dar);
- DUMP_FIELD(spu, "0x%lx", dsisr);
DUMP_FIELD(spu, "%d", class_0_pending);
+ DUMP_FIELD(spu, "0x%lx", class_0_dar);
+ DUMP_FIELD(spu, "0x%lx", class_0_dsisr);
+ DUMP_FIELD(spu, "0x%lx", class_1_dar);
+ DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
DUMP_FIELD(spu, "0x%lx", irqs[0]);
DUMP_FIELD(spu, "0x%lx", irqs[1]);
DUMP_FIELD(spu, "0x%lx", irqs[2]);
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index 8df7f0e4c3a6..2352d139b262 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -43,7 +43,7 @@ KBUILD_AFLAGS += $(cpu-as-y)
KBUILD_CFLAGS += $(cpu-as-y)
# Default to the common case.
-KBUILD_DEFCONFIG := common_defconfig
+KBUILD_DEFCONFIG := ebony_defconfig
head-y := arch/ppc/kernel/head.o
head-$(CONFIG_8xx) := arch/ppc/kernel/head_8xx.o
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 16ac11ca7ba0..602c268fc8a2 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -24,6 +24,7 @@
#include <asm/checksum.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
+#include <asm/cacheflush.h>
#include <linux/adb.h>
#include <linux/cuda.h>
#include <linux/pmu.h>
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index bfddfdee0b65..51e8094f52d6 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -36,6 +36,7 @@
#include <asm/nvram.h>
#include <asm/xmon.h>
#include <asm/ocp.h>
+#include <asm/irq.h>
#define USES_PPC_SYS (defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
defined(CONFIG_PPC_MPC52xx))
diff --git a/arch/ppc/platforms/residual.c b/arch/ppc/platforms/residual.c
index 18495e754e30..d687b0f8763b 100644
--- a/arch/ppc/platforms/residual.c
+++ b/arch/ppc/platforms/residual.c
@@ -38,6 +38,7 @@
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/pci.h>
+#include <linux/proc_fs.h>
#include <asm/sections.h>
#include <asm/mmu.h>
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
index 90fe904d3614..418f3053de52 100644
--- a/arch/ppc/syslib/mv64x60.c
+++ b/arch/ppc/syslib/mv64x60.c
@@ -341,6 +341,7 @@ static struct resource mv64x60_eth0_resources[] = {
};
static struct mv643xx_eth_platform_data eth0_pd = {
+ .shared = &mv64x60_eth_shared_device;
.port_number = 0,
};
@@ -366,6 +367,7 @@ static struct resource mv64x60_eth1_resources[] = {
};
static struct mv643xx_eth_platform_data eth1_pd = {
+ .shared = &mv64x60_eth_shared_device;
.port_number = 1,
};
@@ -391,6 +393,7 @@ static struct resource mv64x60_eth2_resources[] = {
};
static struct mv643xx_eth_platform_data eth2_pd = {
+ .shared = &mv64x60_eth_shared_device;
.port_number = 2,
};
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 29a7940f284f..1d035082e78e 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -430,6 +430,13 @@ config CMM_IUCV
Select this option to enable the special message interface to
the cooperative memory management.
+config PAGE_STATES
+ bool "Unused page notification"
+ help
+ This enables the notification of unused pages to the
+ hypervisor. The ESSA instruction is used to do the states
+ changes between a page that has content and the unused state.
+
config VIRT_TIMER
bool "Virtual CPU timer support"
help
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 743d54f0b8db..d003a6e16afb 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -121,7 +121,7 @@ sys32_ptrace_wrapper:
lgfr %r3,%r3 # long
llgtr %r4,%r4 # long
llgfr %r5,%r5 # long
- jg sys_ptrace # branch to system call
+ jg compat_sys_ptrace # branch to system call
.globl sys32_alarm_wrapper
sys32_alarm_wrapper:
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index bdbb3bcd78a5..708cf9cf9a35 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -279,8 +279,6 @@ sysc_do_restart:
st %r2,SP_R2(%r15) # store return value (change R2 on stack)
sysc_return:
- tm SP_PSW+1(%r15),0x01 # returning to user ?
- bno BASED(sysc_restore)
tm __TI_flags+3(%r9),_TIF_WORK_SVC
bnz BASED(sysc_work) # there is work to do (signals etc.)
sysc_restore:
@@ -312,6 +310,8 @@ sysc_work_loop:
# One of the work bits is on. Find out which one.
#
sysc_work:
+ tm SP_PSW+1(%r15),0x01 # returning to user ?
+ bno BASED(sysc_restore)
tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
bo BASED(sysc_mcck_pending)
tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
@@ -602,12 +602,6 @@ io_no_vtime:
la %r2,SP_PTREGS(%r15) # address of register-save area
basr %r14,%r1 # branch to standard irq handler
io_return:
- tm SP_PSW+1(%r15),0x01 # returning to user ?
-#ifdef CONFIG_PREEMPT
- bno BASED(io_preempt) # no -> check for preemptive scheduling
-#else
- bno BASED(io_restore) # no-> skip resched & signal
-#endif
tm __TI_flags+3(%r9),_TIF_WORK_INT
bnz BASED(io_work) # there is work to do (signals etc.)
io_restore:
@@ -629,10 +623,18 @@ io_restore_trace_psw:
.long 0, io_restore_trace + 0x80000000
#endif
-#ifdef CONFIG_PREEMPT
-io_preempt:
+#
+# switch to kernel stack, then check the TIF bits
+#
+io_work:
+ tm SP_PSW+1(%r15),0x01 # returning to user ?
+#ifndef CONFIG_PREEMPT
+ bno BASED(io_restore) # no-> skip resched & signal
+#else
+ bnz BASED(io_work_user) # no -> check for preemptive scheduling
+ # check for preemptive scheduling
icm %r0,15,__TI_precount(%r9)
- bnz BASED(io_restore)
+ bnz BASED(io_restore) # preemption disabled
l %r1,SP_R15(%r15)
s %r1,BASED(.Lc_spsize)
mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
@@ -646,10 +648,7 @@ io_resume_loop:
br %r1 # call schedule
#endif
-#
-# switch to kernel stack, then check the TIF bits
-#
-io_work:
+io_work_user:
l %r1,__LC_KERNEL_STACK
s %r1,BASED(.Lc_spsize)
mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 5a4a7bcd2bba..fee10177dbfc 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -271,8 +271,6 @@ sysc_noemu:
stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
sysc_return:
- tm SP_PSW+1(%r15),0x01 # returning to user ?
- jno sysc_restore
tm __TI_flags+7(%r9),_TIF_WORK_SVC
jnz sysc_work # there is work to do (signals etc.)
sysc_restore:
@@ -304,6 +302,8 @@ sysc_work_loop:
# One of the work bits is on. Find out which one.
#
sysc_work:
+ tm SP_PSW+1(%r15),0x01 # returning to user ?
+ jno sysc_restore
tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
jo sysc_mcck_pending
tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
@@ -585,12 +585,6 @@ io_no_vtime:
la %r2,SP_PTREGS(%r15) # address of register-save area
brasl %r14,do_IRQ # call standard irq handler
io_return:
- tm SP_PSW+1(%r15),0x01 # returning to user ?
-#ifdef CONFIG_PREEMPT
- jno io_preempt # no -> check for preemptive scheduling
-#else
- jno io_restore # no-> skip resched & signal
-#endif
tm __TI_flags+7(%r9),_TIF_WORK_INT
jnz io_work # there is work to do (signals etc.)
io_restore:
@@ -612,10 +606,41 @@ io_restore_trace_psw:
.quad 0, io_restore_trace
#endif
-#ifdef CONFIG_PREEMPT
-io_preempt:
+#
+# There is work todo, we need to check if we return to userspace, then
+# check, if we are in SIE, if yes leave it
+#
+io_work:
+ tm SP_PSW+1(%r15),0x01 # returning to user ?
+#ifndef CONFIG_PREEMPT
+#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
+ jnz io_work_user # yes -> no need to check for SIE
+ la %r1, BASED(sie_opcode) # we return to kernel here
+ lg %r2, SP_PSW+8(%r15)
+ clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
+ jne io_restore # no-> return to kernel
+ lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
+ aghi %r1, 4
+ stg %r1, SP_PSW+8(%r15)
+ j io_restore # return to kernel
+#else
+ jno io_restore # no-> skip resched & signal
+#endif
+#else
+ jnz io_work_user # yes -> do resched & signal
+#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
+ la %r1, BASED(sie_opcode)
+ lg %r2, SP_PSW+8(%r15)
+ clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
+ jne 0f # no -> leave PSW alone
+ lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
+ aghi %r1, 4
+ stg %r1, SP_PSW+8(%r15)
+0:
+#endif
+ # check for preemptive scheduling
icm %r0,15,__TI_precount(%r9)
- jnz io_restore
+ jnz io_restore # preemption is disabled
# switch to kernel stack
lg %r1,SP_R15(%r15)
aghi %r1,-SP_SIZE
@@ -629,10 +654,7 @@ io_resume_loop:
jg preempt_schedule_irq
#endif
-#
-# switch to kernel stack, then check TIF bits
-#
-io_work:
+io_work_user:
lg %r1,__LC_KERNEL_STACK
aghi %r1,-SP_SIZE
mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
@@ -653,6 +675,11 @@ io_work_loop:
j io_restore
io_work_done:
+#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
+sie_opcode:
+ .long 0xb2140000
+#endif
+
#
# _TIF_MCCK_PENDING is set, call handler
#
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 7f4270163744..35827b9bd4d1 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -292,8 +292,7 @@ poke_user(struct task_struct *child, addr_t addr, addr_t data)
return 0;
}
-static int
-do_ptrace_normal(struct task_struct *child, long request, long addr, long data)
+long arch_ptrace(struct task_struct *child, long request, long addr, long data)
{
ptrace_area parea;
int copied, ret;
@@ -529,35 +528,19 @@ poke_user_emu31(struct task_struct *child, addr_t addr, addr_t data)
return 0;
}
-static int
-do_ptrace_emu31(struct task_struct *child, long request, long addr, long data)
+long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
+ compat_ulong_t caddr, compat_ulong_t cdata)
{
- unsigned int tmp; /* 4 bytes !! */
+ unsigned long addr = caddr;
+ unsigned long data = cdata;
ptrace_area_emu31 parea;
int copied, ret;
switch (request) {
- case PTRACE_PEEKTEXT:
- case PTRACE_PEEKDATA:
- /* read word at location addr. */
- copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
- if (copied != sizeof(tmp))
- return -EIO;
- return put_user(tmp, (unsigned int __force __user *) data);
-
case PTRACE_PEEKUSR:
/* read the word at location addr in the USER area. */
return peek_user_emu31(child, addr, data);
- case PTRACE_POKETEXT:
- case PTRACE_POKEDATA:
- /* write the word at location addr. */
- tmp = data;
- copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 1);
- if (copied != sizeof(tmp))
- return -EIO;
- return 0;
-
case PTRACE_POKEUSR:
/* write the word at location addr in the USER area */
return poke_user_emu31(child, addr, data);
@@ -587,82 +570,11 @@ do_ptrace_emu31(struct task_struct *child, long request, long addr, long data)
copied += sizeof(unsigned int);
}
return 0;
- case PTRACE_GETEVENTMSG:
- return put_user((__u32) child->ptrace_message,
- (unsigned int __force __user *) data);
- case PTRACE_GETSIGINFO:
- if (child->last_siginfo == NULL)
- return -EINVAL;
- return copy_siginfo_to_user32((compat_siginfo_t
- __force __user *) data,
- child->last_siginfo);
- case PTRACE_SETSIGINFO:
- if (child->last_siginfo == NULL)
- return -EINVAL;
- return copy_siginfo_from_user32(child->last_siginfo,
- (compat_siginfo_t
- __force __user *) data);
}
- return ptrace_request(child, request, addr, data);
+ return compat_ptrace_request(child, request, addr, data);
}
#endif
-long arch_ptrace(struct task_struct *child, long request, long addr, long data)
-{
- switch (request) {
- case PTRACE_SYSCALL:
- /* continue and stop at next (return from) syscall */
- case PTRACE_CONT:
- /* restart after signal. */
- if (!valid_signal(data))
- return -EIO;
- if (request == PTRACE_SYSCALL)
- set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
- else
- clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
- child->exit_code = data;
- /* make sure the single step bit is not set. */
- user_disable_single_step(child);
- wake_up_process(child);
- return 0;
-
- case PTRACE_KILL:
- /*
- * make the child exit. Best I can do is send it a sigkill.
- * perhaps it should be put in the status that it wants to
- * exit.
- */
- if (child->exit_state == EXIT_ZOMBIE) /* already dead */
- return 0;
- child->exit_code = SIGKILL;
- /* make sure the single step bit is not set. */
- user_disable_single_step(child);
- wake_up_process(child);
- return 0;
-
- case PTRACE_SINGLESTEP:
- /* set the trap flag. */
- if (!valid_signal(data))
- return -EIO;
- clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
- child->exit_code = data;
- user_enable_single_step(child);
- /* give it a chance to run. */
- wake_up_process(child);
- return 0;
-
- /* Do requests that differ for 31/64 bit */
- default:
-#ifdef CONFIG_COMPAT
- if (test_thread_flag(TIF_31BIT))
- return do_ptrace_emu31(child, request, addr, data);
-#endif
- return do_ptrace_normal(child, request, addr, data);
- }
- /* Not reached. */
- return -EIO;
-}
-
asmlinkage void
syscall_trace(struct pt_regs *regs, int entryexit)
{
diff --git a/arch/s390/kvm/Kconfig b/arch/s390/kvm/Kconfig
index 1761b74d639b..e051cad1f1e0 100644
--- a/arch/s390/kvm/Kconfig
+++ b/arch/s390/kvm/Kconfig
@@ -22,7 +22,6 @@ config KVM
select PREEMPT_NOTIFIERS
select ANON_INODES
select S390_SWITCH_AMODE
- select PREEMPT
---help---
Support hosting paravirtualized guest machines using the SIE
virtualization capability on the mainframe. This should work
diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c
index 349581a26103..47a0b642174c 100644
--- a/arch/s390/kvm/intercept.c
+++ b/arch/s390/kvm/intercept.c
@@ -105,6 +105,9 @@ static intercept_handler_t instruction_handlers[256] = {
static int handle_noop(struct kvm_vcpu *vcpu)
{
switch (vcpu->arch.sie_block->icptcode) {
+ case 0x0:
+ vcpu->stat.exit_null++;
+ break;
case 0x10:
vcpu->stat.exit_external_request++;
break;
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 98d1e73e01f1..0ac36a649eba 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -31,6 +31,7 @@
struct kvm_stats_debugfs_item debugfs_entries[] = {
{ "userspace_handled", VCPU_STAT(exit_userspace) },
+ { "exit_null", VCPU_STAT(exit_null) },
{ "exit_validity", VCPU_STAT(exit_validity) },
{ "exit_stop_request", VCPU_STAT(exit_stop_request) },
{ "exit_external_request", VCPU_STAT(exit_external_request) },
@@ -221,10 +222,6 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
vcpu->arch.guest_fpregs.fpc &= FPC_VALID_MASK;
restore_fp_regs(&vcpu->arch.guest_fpregs);
restore_access_regs(vcpu->arch.guest_acrs);
-
- if (signal_pending(current))
- atomic_set_mask(CPUSTAT_STOP_INT,
- &vcpu->arch.sie_block->cpuflags);
}
void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
diff --git a/arch/s390/mm/Makefile b/arch/s390/mm/Makefile
index fb988a48a754..2a7458134544 100644
--- a/arch/s390/mm/Makefile
+++ b/arch/s390/mm/Makefile
@@ -5,3 +5,4 @@
obj-y := init.o fault.o extmem.o mmap.o vmem.o pgtable.o
obj-$(CONFIG_CMM) += cmm.o
obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
+obj-$(CONFIG_PAGE_STATES) += page-states.o
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index fa31de6ae97a..29f3a63806b9 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -126,6 +126,9 @@ void __init mem_init(void)
/* clear the zero-page */
memset(empty_zero_page, 0, PAGE_SIZE);
+ /* Setup guest page hinting */
+ cmma_init();
+
/* this will put all low memory onto the freelists */
totalram_pages += free_all_bootmem();
diff --git a/arch/s390/mm/page-states.c b/arch/s390/mm/page-states.c
new file mode 100644
index 000000000000..fc0ad73ffd90
--- /dev/null
+++ b/arch/s390/mm/page-states.c
@@ -0,0 +1,79 @@
+/*
+ * arch/s390/mm/page-states.c
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Guest page hinting for unused pages.
+ *
+ * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+
+#define ESSA_SET_STABLE 1
+#define ESSA_SET_UNUSED 2
+
+static int cmma_flag;
+
+static int __init cmma(char *str)
+{
+ char *parm;
+ parm = strstrip(str);
+ if (strcmp(parm, "yes") == 0 || strcmp(parm, "on") == 0) {
+ cmma_flag = 1;
+ return 1;
+ }
+ cmma_flag = 0;
+ if (strcmp(parm, "no") == 0 || strcmp(parm, "off") == 0)
+ return 1;
+ return 0;
+}
+
+__setup("cmma=", cmma);
+
+void __init cmma_init(void)
+{
+ register unsigned long tmp asm("0") = 0;
+ register int rc asm("1") = -EOPNOTSUPP;
+
+ if (!cmma_flag)
+ return;
+ asm volatile(
+ " .insn rrf,0xb9ab0000,%1,%1,0,0\n"
+ "0: la %0,0\n"
+ "1:\n"
+ EX_TABLE(0b,1b)
+ : "+&d" (rc), "+&d" (tmp));
+ if (rc)
+ cmma_flag = 0;
+}
+
+void arch_free_page(struct page *page, int order)
+{
+ int i, rc;
+
+ if (!cmma_flag)
+ return;
+ for (i = 0; i < (1 << order); i++)
+ asm volatile(".insn rrf,0xb9ab0000,%0,%1,%2,0"
+ : "=&d" (rc)
+ : "a" ((page_to_pfn(page) + i) << PAGE_SHIFT),
+ "i" (ESSA_SET_UNUSED));
+}
+
+void arch_alloc_page(struct page *page, int order)
+{
+ int i, rc;
+
+ if (!cmma_flag)
+ return;
+ for (i = 0; i < (1 << order); i++)
+ asm volatile(".insn rrf,0xb9ab0000,%0,%1,%2,0"
+ : "=&d" (rc)
+ : "a" ((page_to_pfn(page) + i) << PAGE_SHIFT),
+ "i" (ESSA_SET_STABLE));
+}
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 6a679c3e15e8..8a68160079a9 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -448,14 +448,6 @@ config SH_DREAMCAST
Select Dreamcast if configuring for a SEGA Dreamcast.
More information at <http://www.linux-sh.org>
-config SH_MPC1211
- bool "Interface MPC1211"
- depends on CPU_SUBTYPE_SH7751 && BROKEN
- help
- CTP/PCI-SH02 is a CPU module computer that is produced
- by Interface Corporation.
- More information at <http://www.interface.co.jp>
-
config SH_SH03
bool "Interface CTP/PCI-SH03"
depends on CPU_SUBTYPE_SH7751
@@ -657,8 +649,7 @@ source "arch/sh/drivers/Kconfig"
endmenu
config ISA_DMA_API
- def_bool y
- depends on SH_MPC1211
+ bool
menu "Kernel features"
@@ -666,7 +657,7 @@ source kernel/Kconfig.hz
config KEXEC
bool "kexec system call (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ depends on SUPERH32 && EXPERIMENTAL
help
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot
@@ -683,7 +674,7 @@ config KEXEC
config CRASH_DUMP
bool "kernel crash dumps (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ depends on SUPERH32 && EXPERIMENTAL
help
Generate crash dump after being started by kexec.
This should be normally only set in special crash dump kernels
@@ -763,7 +754,7 @@ menu "Boot options"
config ZERO_PAGE_OFFSET
hex "Zero page offset"
- default "0x00004000" if SH_MPC1211 || SH_SH03
+ default "0x00004000" if SH_SH03
default "0x00010000" if PAGE_SIZE_64KB
default "0x00002000" if PAGE_SIZE_8KB
default "0x00001000"
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index d9d28f9dd0db..0d2ef1e9a6fd 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -7,6 +7,7 @@ source "lib/Kconfig.debug"
config SH_STANDARD_BIOS
bool "Use LinuxSH standard BIOS"
+ depends on SUPERH32
help
Say Y here if your target has the gdb-sh-stub
package from www.m17n.org (or any conforming standard LinuxSH BIOS)
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index bb06f83e6239..8050b03d51fc 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -110,7 +110,6 @@ machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343
machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721
machdir-$(CONFIG_SH_HP6XX) += hp6xx
machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
-machdir-$(CONFIG_SH_MPC1211) += mpc1211
machdir-$(CONFIG_SH_SH03) += sh03
machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear
machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d
diff --git a/arch/sh/boards/mpc1211/Makefile b/arch/sh/boards/mpc1211/Makefile
deleted file mode 100644
index 8cd31b5d200b..000000000000
--- a/arch/sh/boards/mpc1211/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for the Interface (CTP/PCI/MPC-SH02) specific parts of the kernel
-#
-
-obj-y := setup.o rtc.o
-
-obj-$(CONFIG_PCI) += pci.o
-
diff --git a/arch/sh/boards/mpc1211/pci.c b/arch/sh/boards/mpc1211/pci.c
deleted file mode 100644
index 23849f70f133..000000000000
--- a/arch/sh/boards/mpc1211/pci.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/*
- * Low-Level PCI Support for the MPC-1211(CTP/PCI/MPC-SH02)
- *
- * (c) 2002-2003 Saito.K & Jeanne
- *
- * Dustin McIntire (dustin@sensoria.com)
- * Derived from arch/i386/kernel/pci-*.c which bore the message:
- * (c) 1999--2000 Martin Mares <mj@ucw.cz>
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- */
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/errno.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-
-#include <asm/machvec.h>
-#include <asm/io.h>
-#include <asm/mpc1211/pci.h>
-
-static struct resource mpcpci_io_resource = {
- "MPCPCI IO",
- 0x00000000,
- 0xffffffff,
- IORESOURCE_IO
-};
-
-static struct resource mpcpci_mem_resource = {
- "MPCPCI mem",
- 0x00000000,
- 0xffffffff,
- IORESOURCE_MEM
-};
-
-static struct pci_ops pci_direct_conf1;
-struct pci_channel board_pci_channels[] = {
- {&pci_direct_conf1, &mpcpci_io_resource, &mpcpci_mem_resource, 0, 256},
- {NULL, NULL, NULL, 0, 0},
-};
-
-/*
- * Direct access to PCI hardware...
- */
-
-
-#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
-
-/*
- * Functions for accessing PCI configuration space with type 1 accesses
- */
-static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
-{
- u32 word;
- unsigned long flags;
-
- /*
- * PCIPDR may only be accessed as 32 bit words,
- * so we must do byte alignment by hand
- */
- local_irq_save(flags);
- writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
- word = readl(PCIPDR);
- local_irq_restore(flags);
-
- switch (size) {
- case 1:
- switch (where & 0x3) {
- case 3:
- *value = (u8)(word >> 24);
- break;
- case 2:
- *value = (u8)(word >> 16);
- break;
- case 1:
- *value = (u8)(word >> 8);
- break;
- default:
- *value = (u8)word;
- break;
- }
- break;
- case 2:
- switch (where & 0x3) {
- case 3:
- *value = (u16)(word >> 24);
- local_irq_save(flags);
- writel(CONFIG_CMD(bus,devfn,(where+1)), PCIPAR);
- word = readl(PCIPDR);
- local_irq_restore(flags);
- *value |= ((word & 0xff) << 8);
- break;
- case 2:
- *value = (u16)(word >> 16);
- break;
- case 1:
- *value = (u16)(word >> 8);
- break;
- default:
- *value = (u16)word;
- break;
- }
- break;
- case 4:
- *value = word;
- break;
- }
- PCIDBG(4,"pci_conf1_read@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),*value);
- return PCIBIOS_SUCCESSFUL;
-}
-
-/*
- * Since MPC-1211 only does 32bit access we'll have to do a read,mask,write operation.
- * We'll allow an odd byte offset, though it should be illegal.
- */
-static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
-{
- u32 word,mask = 0;
- unsigned long flags;
- u32 shift = (where & 3) * 8;
-
- if(size == 1) {
- mask = ((1 << 8) - 1) << shift; // create the byte mask
- } else if(size == 2){
- if(shift == 24)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mask = ((1 << 16) - 1) << shift; // create the word mask
- }
- local_irq_save(flags);
- writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
- if(size == 4){
- writel(value, PCIPDR);
- local_irq_restore(flags);
- PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),value);
- return PCIBIOS_SUCCESSFUL;
- }
- word = readl(PCIPDR);
- word &= ~mask;
- word |= ((value << shift) & mask);
- writel(word, PCIPDR);
- local_irq_restore(flags);
- PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),word);
- return PCIBIOS_SUCCESSFUL;
-}
-
-#undef CONFIG_CMD
-
-static struct pci_ops pci_direct_conf1 = {
- .read = pci_conf1_read,
- .write = pci_conf1_write,
-};
-
-static void __devinit quirk_ali_ide_ports(struct pci_dev *dev)
-{
- dev->resource[0].start = 0x1f0;
- dev->resource[0].end = 0x1f7;
- dev->resource[0].flags = IORESOURCE_IO;
- dev->resource[1].start = 0x3f6;
- dev->resource[1].end = 0x3f6;
- dev->resource[1].flags = IORESOURCE_IO;
- dev->resource[2].start = 0x170;
- dev->resource[2].end = 0x177;
- dev->resource[2].flags = IORESOURCE_IO;
- dev->resource[3].start = 0x376;
- dev->resource[3].end = 0x376;
- dev->resource[3].flags = IORESOURCE_IO;
- dev->resource[4].start = 0xf000;
- dev->resource[4].end = 0xf00f;
- dev->resource[4].flags = IORESOURCE_IO;
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports);
-
-char * __devinit pcibios_setup(char *str)
-{
- return str;
-}
-
-/*
- * Called after each bus is probed, but before its children
- * are examined.
- */
-
-void __devinit pcibios_fixup_bus(struct pci_bus *b)
-{
- pci_read_bridge_bases(b);
-}
-
-/*
- * IRQ functions
- */
-static inline u8 bridge_swizzle(u8 pin, u8 slot)
-{
- return (((pin-1) + slot) % 4) + 1;
-}
-
-static inline u8 bridge_swizzle_pci_1(u8 pin, u8 slot)
-{
- return (((pin-1) - slot) & 3) + 1;
-}
-
-static u8 __init mpc1211_swizzle(struct pci_dev *dev, u8 *pinp)
-{
- unsigned long flags;
- u8 pin = *pinp;
- u32 word;
-
- for ( ; dev->bus->self; dev = dev->bus->self) {
- if (!pin)
- continue;
-
- if (dev->bus->number == 1) {
- local_irq_save(flags);
- writel(0x80000000 | 0x2c, PCIPAR);
- word = readl(PCIPDR);
- local_irq_restore(flags);
- word >>= 16;
-
- if (word == 0x0001)
- pin = bridge_swizzle_pci_1(pin, PCI_SLOT(dev->devfn));
- else
- pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
- } else
- pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
- }
-
- *pinp = pin;
-
- return PCI_SLOT(dev->devfn);
-}
-
-static int __init map_mpc1211_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- int irq = -1;
-
- /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */
- if (dev->bus->number == 0) {
- switch (slot) {
- case 13: irq = 9; break; /* USB */
- case 22: irq = 10; break; /* LAN */
- default: irq = 0; break;
- }
- } else {
- switch (pin) {
- case 0: irq = 0; break;
- case 1: irq = 7; break;
- case 2: irq = 9; break;
- case 3: irq = 10; break;
- case 4: irq = 11; break;
- }
- }
-
- if( irq < 0 ) {
- PCIDBG(3, "PCI: Error mapping IRQ on device %s\n", pci_name(dev));
- return irq;
- }
-
- PCIDBG(2, "Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
-
- return irq;
-}
-
-void __init pcibios_fixup_irqs(void)
-{
- pci_fixup_irqs(mpc1211_swizzle, map_mpc1211_irq);
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- resource_size_t size, resource_size_t align)
-{
- resource_size_t start = res->start;
-
- if (res->flags & IORESOURCE_IO) {
- if (start >= 0x10000UL) {
- if ((start & 0xffffUL) < 0x4000UL) {
- start = (start & 0xffff0000UL) + 0x4000UL;
- } else if ((start & 0xffffUL) >= 0xf000UL) {
- start = (start & 0xffff0000UL) + 0x10000UL;
- }
- res->start = start;
- } else {
- if (start & 0x300) {
- start = (start + 0x3ff) & ~0x3ff;
- res->start = start;
- }
- }
- }
-}
-
diff --git a/arch/sh/boards/mpc1211/rtc.c b/arch/sh/boards/mpc1211/rtc.c
deleted file mode 100644
index 03b123a4bba4..000000000000
--- a/arch/sh/boards/mpc1211/rtc.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * linux/arch/sh/kernel/rtc-mpc1211.c -- MPC-1211 on-chip RTC support
- *
- * Copyright (C) 2002 Saito.K & Jeanne
- *
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/time.h>
-#include <linux/bcd.h>
-#include <linux/mc146818rtc.h>
-
-unsigned long get_cmos_time(void)
-{
- unsigned int year, mon, day, hour, min, sec;
-
- spin_lock(&rtc_lock);
-
- do {
- sec = CMOS_READ(RTC_SECONDS);
- min = CMOS_READ(RTC_MINUTES);
- hour = CMOS_READ(RTC_HOURS);
- day = CMOS_READ(RTC_DAY_OF_MONTH);
- mon = CMOS_READ(RTC_MONTH);
- year = CMOS_READ(RTC_YEAR);
- } while (sec != CMOS_READ(RTC_SECONDS));
-
- if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
- BCD_TO_BIN(sec);
- BCD_TO_BIN(min);
- BCD_TO_BIN(hour);
- BCD_TO_BIN(day);
- BCD_TO_BIN(mon);
- BCD_TO_BIN(year);
- }
-
- spin_unlock(&rtc_lock);
-
- year += 1900;
- if (year < 1970)
- year += 100;
-
- return mktime(year, mon, day, hour, min, sec);
-}
-
-void mpc1211_rtc_gettimeofday(struct timeval *tv)
-{
-
- tv->tv_sec = get_cmos_time();
- tv->tv_usec = 0;
-}
-
-/* arc/i386/kernel/time.c */
-/*
- * In order to set the CMOS clock precisely, set_rtc_mmss has to be
- * called 500 ms after the second nowtime has started, because when
- * nowtime is written into the registers of the CMOS clock, it will
- * jump to the next second precisely 500 ms later. Check the Motorola
- * MC146818A or Dallas DS12887 data sheet for details.
- *
- * BUG: This routine does not handle hour overflow properly; it just
- * sets the minutes. Usually you'll only notice that after reboot!
- */
-static int set_rtc_mmss(unsigned long nowtime)
-{
- int retval = 0;
- int real_seconds, real_minutes, cmos_minutes;
- unsigned char save_control, save_freq_select;
-
- /* gets recalled with irq locally disabled */
- spin_lock(&rtc_lock);
- save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
- CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
-
- save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
- CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
-
- cmos_minutes = CMOS_READ(RTC_MINUTES);
- if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
- BCD_TO_BIN(cmos_minutes);
-
- /*
- * since we're only adjusting minutes and seconds,
- * don't interfere with hour overflow. This avoids
- * messing with unknown time zones but requires your
- * RTC not to be off by more than 15 minutes
- */
- real_seconds = nowtime % 60;
- real_minutes = nowtime / 60;
- if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
- real_minutes += 30; /* correct for half hour time zone */
- real_minutes %= 60;
-
- if (abs(real_minutes - cmos_minutes) < 30) {
- if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
- BIN_TO_BCD(real_seconds);
- BIN_TO_BCD(real_minutes);
- }
- CMOS_WRITE(real_seconds,RTC_SECONDS);
- CMOS_WRITE(real_minutes,RTC_MINUTES);
- } else {
- printk(KERN_WARNING
- "set_rtc_mmss: can't update from %d to %d\n",
- cmos_minutes, real_minutes);
- retval = -1;
- }
-
- /* The following flags have to be released exactly in this order,
- * otherwise the DS12887 (popular MC146818A clone with integrated
- * battery and quartz) will not reset the oscillator and will not
- * update precisely 500 ms later. You won't find this mentioned in
- * the Dallas Semiconductor data sheets, but who believes data
- * sheets anyway ... -- Markus Kuhn
- */
- CMOS_WRITE(save_control, RTC_CONTROL);
- CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
- spin_unlock(&rtc_lock);
-
- return retval;
-}
-
-int mpc1211_rtc_settimeofday(const struct timeval *tv)
-{
- unsigned long nowtime = tv->tv_sec;
-
- return set_rtc_mmss(nowtime);
-}
-
-void mpc1211_time_init(void)
-{
- rtc_sh_get_time = mpc1211_rtc_gettimeofday;
- rtc_sh_set_time = mpc1211_rtc_settimeofday;
-}
-
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
deleted file mode 100644
index fede36361dc7..000000000000
--- a/arch/sh/boards/mpc1211/setup.c
+++ /dev/null
@@ -1,347 +0,0 @@
-/*
- * linux/arch/sh/boards/mpc1211/setup.c
- *
- * Copyright (C) 2002 Saito.K & Jeanne, Fujii.Y
- *
- */
-
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/hdreg.h>
-#include <linux/ide.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <asm/io.h>
-#include <asm/machvec.h>
-#include <asm/mpc1211/mpc1211.h>
-#include <asm/mpc1211/pci.h>
-#include <asm/mpc1211/m1543c.h>
-
-/* ALI15X3 SMBus address offsets */
-#define SMBHSTSTS (0 + 0x3100)
-#define SMBHSTCNT (1 + 0x3100)
-#define SMBHSTSTART (2 + 0x3100)
-#define SMBHSTCMD (7 + 0x3100)
-#define SMBHSTADD (3 + 0x3100)
-#define SMBHSTDAT0 (4 + 0x3100)
-#define SMBHSTDAT1 (5 + 0x3100)
-#define SMBBLKDAT (6 + 0x3100)
-
-/* Other settings */
-#define MAX_TIMEOUT 500 /* times 1/100 sec */
-
-/* ALI15X3 command constants */
-#define ALI15X3_ABORT 0x04
-#define ALI15X3_T_OUT 0x08
-#define ALI15X3_QUICK 0x00
-#define ALI15X3_BYTE 0x10
-#define ALI15X3_BYTE_DATA 0x20
-#define ALI15X3_WORD_DATA 0x30
-#define ALI15X3_BLOCK_DATA 0x40
-#define ALI15X3_BLOCK_CLR 0x80
-
-/* ALI15X3 status register bits */
-#define ALI15X3_STS_IDLE 0x04
-#define ALI15X3_STS_BUSY 0x08
-#define ALI15X3_STS_DONE 0x10
-#define ALI15X3_STS_DEV 0x20 /* device error */
-#define ALI15X3_STS_COLL 0x40 /* collision or no response */
-#define ALI15X3_STS_TERM 0x80 /* terminated by abort */
-#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
-
-static void __init pci_write_config(unsigned long busNo,
- unsigned long devNo,
- unsigned long fncNo,
- unsigned long cnfAdd,
- unsigned long cnfData)
-{
- ctrl_outl((0x80000000
- + ((busNo & 0xff) << 16)
- + ((devNo & 0x1f) << 11)
- + ((fncNo & 0x07) << 8)
- + (cnfAdd & 0xfc)), PCIPAR);
-
- ctrl_outl(cnfData, PCIPDR);
-}
-
-/*
- Initialize IRQ setting
-*/
-
-static unsigned char m_irq_mask = 0xfb;
-static unsigned char s_irq_mask = 0xff;
-
-static void disable_mpc1211_irq(unsigned int irq)
-{
- if( irq < 8) {
- m_irq_mask |= (1 << irq);
- outb(m_irq_mask,I8259_M_MR);
- } else {
- s_irq_mask |= (1 << (irq - 8));
- outb(s_irq_mask,I8259_S_MR);
- }
-
-}
-
-static void enable_mpc1211_irq(unsigned int irq)
-{
- if( irq < 8) {
- m_irq_mask &= ~(1 << irq);
- outb(m_irq_mask,I8259_M_MR);
- } else {
- s_irq_mask &= ~(1 << (irq - 8));
- outb(s_irq_mask,I8259_S_MR);
- }
-}
-
-static inline int mpc1211_irq_real(unsigned int irq)
-{
- int value;
- int irqmask;
-
- if ( irq < 8) {
- irqmask = 1<<irq;
- outb(0x0b,I8259_M_CR); /* ISR register */
- value = inb(I8259_M_CR) & irqmask;
- outb(0x0a,I8259_M_CR); /* back ro the IPR reg */
- return value;
- }
- irqmask = 1<<(irq - 8);
- outb(0x0b,I8259_S_CR); /* ISR register */
- value = inb(I8259_S_CR) & irqmask;
- outb(0x0a,I8259_S_CR); /* back ro the IPR reg */
- return value;
-}
-
-static void mask_and_ack_mpc1211(unsigned int irq)
-{
- if(irq < 8) {
- if(m_irq_mask & (1<<irq)){
- if(!mpc1211_irq_real(irq)){
- atomic_inc(&irq_err_count)
- printk("spurious 8259A interrupt: IRQ %x\n",irq);
- }
- } else {
- m_irq_mask |= (1<<irq);
- }
- inb(I8259_M_MR); /* DUMMY */
- outb(m_irq_mask,I8259_M_MR); /* disable */
- outb(0x60+irq,I8259_M_CR); /* EOI */
-
- } else {
- if(s_irq_mask & (1<<(irq - 8))){
- if(!mpc1211_irq_real(irq)){
- atomic_inc(&irq_err_count);
- printk("spurious 8259A interrupt: IRQ %x\n",irq);
- }
- } else {
- s_irq_mask |= (1<<(irq - 8));
- }
- inb(I8259_S_MR); /* DUMMY */
- outb(s_irq_mask,I8259_S_MR); /* disable */
- outb(0x60+(irq-8),I8259_S_CR); /* EOI */
- outb(0x60+2,I8259_M_CR);
- }
-}
-
-static void end_mpc1211_irq(unsigned int irq)
-{
- enable_mpc1211_irq(irq);
-}
-
-static unsigned int startup_mpc1211_irq(unsigned int irq)
-{
- enable_mpc1211_irq(irq);
- return 0;
-}
-
-static void shutdown_mpc1211_irq(unsigned int irq)
-{
- disable_mpc1211_irq(irq);
-}
-
-static struct hw_interrupt_type mpc1211_irq_type = {
- .typename = "MPC1211-IRQ",
- .startup = startup_mpc1211_irq,
- .shutdown = shutdown_mpc1211_irq,
- .enable = enable_mpc1211_irq,
- .disable = disable_mpc1211_irq,
- .ack = mask_and_ack_mpc1211,
- .end = end_mpc1211_irq
-};
-
-static void make_mpc1211_irq(unsigned int irq)
-{
- irq_desc[irq].chip = &mpc1211_irq_type;
- irq_desc[irq].status = IRQ_DISABLED;
- irq_desc[irq].action = 0;
- irq_desc[irq].depth = 1;
- disable_mpc1211_irq(irq);
-}
-
-int mpc1211_irq_demux(int irq)
-{
- unsigned int poll;
-
- if( irq == 2 ) {
- outb(0x0c,I8259_M_CR);
- poll = inb(I8259_M_CR);
- if(poll & 0x80) {
- irq = (poll & 0x07);
- }
- if( irq == 2) {
- outb(0x0c,I8259_S_CR);
- poll = inb(I8259_S_CR);
- irq = (poll & 0x07) + 8;
- }
- }
- return irq;
-}
-
-static void __init init_mpc1211_IRQ(void)
-{
- int i;
- /*
- * Super I/O (Just mimic PC):
- * 1: keyboard
- * 3: serial 1
- * 4: serial 0
- * 5: printer
- * 6: floppy
- * 8: rtc
- * 10: lan
- * 12: mouse
- * 14: ide0
- * 15: ide1
- */
-
- pci_write_config(0,0,0,0x54, 0xb0b0002d);
- outb(0x11, I8259_M_CR); /* mater icw1 edge trigger */
- outb(0x11, I8259_S_CR); /* slave icw1 edge trigger */
- outb(0x20, I8259_M_MR); /* m icw2 base vec 0x08 */
- outb(0x28, I8259_S_MR); /* s icw2 base vec 0x70 */
- outb(0x04, I8259_M_MR); /* m icw3 slave irq2 */
- outb(0x02, I8259_S_MR); /* s icw3 slave id */
- outb(0x01, I8259_M_MR); /* m icw4 non buf normal eoi*/
- outb(0x01, I8259_S_MR); /* s icw4 non buf normal eo1*/
- outb(0xfb, I8259_M_MR); /* disable irq0--irq7 */
- outb(0xff, I8259_S_MR); /* disable irq8--irq15 */
-
- for ( i=0; i < 16; i++) {
- if(i != 2) {
- make_mpc1211_irq(i);
- }
- }
-}
-
-static void delay1000(void)
-{
- int i;
-
- for (i=0; i<1000; i++)
- ctrl_delay();
-}
-
-static int put_smb_blk(unsigned char *p, int address, int command, int no)
-{
- int temp;
- int timeout;
- int i;
-
- outb(0xff, SMBHSTSTS);
- temp = inb(SMBHSTSTS);
- for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); timeout++) {
- delay1000();
- temp = inb(SMBHSTSTS);
- }
- if (timeout >= MAX_TIMEOUT){
- return -1;
- }
-
- outb(((address & 0x7f) << 1), SMBHSTADD);
- outb(0xc0, SMBHSTCNT);
- outb(command & 0xff, SMBHSTCMD);
- outb(no & 0x1f, SMBHSTDAT0);
-
- for(i = 1; i <= no; i++) {
- outb(*p++, SMBBLKDAT);
- }
- outb(0xff, SMBHSTSTART);
-
- temp = inb(SMBHSTSTS);
- for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)); timeout++) {
- delay1000();
- temp = inb(SMBHSTSTS);
- }
- if (timeout >= MAX_TIMEOUT) {
- return -2;
- }
- if ( temp & ALI15X3_STS_ERR ){
- return -3;
- }
- return 0;
-}
-
-static struct resource heartbeat_resources[] = {
- [0] = {
- .start = 0xa2000000,
- .end = 0xa2000000,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device heartbeat_device = {
- .name = "heartbeat",
- .id = -1,
- .num_resources = ARRAY_SIZE(heartbeat_resources),
- .resource = heartbeat_resources,
-};
-
-static struct platform_device *mpc1211_devices[] __initdata = {
- &heartbeat_device,
-};
-
-static int __init mpc1211_devices_setup(void)
-{
- return platform_add_devices(mpc1211_devices,
- ARRAY_SIZE(mpc1211_devices));
-}
-__initcall(mpc1211_devices_setup);
-
-/* arch/sh/boards/mpc1211/rtc.c */
-void mpc1211_time_init(void);
-
-static void __init mpc1211_setup(char **cmdline_p)
-{
- unsigned char spd_buf[128];
-
- __set_io_port_base(PA_PCI_IO);
-
- pci_write_config(0,0,0,0x54, 0xb0b00000);
-
- do {
- outb(ALI15X3_ABORT, SMBHSTCNT);
- spd_buf[0] = 0x0c;
- spd_buf[1] = 0x43;
- spd_buf[2] = 0x7f;
- spd_buf[3] = 0x03;
- spd_buf[4] = 0x00;
- spd_buf[5] = 0x03;
- spd_buf[6] = 0x00;
- } while (put_smb_blk(spd_buf, 0x69, 0, 7) < 0);
-
- board_time_init = mpc1211_time_init;
-
- return 0;
-}
-
-/*
- * The Machine Vector
- */
-static struct sh_machine_vector mv_mpc1211 __initmv = {
- .mv_name = "Interface MPC-1211(CTP/PCI/MPC-SH02)",
- .mv_setup = mpc1211_setup,
- .mv_nr_irqs = 48,
- .mv_irq_demux = mpc1211_irq_demux,
- .mv_init_irq = init_mpc1211_IRQ,
-};
diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c
index e7c150d49702..01af44245b57 100644
--- a/arch/sh/boards/renesas/migor/setup.c
+++ b/arch/sh/boards/renesas/migor/setup.c
@@ -14,6 +14,7 @@
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/i2c.h>
+#include <linux/smc91x.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh_keysc.h>
@@ -27,6 +28,11 @@
* 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
*/
+static struct smc91x_platdata smc91x_info = {
+ .flags = SMC91X_USE_16BIT,
+ .irq_flags = IRQF_TRIGGER_HIGH,
+};
+
static struct resource smc91x_eth_resources[] = {
[0] = {
.name = "SMC91C111" ,
@@ -36,7 +42,7 @@ static struct resource smc91x_eth_resources[] = {
},
[1] = {
.start = 32, /* IRQ0 */
- .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
+ .flags = IORESOURCE_IRQ,
},
};
@@ -44,6 +50,9 @@ static struct platform_device smc91x_eth_device = {
.name = "smc91x",
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
.resource = smc91x_eth_resources,
+ .dev = {
+ .platform_data = &smc91x_info,
+ },
};
static struct sh_keysc_info sh_keysc_info = {
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
index 68f0ad1b637d..ae1cfcb29700 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
@@ -62,7 +62,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
NULL, mask_registers, NULL, NULL);
-unsigned char * __init highlander_init_irq_r7780mp(void)
+unsigned char * __init highlander_plat_irq_setup(void)
{
if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) {
printk(KERN_INFO "Using r7780mp interrupt controller.\n");
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
index bd34048ed0e1..9d3921fe27c0 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
@@ -55,7 +55,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
NULL, mask_registers, NULL, NULL);
-unsigned char * __init highlander_init_irq_r7780rp(void)
+unsigned char * __init highlander_plat_irq_setup(void)
{
if (ctrl_inw(0xa5000600)) {
printk(KERN_INFO "Using r7780rp interrupt controller.\n");
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
index bf7ec107fbc6..896c045aa39d 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
@@ -64,7 +64,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
NULL, mask_registers, NULL, NULL);
-unsigned char * __init highlander_init_irq_r7785rp(void)
+unsigned char * __init highlander_plat_irq_setup(void)
{
if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
return NULL;
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
index ac0a96522e45..bc79afb6fc4c 100644
--- a/arch/sh/boards/renesas/r7780rp/setup.c
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -316,7 +316,7 @@ static void __init highlander_setup(char **cmdline_p)
static unsigned char irl2irq[HL_NR_IRL];
-int highlander_irq_demux(int irq)
+static int highlander_irq_demux(int irq)
{
if (irq >= HL_NR_IRL || !irl2irq[irq])
return irq;
@@ -324,27 +324,9 @@ int highlander_irq_demux(int irq)
return irl2irq[irq];
}
-void __init highlander_init_irq(void)
+static void __init highlander_init_irq(void)
{
- unsigned char *ucp = NULL;
-
- do {
-#ifdef CONFIG_SH_R7780MP
- ucp = highlander_init_irq_r7780mp();
- if (ucp)
- break;
-#endif
-#ifdef CONFIG_SH_R7785RP
- ucp = highlander_init_irq_r7785rp();
- if (ucp)
- break;
-#endif
-#ifdef CONFIG_SH_R7780RP
- ucp = highlander_init_irq_r7780rp();
- if (ucp)
- break;
-#endif
- } while (0);
+ unsigned char *ucp = highlander_plat_irq_setup();
if (ucp) {
plat_irq_setup_pins(IRQ_MODE_IRL3210);
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index f21ee49ef3a5..452d0d6459a4 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -109,7 +109,6 @@ static struct platform_device heartbeat_device = {
.resource = heartbeat_resources,
};
-#ifdef CONFIG_MFD_SM501
static struct plat_serial8250_port uart_platform_data[] = {
{
.membase = (void __iomem *)0xb3e30000,
@@ -208,13 +207,9 @@ static struct platform_device sm501_device = {
.resource = sm501_resources,
};
-#endif /* CONFIG_MFD_SM501 */
-
static struct platform_device *rts7751r2d_devices[] __initdata = {
-#ifdef CONFIG_MFD_SM501
&uart_device,
&sm501_device,
-#endif
&heartbeat_device,
&spi_sh_sci_device,
};
@@ -234,7 +229,9 @@ static int __init rts7751r2d_devices_setup(void)
{
if (register_trapped_io(&cf_trapped_io) == 0)
platform_device_register(&cf_ide_device);
+
spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
+
return platform_add_devices(rts7751r2d_devices,
ARRAY_SIZE(rts7751r2d_devices));
}
diff --git a/arch/sh/boards/se/7206/setup.c b/arch/sh/boards/se/7206/setup.c
index 5b3ee089d91d..4fe84cc08406 100644
--- a/arch/sh/boards/se/7206/setup.c
+++ b/arch/sh/boards/se/7206/setup.c
@@ -3,12 +3,13 @@
* linux/arch/sh/boards/se/7206/setup.c
*
* Copyright (C) 2006 Yoshinori Sato
- * Copyright (C) 2007 Paul Mundt
+ * Copyright (C) 2007 - 2008 Paul Mundt
*
* Hitachi 7206 SolutionEngine Support.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/smc91x.h>
#include <asm/se7206.h>
#include <asm/io.h>
#include <asm/machvec.h>
@@ -16,8 +17,9 @@
static struct resource smc91x_resources[] = {
[0] = {
- .start = 0x300,
- .end = 0x300 + 0x020 - 1,
+ .name = "smc91x-regs",
+ .start = PA_SMSC + 0x300,
+ .end = PA_SMSC + 0x300 + 0x020 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -27,9 +29,18 @@ static struct resource smc91x_resources[] = {
},
};
+static struct smc91x_platdata smc91x_info = {
+ .flags = SMC91X_USE_16BIT,
+};
+
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = -1,
+ .dev = {
+ .dma_mask = NULL,
+ .coherent_dma_mask = 0xffffffff,
+ .platform_data = &smc91x_info,
+ },
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
};
diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c
index 33f6ee71f848..ede3957fc14a 100644
--- a/arch/sh/boards/se/7722/setup.c
+++ b/arch/sh/boards/se/7722/setup.c
@@ -14,6 +14,7 @@
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <linux/input.h>
+#include <linux/smc91x.h>
#include <asm/machvec.h>
#include <asm/se7722.h>
#include <asm/io.h>
@@ -44,6 +45,10 @@ static struct platform_device heartbeat_device = {
};
/* SMC91x */
+static struct smc91x_platdata smc91x_info = {
+ .flags = SMC91X_USE_16BIT,
+};
+
static struct resource smc91x_eth_resources[] = {
[0] = {
.name = "smc91x-regs" ,
@@ -64,6 +69,7 @@ static struct platform_device smc91x_eth_device = {
.dev = {
.dma_mask = NULL, /* don't use dma */
.coherent_dma_mask = 0xffffffff,
+ .platform_data = &smc91x_info,
},
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
.resource = smc91x_eth_resources,
diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32
index 6ac8d4a4ed1d..c0d25fb1aa60 100644
--- a/arch/sh/boot/compressed/Makefile_32
+++ b/arch/sh/boot/compressed/Makefile_32
@@ -6,7 +6,6 @@
targets := vmlinux vmlinux.bin vmlinux.bin.gz \
head_32.o misc_32.o piggy.o
-EXTRA_AFLAGS := -traditional
OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o
diff --git a/arch/sh/boot/compressed/Makefile_64 b/arch/sh/boot/compressed/Makefile_64
index 4334f2b86d8f..912f3e205a0d 100644
--- a/arch/sh/boot/compressed/Makefile_64
+++ b/arch/sh/boot/compressed/Makefile_64
@@ -13,7 +13,6 @@
targets := vmlinux vmlinux.bin vmlinux.bin.gz \
head_64.o misc_64.o cache.o piggy.o
-EXTRA_AFLAGS := -traditional
OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \
$(obj)/cache.o
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index d6e0e2bdaad5..de45c6a3e33b 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -184,9 +184,8 @@ int intc_irq_describe(char* p, int irq)
void __init plat_irq_setup(void)
{
- unsigned long long __dummy0, __dummy1=~0x00000000100000f0;
+ unsigned long long __dummy0, __dummy1=~0x00000000100000f0;
unsigned long reg;
- unsigned long data;
int i;
intc_virt = onchip_remap(INTC_BASE, 1024, "INTC");
@@ -196,11 +195,8 @@ void __init plat_irq_setup(void)
/* Set default: per-line enable/disable, priority driven ack/eoi */
- for (i = 0; i < NR_INTC_IRQS; i++) {
- if (platform_int_priority[i] != NO_PRIORITY) {
- irq_desc[i].chip = &intc_irq_type;
- }
- }
+ for (i = 0; i < NR_INTC_IRQS; i++)
+ irq_desc[i].chip = &intc_irq_type;
/* Disable all interrupts and set all priorities to 0 to avoid trouble */
@@ -211,35 +207,42 @@ void __init plat_irq_setup(void)
ctrl_outl( NO_PRIORITY, reg);
- /* Set IRLM */
- /* If all the priorities are set to 'no priority', then
- * assume we are using encoded mode.
- */
- irlm = platform_int_priority[IRQ_IRL0] + platform_int_priority[IRQ_IRL1] + \
- platform_int_priority[IRQ_IRL2] + platform_int_priority[IRQ_IRL3];
-
- if (irlm == NO_PRIORITY) {
- /* IRLM = 0 */
- reg = INTC_ICR_CLEAR;
- i = IRQ_INTA;
- printk("Trying to use encoded IRL0-3. IRLs unsupported.\n");
- } else {
- /* IRLM = 1 */
- reg = INTC_ICR_SET;
- i = IRQ_IRL0;
- }
- ctrl_outl(INTC_ICR_IRLM, reg);
-
- /* Set interrupt priorities according to platform description */
- for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
- data |= platform_int_priority[i] << ((i % INTC_INTPRI_PPREG) * 4);
- if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
- /* Upon the 7th, set Priority Register */
- ctrl_outl(data, reg);
- data = 0;
- reg += 8;
+#ifdef CONFIG_SH_CAYMAN
+ {
+ unsigned long data;
+
+ /* Set IRLM */
+ /* If all the priorities are set to 'no priority', then
+ * assume we are using encoded mode.
+ */
+ irlm = platform_int_priority[IRQ_IRL0] +
+ platform_int_priority[IRQ_IRL1] +
+ platform_int_priority[IRQ_IRL2] +
+ platform_int_priority[IRQ_IRL3];
+ if (irlm == NO_PRIORITY) {
+ /* IRLM = 0 */
+ reg = INTC_ICR_CLEAR;
+ i = IRQ_INTA;
+ printk("Trying to use encoded IRL0-3. IRLs unsupported.\n");
+ } else {
+ /* IRLM = 1 */
+ reg = INTC_ICR_SET;
+ i = IRQ_IRL0;
}
- }
+ ctrl_outl(INTC_ICR_IRLM, reg);
+
+ /* Set interrupt priorities according to platform description */
+ for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
+ data |= platform_int_priority[i] <<
+ ((i % INTC_INTPRI_PPREG) * 4);
+ if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
+ /* Upon the 7th, set Priority Register */
+ ctrl_outl(data, reg);
+ data = 0;
+ reg += 8;
+ }
+ }
+#endif
/*
* And now let interrupts come in.
diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c
index 84806b2027f8..da5dae787888 100644
--- a/arch/sh/kernel/cpu/irq/intc.c
+++ b/arch/sh/kernel/cpu/irq/intc.c
@@ -1,7 +1,7 @@
/*
* Shared interrupt handling code for IPR and INTC2 types of IRQs.
*
- * Copyright (C) 2007 Magnus Damm
+ * Copyright (C) 2007, 2008 Magnus Damm
*
* Based on intc2.c and ipr.c
*
@@ -62,6 +62,9 @@ struct intc_desc_int {
#endif
static unsigned int intc_prio_level[NR_IRQS]; /* for now */
+#ifdef CONFIG_CPU_SH3
+static unsigned long ack_handle[NR_IRQS];
+#endif
static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
{
@@ -98,17 +101,26 @@ static void write_32(unsigned long addr, unsigned long h, unsigned long data)
static void modify_8(unsigned long addr, unsigned long h, unsigned long data)
{
+ unsigned long flags;
+ local_irq_save(flags);
ctrl_outb(set_field(ctrl_inb(addr), data, h), addr);
+ local_irq_restore(flags);
}
static void modify_16(unsigned long addr, unsigned long h, unsigned long data)
{
+ unsigned long flags;
+ local_irq_save(flags);
ctrl_outw(set_field(ctrl_inw(addr), data, h), addr);
+ local_irq_restore(flags);
}
static void modify_32(unsigned long addr, unsigned long h, unsigned long data)
{
+ unsigned long flags;
+ local_irq_save(flags);
ctrl_outl(set_field(ctrl_inl(addr), data, h), addr);
+ local_irq_restore(flags);
}
enum { REG_FN_ERR = 0, REG_FN_WRITE_BASE = 1, REG_FN_MODIFY_BASE = 5 };
@@ -219,6 +231,25 @@ static void intc_disable(unsigned int irq)
}
}
+#ifdef CONFIG_CPU_SH3
+static void intc_mask_ack(unsigned int irq)
+{
+ struct intc_desc_int *d = get_intc_desc(irq);
+ unsigned long handle = ack_handle[irq];
+ unsigned long addr;
+
+ intc_disable(irq);
+
+ /* read register and write zero only to the assocaited bit */
+
+ if (handle) {
+ addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
+ ctrl_inb(addr);
+ ctrl_outb(0x3f ^ set_field(0, 1, handle), addr);
+ }
+}
+#endif
+
static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
unsigned int nr_hp,
unsigned int irq)
@@ -280,7 +311,12 @@ static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
[IRQ_TYPE_EDGE_FALLING] = VALID(0),
[IRQ_TYPE_EDGE_RISING] = VALID(1),
[IRQ_TYPE_LEVEL_LOW] = VALID(2),
+ /* SH7706, SH7707 and SH7709 do not support high level triggered */
+#if !defined(CONFIG_CPU_SUBTYPE_SH7706) && \
+ !defined(CONFIG_CPU_SUBTYPE_SH7707) && \
+ !defined(CONFIG_CPU_SUBTYPE_SH7709)
[IRQ_TYPE_LEVEL_HIGH] = VALID(3),
+#endif
};
static int intc_set_sense(unsigned int irq, unsigned int type)
@@ -430,6 +466,40 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc,
return 0;
}
+#ifdef CONFIG_CPU_SH3
+static unsigned int __init intc_ack_data(struct intc_desc *desc,
+ struct intc_desc_int *d,
+ intc_enum enum_id)
+{
+ struct intc_mask_reg *mr = desc->ack_regs;
+ unsigned int i, j, fn, mode;
+ unsigned long reg_e, reg_d;
+
+ for (i = 0; mr && enum_id && i < desc->nr_ack_regs; i++) {
+ mr = desc->ack_regs + i;
+
+ for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
+ if (mr->enum_ids[j] != enum_id)
+ continue;
+
+ fn = REG_FN_MODIFY_BASE;
+ mode = MODE_ENABLE_REG;
+ reg_e = mr->set_reg;
+ reg_d = mr->set_reg;
+
+ fn += (mr->reg_width >> 3) - 1;
+ return _INTC_MK(fn, mode,
+ intc_get_reg(d, reg_e),
+ intc_get_reg(d, reg_d),
+ 1,
+ (mr->reg_width - 1) - j);
+ }
+ }
+
+ return 0;
+}
+#endif
+
static unsigned int __init intc_sense_data(struct intc_desc *desc,
struct intc_desc_int *d,
intc_enum enum_id)
@@ -530,6 +600,11 @@ static void __init intc_register_irq(struct intc_desc *desc,
/* irq should be disabled by default */
d->chip.mask(irq);
+
+#ifdef CONFIG_CPU_SH3
+ if (desc->ack_regs)
+ ack_handle[irq] = intc_ack_data(desc, d, enum_id);
+#endif
}
static unsigned int __init save_reg(struct intc_desc_int *d,
@@ -560,6 +635,9 @@ void __init register_intc_controller(struct intc_desc *desc)
d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0;
d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0;
+#ifdef CONFIG_CPU_SH3
+ d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0;
+#endif
d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg));
#ifdef CONFIG_SMP
d->smp = alloc_bootmem(d->nr_reg * sizeof(*d->smp));
@@ -592,14 +670,23 @@ void __init register_intc_controller(struct intc_desc *desc)
}
}
- BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
-
d->chip.name = desc->name;
d->chip.mask = intc_disable;
d->chip.unmask = intc_enable;
d->chip.mask_ack = intc_disable;
d->chip.set_type = intc_set_sense;
+#ifdef CONFIG_CPU_SH3
+ if (desc->ack_regs) {
+ for (i = 0; i < desc->nr_ack_regs; i++)
+ k += save_reg(d, k, desc->ack_regs[i].set_reg, 0);
+
+ d->chip.mask_ack = intc_mask_ack;
+ }
+#endif
+
+ BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
+
for (i = 0; i < desc->nr_vectors; i++) {
struct intc_vect *vect = desc->vectors + i;
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index 5627c0b3ffa8..6df2fb98eb30 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -300,7 +300,7 @@ static int denormal_addf(int hx, int hy)
iy = hy & 0x7fffffff;
if (iy < 0x00800000) {
ix = denormal_subf1(ix, iy);
- if (ix < 0) {
+ if ((int) ix < 0) {
ix = -ix;
sign ^= 0x80000000;
}
@@ -385,7 +385,7 @@ static long long denormal_addd(long long hx, long long hy)
iy = hy & 0x7fffffffffffffffLL;
if (iy < 0x0010000000000000LL) {
ix = denormal_subd1(ix, iy);
- if (ix < 0) {
+ if ((int) ix < 0) {
ix = -ix;
sign ^= 0x8000000000000000LL;
}
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index 3ae4d9111f19..511de55af832 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -2,7 +2,7 @@
# Makefile for the Linux/SuperH SH-3 backends.
#
-obj-y := ex.o probe.o entry.o
+obj-y := ex.o probe.o entry.o setup-sh3.o
# CPU subtype setup
obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c
new file mode 100644
index 000000000000..c98846857855
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c
@@ -0,0 +1,71 @@
+/*
+ * Shared SH3 Setup code
+ *
+ * Copyright (C) 2008 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+/* All SH3 devices are equipped with IRQ0->5 (except sh7708) */
+
+enum {
+ UNUSED = 0,
+
+ /* interrupt sources */
+ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
+};
+
+static struct intc_vect vectors_irq0123[] __initdata = {
+ INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
+ INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
+};
+
+static struct intc_vect vectors_irq45[] __initdata = {
+ INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+ { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
+ { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
+};
+
+static struct intc_mask_reg ack_registers[] __initdata = {
+ { 0xa4000004, 0, 8, /* IRR0 */
+ { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
+};
+
+static struct intc_sense_reg sense_registers[] __initdata = {
+ { 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh3-irq0123",
+ vectors_irq0123, NULL, NULL,
+ prio_registers, sense_registers, ack_registers);
+
+static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
+ vectors_irq45, NULL, NULL,
+ prio_registers, sense_registers, ack_registers);
+
+#define INTC_ICR1 0xa4000010UL
+#define INTC_ICR1_IRQLVL (1<<14)
+
+void __init plat_irq_setup_pins(int mode)
+{
+ if (mode == IRQ_MODE_IRQ) {
+ ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
+ register_intc_controller(&intc_desc_irq0123);
+ return;
+ }
+ BUG();
+}
+
+void __init plat_irq_setup_sh3(void)
+{
+ register_intc_controller(&intc_desc_irq45);
+}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index f581534cb732..6468ae86b944 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -37,7 +37,7 @@ enum {
};
static struct intc_vect vectors[] __initdata = {
- INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+ /* IRQ0->5 are handled in setup-sh3.c */
INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
@@ -48,7 +48,7 @@ static struct intc_vect vectors[] __initdata = {
INTC_VECT(ADC_ADI, 0x980),
INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40),
INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
- INTC_VECT(TPU3, 0xc80), INTC_VECT(TPU1, 0xca0),
+ INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
@@ -81,14 +81,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups,
NULL, prio_registers, NULL);
-static struct intc_vect vectors_irq[] __initdata = {
- INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
- INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
-};
-
-static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL,
- NULL, prio_registers, NULL);
-
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xa4410000,
@@ -159,16 +151,8 @@ static int __init sh7705_devices_setup(void)
}
__initcall(sh7705_devices_setup);
-void __init plat_irq_setup_pins(int mode)
-{
- if (mode == IRQ_MODE_IRQ) {
- register_intc_controller(&intc_desc_irq);
- return;
- }
- BUG();
-}
-
void __init plat_irq_setup(void)
{
register_intc_controller(&intc_desc);
+ plat_irq_setup_sh3();
}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index d3733b13ea52..93c55e2ed952 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -52,7 +52,7 @@ static struct intc_vect vectors[] __initdata = {
#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709)
- INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+ /* IRQ0->5 are handled in setup-sh3.c */
INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
INTC_VECT(ADC_ADI, 0x980),
@@ -104,18 +104,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
NULL, prio_registers, NULL);
-#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
- defined(CONFIG_CPU_SUBTYPE_SH7707) || \
- defined(CONFIG_CPU_SUBTYPE_SH7709)
-static struct intc_vect vectors_irq[] __initdata = {
- INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
- INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
-};
-
-static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
- NULL, prio_registers, NULL);
-#endif
-
static struct resource rtc_resources[] = {
[0] = {
.start = 0xfffffec0,
@@ -194,24 +182,12 @@ static int __init sh770x_devices_setup(void)
}
__initcall(sh770x_devices_setup);
-#define INTC_ICR1 0xa4000010UL
-#define INTC_ICR1_IRQLVL (1<<14)
-
-void __init plat_irq_setup_pins(int mode)
+void __init plat_irq_setup(void)
{
- if (mode == IRQ_MODE_IRQ) {
+ register_intc_controller(&intc_desc);
#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709)
- ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
- register_intc_controller(&intc_desc_irq);
- return;
+ plat_irq_setup_sh3();
#endif
- }
- BUG();
-}
-
-void __init plat_irq_setup(void)
-{
- register_intc_controller(&intc_desc);
}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 7406c9ad9259..77eee481de47 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -38,7 +38,7 @@ enum {
};
static struct intc_vect vectors[] __initdata = {
- INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+ /* IRQ0->5 are handled in setup-sh3.c */
INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
@@ -79,10 +79,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
{ 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
{ 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
{ 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } },
- { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, DMAC2 } },
-#ifdef CONFIG_CPU_SUBTYPE_SH7710
- { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC } },
-#endif
+ { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC, DMAC2 } },
{ 0xa4080002, 0, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } },
{ 0xa4080004, 0, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } },
{ 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } },
@@ -91,14 +88,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
NULL, prio_registers, NULL);
-static struct intc_vect vectors_irq[] __initdata = {
- INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
- INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
-};
-
-static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL,
- NULL, prio_registers, NULL);
-
static struct resource rtc_resources[] = {
[0] = {
.start = 0xa413fec0,
@@ -170,16 +159,8 @@ static int __init sh7710_devices_setup(void)
}
__initcall(sh7710_devices_setup);
-void __init plat_irq_setup_pins(int mode)
-{
- if (mode == IRQ_MODE_IRQ) {
- register_intc_controller(&intc_desc_irq);
- return;
- }
- BUG();
-}
-
void __init plat_irq_setup(void)
{
register_intc_controller(&intc_desc);
+ plat_irq_setup_sh3();
}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 8028082527c5..f807a21b066c 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -19,10 +19,6 @@
#include <linux/serial_sci.h>
#include <asm/rtc.h>
-#define INTC_ICR1 0xA4140010UL
-#define INTC_ICR_IRLM 0x4000
-#define INTC_ICR_IRQ (~INTC_ICR_IRLM)
-
static struct resource rtc_resources[] = {
[0] = {
.start = 0xa413fec0,
@@ -170,6 +166,7 @@ enum {
};
static struct intc_vect vectors[] __initdata = {
+ /* IRQ0->5 are handled in setup-sh3.c */
INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480),
INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0),
@@ -214,11 +211,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
{ 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
{ 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
{ 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
-#if defined(CONFIG_CPU_SUBTYPE_SH7720)
{ 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
-#else
- { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, 0 } },
-#endif
{ 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
{ 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
{ 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
@@ -229,32 +222,8 @@ static struct intc_prio_reg prio_registers[] __initdata = {
static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
NULL, prio_registers, NULL);
-static struct intc_sense_reg sense_registers[] __initdata = {
- { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
-};
-
-static struct intc_vect vectors_irq[] __initdata = {
- INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
- INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
- INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
-};
-
-static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq,
- NULL, NULL, prio_registers, sense_registers);
-
-void __init plat_irq_setup_pins(int mode)
-{
- switch (mode) {
- case IRQ_MODE_IRQ:
- ctrl_outw(ctrl_inw(INTC_ICR1) & INTC_ICR_IRQ, INTC_ICR1);
- register_intc_controller(&intc_irq_desc);
- break;
- default:
- BUG();
- }
-}
-
void __init plat_irq_setup(void)
{
register_intc_controller(&intc_desc);
+ plat_irq_setup_sh3();
}
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index ba8750176d91..05372ed6c568 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -143,12 +143,22 @@ resvec_save_area:
trap_jtable:
.long do_exception_error /* 0x000 */
.long do_exception_error /* 0x020 */
+#ifdef CONFIG_MMU
.long tlb_miss_load /* 0x040 */
.long tlb_miss_store /* 0x060 */
+#else
+ .long do_exception_error
+ .long do_exception_error
+#endif
! ARTIFICIAL pseudo-EXPEVT setting
.long do_debug_interrupt /* 0x080 */
+#ifdef CONFIG_MMU
.long tlb_miss_load /* 0x0A0 */
.long tlb_miss_store /* 0x0C0 */
+#else
+ .long do_exception_error
+ .long do_exception_error
+#endif
.long do_address_error_load /* 0x0E0 */
.long do_address_error_store /* 0x100 */
#ifdef CONFIG_SH_FPU
@@ -185,10 +195,18 @@ trap_jtable:
.endr
.long do_IRQ /* 0xA00 */
.long do_IRQ /* 0xA20 */
+#ifdef CONFIG_MMU
.long itlb_miss_or_IRQ /* 0xA40 */
+#else
+ .long do_IRQ
+#endif
.long do_IRQ /* 0xA60 */
.long do_IRQ /* 0xA80 */
+#ifdef CONFIG_MMU
.long itlb_miss_or_IRQ /* 0xAA0 */
+#else
+ .long do_IRQ
+#endif
.long do_exception_error /* 0xAC0 */
.long do_address_error_exec /* 0xAE0 */
.rept 8
@@ -274,6 +292,7 @@ not_a_tlb_miss:
* Instead of '.space 1024-TEXT_SIZE' place the RESVEC
* block making sure the final alignment is correct.
*/
+#ifdef CONFIG_MMU
tlb_miss:
synco /* TAKum03020 (but probably a good idea anyway.) */
putcon SP, KCR1
@@ -377,6 +396,9 @@ fixup_to_invoke_general_handler:
getcon KCR1, SP
pta handle_exception, tr0
blink tr0, ZERO
+#else /* CONFIG_MMU */
+ .balign 256
+#endif
/* NB TAKE GREAT CARE HERE TO ENSURE THAT THE INTERRUPT CODE
DOES END UP AT VBR+0x600 */
@@ -1103,6 +1125,7 @@ restore_all:
* fpu_error_or_IRQ? is a helper to deflect to the right cause.
*
*/
+#ifdef CONFIG_MMU
tlb_miss_load:
or SP, ZERO, r2
or ZERO, ZERO, r3 /* Read */
@@ -1132,6 +1155,7 @@ call_do_page_fault:
movi do_page_fault, r6
ptabs r6, tr0
blink tr0, ZERO
+#endif /* CONFIG_MMU */
fpu_error_or_IRQA:
pta its_IRQ, tr0
@@ -1481,6 +1505,7 @@ poke_real_address_q:
ptabs LINK, tr0
blink tr0, r63
+#ifdef CONFIG_MMU
/*
* --- User Access Handling Section
*/
@@ -1604,6 +1629,7 @@ ___clear_user_exit:
ptabs LINK, tr0
blink tr0, ZERO
+#endif /* CONFIG_MMU */
/*
* int __strncpy_from_user(unsigned long __dest, unsigned long __src,
@@ -2014,9 +2040,11 @@ sa_default_restorer:
.global asm_uaccess_start /* Just a marker */
asm_uaccess_start:
+#ifdef CONFIG_MMU
.long ___copy_user1, ___copy_user_exit
.long ___copy_user2, ___copy_user_exit
.long ___clear_user1, ___clear_user_exit
+#endif
.long ___strncpy_from_user1, ___strncpy_from_user_exit
.long ___strnlen_user1, ___strnlen_user_exit
.long ___get_user_asm_b1, ___get_user_asm_b_exit
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 31f8cb0f6374..92ad844b5c12 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -15,6 +15,7 @@
#include <linux/string.h>
#include <asm/processor.h>
#include <asm/cache.h>
+#include <asm/tlb.h>
int __init detect_cpu_and_cache_system(void)
{
@@ -67,5 +68,8 @@ int __init detect_cpu_and_cache_system(void)
set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags));
#endif
+ /* Setup some I/D TLB defaults */
+ sh64_tlb_init();
+
return 0;
}
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 957f25611543..6b7d166694e2 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -141,7 +141,9 @@ static void scif_sercon_init(char *s)
*/
static void scif_sercon_init(char *s)
{
+ struct uart_port *port = &scif_port;
unsigned baud = DEFAULT_BAUD;
+ unsigned int status;
char *e;
if (*s == ',')
@@ -160,19 +162,25 @@ static void scif_sercon_init(char *s)
baud = DEFAULT_BAUD;
}
- ctrl_outw(0, scif_port.mapbase + 8);
- ctrl_outw(0, scif_port.mapbase);
+ do {
+ status = sci_in(port, SCxSR);
+ } while (!(status & SCxSR_TEND(port)));
+
+ sci_out(port, SCSCR, 0); /* TE=0, RE=0 */
+ sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
+ sci_out(port, SCSMR, 0);
/* Set baud rate */
- ctrl_outb((CONFIG_SH_PCLK_FREQ + 16 * baud) /
- (32 * baud) - 1, scif_port.mapbase + 4);
-
- ctrl_outw(12, scif_port.mapbase + 24);
- ctrl_outw(8, scif_port.mapbase + 24);
- ctrl_outw(0, scif_port.mapbase + 32);
- ctrl_outw(0x60, scif_port.mapbase + 16);
- ctrl_outw(0, scif_port.mapbase + 36);
- ctrl_outw(0x30, scif_port.mapbase + 8);
+ sci_out(port, SCBRR, (CONFIG_SH_PCLK_FREQ + 16 * baud) /
+ (32 * baud) - 1);
+ udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
+
+ sci_out(port, SCSPTR, 0);
+ sci_out(port, SCxSR, 0x60);
+ sci_out(port, SCLSR, 0);
+
+ sci_out(port, SCFCR, 0);
+ sci_out(port, SCSCR, 0x30); /* TE=1, RE=1 */
}
#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */
#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */
diff --git a/arch/sh/kernel/kgdb_stub.c b/arch/sh/kernel/kgdb_stub.c
index d453c3a1c79f..832641bbd47d 100644
--- a/arch/sh/kernel/kgdb_stub.c
+++ b/arch/sh/kernel/kgdb_stub.c
@@ -330,14 +330,6 @@ static char *ebin_to_mem(const char *buf, char *mem, int count)
return mem;
}
-/* Pack a hex byte */
-static char *pack_hex_byte(char *pkt, int byte)
-{
- *pkt++ = hexchars[(byte >> 4) & 0xf];
- *pkt++ = hexchars[(byte & 0xf)];
- return pkt;
-}
-
/* Scan for the start char '$', read the packet and check the checksum */
static void get_packet(char *buffer, int buflen)
{
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 284f66f1ebbe..516bde9c50fa 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -53,6 +53,7 @@ EXPORT_SYMBOL(cpu_data);
* sh_mv= on the command line, prior to .machvec.init teardown.
*/
struct sh_machine_vector sh_mv = { .mv_name = "generic", };
+EXPORT_SYMBOL(sh_mv);
#ifdef CONFIG_VT
struct screen_info screen_info;
@@ -76,11 +77,18 @@ static struct resource data_resource = {
.flags = IORESOURCE_BUSY | IORESOURCE_MEM,
};
+static struct resource bss_resource = {
+ .name = "Kernel bss",
+ .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
+};
+
unsigned long memory_start;
EXPORT_SYMBOL(memory_start);
unsigned long memory_end = 0;
EXPORT_SYMBOL(memory_end);
+static struct resource mem_resources[MAX_NUMNODES];
+
int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
static int __init early_parse_mem(char *p)
@@ -169,6 +177,40 @@ static inline void __init reserve_crashkernel(void)
{}
#endif
+void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
+ unsigned long end_pfn)
+{
+ struct resource *res = &mem_resources[nid];
+
+ WARN_ON(res->name); /* max one active range per node for now */
+
+ res->name = "System RAM";
+ res->start = start_pfn << PAGE_SHIFT;
+ res->end = (end_pfn << PAGE_SHIFT) - 1;
+ res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
+ if (request_resource(&iomem_resource, res)) {
+ pr_err("unable to request memory_resource 0x%lx 0x%lx\n",
+ start_pfn, end_pfn);
+ return;
+ }
+
+ /*
+ * We don't know which RAM region contains kernel data,
+ * so we try it repeatedly and let the resource manager
+ * test it.
+ */
+ request_resource(res, &code_resource);
+ request_resource(res, &data_resource);
+ request_resource(res, &bss_resource);
+
+#ifdef CONFIG_KEXEC
+ if (crashk_res.start != crashk_res.end)
+ request_resource(res, &crashk_res);
+#endif
+
+ add_active_range(nid, start_pfn, end_pfn);
+}
+
void __init setup_bootmem_allocator(unsigned long free_pfn)
{
unsigned long bootmap_size;
@@ -181,7 +223,7 @@ void __init setup_bootmem_allocator(unsigned long free_pfn)
bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn,
min_low_pfn, max_low_pfn);
- add_active_range(0, min_low_pfn, max_low_pfn);
+ __add_active_range(0, min_low_pfn, max_low_pfn);
register_bootmem_low_pages();
node_set_online(0);
@@ -267,6 +309,8 @@ void __init setup_arch(char **cmdline_p)
code_resource.end = virt_to_phys(_etext)-1;
data_resource.start = virt_to_phys(_etext);
data_resource.end = virt_to_phys(_edata)-1;
+ bss_resource.start = virt_to_phys(__bss_start);
+ bss_resource.end = virt_to_phys(_ebss)-1;
memory_start = (unsigned long)__va(__MEMORY_START);
if (!memory_end)
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 6d405462cee8..8f916536719c 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -20,8 +20,6 @@
extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
extern struct hw_interrupt_type no_irq_type;
-EXPORT_SYMBOL(sh_mv);
-
/* platform dependent support */
EXPORT_SYMBOL(dump_fpu);
EXPORT_SYMBOL(kernel_thread);
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index a310c9707f03..9324d32adacc 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -16,6 +16,7 @@
#include <linux/in6.h>
#include <linux/interrupt.h>
#include <linux/screen_info.h>
+#include <asm/cacheflush.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
#include <asm/checksum.h>
@@ -29,25 +30,50 @@ extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
EXPORT_SYMBOL(dump_fpu);
EXPORT_SYMBOL(kernel_thread);
+#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU)
+EXPORT_SYMBOL(clear_user_page);
+#endif
+
+#ifndef CONFIG_CACHE_OFF
+EXPORT_SYMBOL(flush_dcache_page);
+#endif
+
/* Networking helper routines. */
+EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(csum_partial_copy_nocheck);
+#ifdef CONFIG_IPV6
+EXPORT_SYMBOL(csum_ipv6_magic);
+#endif
#ifdef CONFIG_VT
EXPORT_SYMBOL(screen_info);
#endif
+EXPORT_SYMBOL(__put_user_asm_b);
+EXPORT_SYMBOL(__put_user_asm_w);
EXPORT_SYMBOL(__put_user_asm_l);
+EXPORT_SYMBOL(__put_user_asm_q);
+EXPORT_SYMBOL(__get_user_asm_b);
+EXPORT_SYMBOL(__get_user_asm_w);
EXPORT_SYMBOL(__get_user_asm_l);
+EXPORT_SYMBOL(__get_user_asm_q);
+EXPORT_SYMBOL(__strnlen_user);
+EXPORT_SYMBOL(__strncpy_from_user);
+EXPORT_SYMBOL(clear_page);
+EXPORT_SYMBOL(__clear_user);
EXPORT_SYMBOL(copy_page);
EXPORT_SYMBOL(__copy_user);
EXPORT_SYMBOL(empty_zero_page);
EXPORT_SYMBOL(memcpy);
EXPORT_SYMBOL(__udelay);
EXPORT_SYMBOL(__ndelay);
+EXPORT_SYMBOL(__const_udelay);
/* Ugh. These come in from libgcc.a at link time. */
#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
DECLARE_EXPORT(__sdivsi3);
+DECLARE_EXPORT(__sdivsi3_2);
DECLARE_EXPORT(__muldi3);
DECLARE_EXPORT(__udivsi3);
+DECLARE_EXPORT(__div_table);
diff --git a/arch/sh/kernel/time_64.c b/arch/sh/kernel/time_64.c
index 898977ee2030..022a55f1c1d4 100644
--- a/arch/sh/kernel/time_64.c
+++ b/arch/sh/kernel/time_64.c
@@ -172,6 +172,7 @@ void do_gettimeofday(struct timeval *tv)
tv->tv_sec = sec;
tv->tv_usec = usec;
}
+EXPORT_SYMBOL(do_gettimeofday);
int do_settimeofday(struct timespec *tv)
{
@@ -240,7 +241,7 @@ static inline void do_timer_interrupt(void)
* the irq version of write_lock because as just said we have irq
* locally disabled. -arca
*/
- write_lock(&xtime_lock);
+ write_seqlock(&xtime_lock);
asm ("getcon cr62, %0" : "=r" (current_ctc));
ctc_last_interrupt = (unsigned long) current_ctc;
@@ -266,7 +267,7 @@ static inline void do_timer_interrupt(void)
/* do it again in 60 s */
last_rtc_update = xtime.tv_sec - 600;
}
- write_unlock(&xtime_lock);
+ write_sequnlock(&xtime_lock);
#ifndef CONFIG_SMP
update_process_times(user_mode(get_irq_regs()));
diff --git a/arch/sh/lib64/dbg.c b/arch/sh/lib64/dbg.c
index 75825ef6e084..2fb8eaf6de60 100644
--- a/arch/sh/lib64/dbg.c
+++ b/arch/sh/lib64/dbg.c
@@ -186,8 +186,8 @@ void evt_debug(int evt, int ret_addr, int event, int tra, struct pt_regs *regs)
rr->pc = regs->pc;
if (sp < stack_bottom + 3092) {
- printk("evt_debug : stack underflow report\n");
int i, j;
+ printk("evt_debug : stack underflow report\n");
for (j=0, i = event_ptr; j<16; j++) {
rr = event_ring + i;
printk("evt=%08x event=%08x tra=%08x pid=%5d sp=%08lx pc=%08lx\n",
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64
index cbd6aa33c5ac..0d92a8a3ac9a 100644
--- a/arch/sh/mm/Makefile_64
+++ b/arch/sh/mm/Makefile_64
@@ -2,10 +2,11 @@
# Makefile for the Linux SuperH-specific parts of the memory manager.
#
-obj-y := init.o extable_64.o consistent.o
+obj-y := init.o consistent.o
-mmu-y := tlb-nommu.o pg-nommu.o
-mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o
+mmu-y := tlb-nommu.o pg-nommu.o extable_32.o
+mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o \
+ extable_64.o
ifndef CONFIG_CACHE_OFF
obj-y += cache-sh5.o
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c
index 3877321fcede..9e277ec7d536 100644
--- a/arch/sh/mm/cache-sh5.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -714,6 +714,7 @@ void flush_cache_sigtramp(unsigned long vaddr)
sh64_icache_inv_current_user_range(vaddr, end);
}
+#ifdef CONFIG_MMU
/*
* These *MUST* lie in an area of virtual address space that's otherwise
* unused.
@@ -830,3 +831,4 @@ void clear_user_page(void *to, unsigned long address, struct page *page)
else
sh64_clear_user_page_coloured(to, address);
}
+#endif
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c
index cea224c3e49b..6e0be24d26e2 100644
--- a/arch/sh/mm/ioremap_64.c
+++ b/arch/sh/mm/ioremap_64.c
@@ -343,6 +343,7 @@ unsigned long onchip_remap(unsigned long phys, unsigned long size, const char *n
return shmedia_alloc_io(phys, size, name);
}
+EXPORT_SYMBOL(onchip_remap);
void onchip_unmap(unsigned long vaddr)
{
@@ -370,6 +371,7 @@ void onchip_unmap(unsigned long vaddr)
kfree(res);
}
}
+EXPORT_SYMBOL(onchip_unmap);
#ifdef CONFIG_PROC_FS
static int
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 2de7302724fc..1663199ce888 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -59,7 +59,7 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
free_pfn = start_pfn = start >> PAGE_SHIFT;
end_pfn = end >> PAGE_SHIFT;
- add_active_range(nid, start_pfn, end_pfn);
+ __add_active_range(nid, start_pfn, end_pfn);
/* Node-local pgdat */
NODE_DATA(nid) = pfn_to_kaddr(free_pfn);
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 987c6682bf99..1bba7d36be90 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -28,7 +28,6 @@ HD64465 HD64465
7751SYSTEMH SH_7751_SYSTEMH
HP6XX SH_HP6XX
DREAMCAST SH_DREAMCAST
-MPC1211 SH_MPC1211
SNAPGEAR SH_SECUREEDGE5410
EDOSK7705 SH_EDOSK7705
SH4202_MICRODEV SH_SH4202_MICRODEV
diff --git a/arch/sparc/kernel/entry.S b/arch/sparc/kernel/entry.S
index 57d1bbdd0bd2..4bcfe54f878d 100644
--- a/arch/sparc/kernel/entry.S
+++ b/arch/sparc/kernel/entry.S
@@ -1306,6 +1306,8 @@ ret_from_fork:
.align 4
.globl linux_sparc_syscall
linux_sparc_syscall:
+ sethi %hi(PSR_SYSCALL), %l4
+ or %l0, %l4, %l0
/* Direct access to user regs, must faster. */
cmp %g1, NR_SYSCALLS
bgeu linux_sparc_ni_syscall
diff --git a/arch/sparc/kernel/process.c b/arch/sparc/kernel/process.c
index e7f35198ae34..da48d248cc17 100644
--- a/arch/sparc/kernel/process.c
+++ b/arch/sparc/kernel/process.c
@@ -419,14 +419,26 @@ asmlinkage int sparc_do_fork(unsigned long clone_flags,
unsigned long stack_size)
{
unsigned long parent_tid_ptr, child_tid_ptr;
+ unsigned long orig_i1 = regs->u_regs[UREG_I1];
+ long ret;
parent_tid_ptr = regs->u_regs[UREG_I2];
child_tid_ptr = regs->u_regs[UREG_I4];
- return do_fork(clone_flags, stack_start,
- regs, stack_size,
- (int __user *) parent_tid_ptr,
- (int __user *) child_tid_ptr);
+ ret = do_fork(clone_flags, stack_start,
+ regs, stack_size,
+ (int __user *) parent_tid_ptr,
+ (int __user *) child_tid_ptr);
+
+ /* If we get an error and potentially restart the system
+ * call, we're screwed because copy_thread() clobbered
+ * the parent's %o1. So detect that case and restore it
+ * here.
+ */
+ if ((unsigned long)ret >= -ERESTART_RESTARTBLOCK)
+ regs->u_regs[UREG_I1] = orig_i1;
+
+ return ret;
}
/* Copy a Sparc thread. The fork() return value conventions
@@ -626,11 +638,6 @@ asmlinkage int sparc_execve(struct pt_regs *regs)
(char __user * __user *)regs->u_regs[base + UREG_I2],
regs);
putname(filename);
- if (error == 0) {
- task_lock(current);
- current->ptrace &= ~PT_DTRACE;
- task_unlock(current);
- }
out:
return error;
}
diff --git a/arch/sparc/kernel/ptrace.c b/arch/sparc/kernel/ptrace.c
index 7f44ae69b29e..81f3b929743f 100644
--- a/arch/sparc/kernel/ptrace.c
+++ b/arch/sparc/kernel/ptrace.c
@@ -170,8 +170,8 @@ static int genregs32_set(struct task_struct *target,
switch (pos) {
case 32: /* PSR */
psr = regs->psr;
- psr &= ~PSR_ICC;
- psr |= (reg & PSR_ICC);
+ psr &= ~(PSR_ICC | PSR_SYSCALL);
+ psr |= (reg & (PSR_ICC | PSR_SYSCALL));
regs->psr = psr;
break;
case 33: /* PC */
@@ -441,6 +441,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
break;
default:
+ if (request == PTRACE_SPARC_DETACH)
+ request = PTRACE_DETACH;
ret = ptrace_request(child, request, addr, data);
break;
}
diff --git a/arch/sparc/kernel/rtrap.S b/arch/sparc/kernel/rtrap.S
index 77ca6fd81253..ab818cdc4cc0 100644
--- a/arch/sparc/kernel/rtrap.S
+++ b/arch/sparc/kernel/rtrap.S
@@ -50,8 +50,9 @@ rtrap_7win_patch5: and %g1, 0x7f, %g1
ret_trap_entry:
ret_trap_lockless_ipi:
andcc %t_psr, PSR_PS, %g0
+ sethi %hi(PSR_SYSCALL), %g1
be 1f
- nop
+ andn %t_psr, %g1, %t_psr
wr %t_psr, 0x0, %psr
b ret_trap_kernel
@@ -73,7 +74,6 @@ signal_p:
ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr
mov %l5, %o1
- mov %l6, %o2
call do_signal
add %sp, STACKFRAME_SZ, %o0 ! pt_regs ptr
@@ -81,6 +81,8 @@ signal_p:
ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr
clr %l6
ret_trap_continue:
+ sethi %hi(PSR_SYSCALL), %g1
+ andn %t_psr, %g1, %t_psr
wr %t_psr, 0x0, %psr
WRITE_PAUSE
@@ -137,8 +139,9 @@ ret_trap_userwins_ok:
LOAD_PT_PRIV(sp, t_psr, t_pc, t_npc)
or %t_pc, %t_npc, %g2
andcc %g2, 0x3, %g0
+ sethi %hi(PSR_SYSCALL), %g2
be 1f
- nop
+ andn %t_psr, %g2, %t_psr
b ret_trap_unaligned_pc
add %sp, STACKFRAME_SZ, %o0
@@ -201,6 +204,8 @@ rtrap_patch5: and %g1, 0xff, %g1
1:
LOAD_PT_ALL(sp, t_psr, t_pc, t_npc, g1)
2:
+ sethi %hi(PSR_SYSCALL), %twin_tmp1
+ andn %t_psr, %twin_tmp1, %t_psr
wr %t_psr, 0x0, %psr
WRITE_PAUSE
diff --git a/arch/sparc/kernel/signal.c b/arch/sparc/kernel/signal.c
index 3c312290c3c2..3fd1df9f9ba7 100644
--- a/arch/sparc/kernel/signal.c
+++ b/arch/sparc/kernel/signal.c
@@ -145,6 +145,9 @@ asmlinkage void do_sigreturn(struct pt_regs *regs)
regs->psr = (up_psr & ~(PSR_ICC | PSR_EF))
| (regs->psr & (PSR_ICC | PSR_EF));
+ /* Prevent syscall restart. */
+ pt_regs_clear_syscall(regs);
+
err |= __get_user(fpu_save, &sf->fpu_save);
if (fpu_save)
@@ -199,6 +202,9 @@ asmlinkage void do_rt_sigreturn(struct pt_regs *regs)
regs->psr = (regs->psr & ~PSR_ICC) | (psr & PSR_ICC);
+ /* Prevent syscall restart. */
+ pt_regs_clear_syscall(regs);
+
err |= __get_user(fpu_save, &sf->fpu_save);
if (fpu_save)
@@ -245,15 +251,29 @@ static inline int invalid_frame_pointer(void __user *fp, int fplen)
static inline void __user *get_sigframe(struct sigaction *sa, struct pt_regs *regs, unsigned long framesize)
{
- unsigned long sp;
+ unsigned long sp = regs->u_regs[UREG_FP];
- sp = regs->u_regs[UREG_FP];
+ /*
+ * If we are on the alternate signal stack and would overflow it, don't.
+ * Return an always-bogus address instead so we will die with SIGSEGV.
+ */
+ if (on_sig_stack(sp) && !likely(on_sig_stack(sp - framesize)))
+ return (void __user *) -1L;
/* This is the X/Open sanctioned signal stack switching. */
if (sa->sa_flags & SA_ONSTACK) {
- if (!on_sig_stack(sp) && !((current->sas_ss_sp + current->sas_ss_size) & 7))
+ if (sas_ss_flags(sp) == 0)
sp = current->sas_ss_sp + current->sas_ss_size;
}
+
+ /* Always align the stack frame. This handles two cases. First,
+ * sigaltstack need not be mindful of platform specific stack
+ * alignment. Second, if we took this signal because the stack
+ * is not aligned properly, we'd like to take the signal cleanly
+ * and report that.
+ */
+ sp &= ~7UL;
+
return (void __user *)(sp - framesize);
}
@@ -493,26 +513,36 @@ static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
* want to handle. Thus you cannot kill init even with a SIGKILL even by
* mistake.
*/
-asmlinkage void do_signal(struct pt_regs * regs, unsigned long orig_i0, int restart_syscall)
+asmlinkage void do_signal(struct pt_regs * regs, unsigned long orig_i0)
{
- siginfo_t info;
- struct sparc_deliver_cookie cookie;
struct k_sigaction ka;
- int signr;
+ int restart_syscall;
sigset_t *oldset;
+ siginfo_t info;
+ int signr;
- cookie.restart_syscall = restart_syscall;
- cookie.orig_i0 = orig_i0;
+ if (pt_regs_is_syscall(regs) && (regs->psr & PSR_C))
+ restart_syscall = 1;
+ else
+ restart_syscall = 0;
if (test_thread_flag(TIF_RESTORE_SIGMASK))
oldset = &current->saved_sigmask;
else
oldset = &current->blocked;
- signr = get_signal_to_deliver(&info, &ka, regs, &cookie);
+ signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+
+ /* If the debugger messes with the program counter, it clears
+ * the software "in syscall" bit, directing us to not perform
+ * a syscall restart.
+ */
+ if (restart_syscall && !pt_regs_is_syscall(regs))
+ restart_syscall = 0;
+
if (signr > 0) {
- if (cookie.restart_syscall)
- syscall_restart(cookie.orig_i0, regs, &ka.sa);
+ if (restart_syscall)
+ syscall_restart(orig_i0, regs, &ka.sa);
handle_signal(signr, &ka, &info, oldset, regs);
/* a signal was successfully delivered; the saved
@@ -524,16 +554,16 @@ asmlinkage void do_signal(struct pt_regs * regs, unsigned long orig_i0, int rest
clear_thread_flag(TIF_RESTORE_SIGMASK);
return;
}
- if (cookie.restart_syscall &&
+ if (restart_syscall &&
(regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
regs->u_regs[UREG_I0] == ERESTARTSYS ||
regs->u_regs[UREG_I0] == ERESTARTNOINTR)) {
/* replay the system call when we are done */
- regs->u_regs[UREG_I0] = cookie.orig_i0;
+ regs->u_regs[UREG_I0] = orig_i0;
regs->pc -= 4;
regs->npc -= 4;
}
- if (cookie.restart_syscall &&
+ if (restart_syscall &&
regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
regs->u_regs[UREG_G1] = __NR_restart_syscall;
regs->pc -= 4;
@@ -585,27 +615,3 @@ do_sys_sigstack(struct sigstack __user *ssptr, struct sigstack __user *ossptr,
out:
return ret;
}
-
-void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
-{
- struct sparc_deliver_cookie *cp = cookie;
-
- if (cp->restart_syscall &&
- (regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
- regs->u_regs[UREG_I0] == ERESTARTSYS ||
- regs->u_regs[UREG_I0] == ERESTARTNOINTR)) {
- /* replay the system call when we are done */
- regs->u_regs[UREG_I0] = cp->orig_i0;
- regs->pc -= 4;
- regs->npc -= 4;
- cp->restart_syscall = 0;
- }
-
- if (cp->restart_syscall &&
- regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
- regs->u_regs[UREG_G1] = __NR_restart_syscall;
- regs->pc -= 4;
- regs->npc -= 4;
- cp->restart_syscall = 0;
- }
-}
diff --git a/arch/sparc/kernel/sys_sparc.c b/arch/sparc/kernel/sys_sparc.c
index f188b5dc9fd0..3c6b49a53ae8 100644
--- a/arch/sparc/kernel/sys_sparc.c
+++ b/arch/sparc/kernel/sys_sparc.c
@@ -219,12 +219,11 @@ out:
return err;
}
-int sparc_mmap_check(unsigned long addr, unsigned long len, unsigned long flags)
+int sparc_mmap_check(unsigned long addr, unsigned long len)
{
if (ARCH_SUN4C_SUN4 &&
(len > 0x20000000 ||
- ((flags & MAP_FIXED) &&
- addr < 0xe0000000 && addr + len > 0x20000000)))
+ (addr < 0xe0000000 && addr + len > 0x20000000)))
return -EINVAL;
/* See asm-sparc/uaccess.h */
@@ -296,52 +295,14 @@ asmlinkage unsigned long sparc_mremap(unsigned long addr,
unsigned long old_len, unsigned long new_len,
unsigned long flags, unsigned long new_addr)
{
- struct vm_area_struct *vma;
unsigned long ret = -EINVAL;
- if (ARCH_SUN4C_SUN4) {
- if (old_len > 0x20000000 || new_len > 0x20000000)
- goto out;
- if (addr < 0xe0000000 && addr + old_len > 0x20000000)
- goto out;
- }
- if (old_len > TASK_SIZE - PAGE_SIZE ||
- new_len > TASK_SIZE - PAGE_SIZE)
+
+ if (unlikely(sparc_mmap_check(addr, old_len)))
+ goto out;
+ if (unlikely(sparc_mmap_check(new_addr, new_len)))
goto out;
down_write(&current->mm->mmap_sem);
- if (flags & MREMAP_FIXED) {
- if (ARCH_SUN4C_SUN4 &&
- new_addr < 0xe0000000 &&
- new_addr + new_len > 0x20000000)
- goto out_sem;
- if (new_addr + new_len > TASK_SIZE - PAGE_SIZE)
- goto out_sem;
- } else if ((ARCH_SUN4C_SUN4 && addr < 0xe0000000 &&
- addr + new_len > 0x20000000) ||
- addr + new_len > TASK_SIZE - PAGE_SIZE) {
- unsigned long map_flags = 0;
- struct file *file = NULL;
-
- ret = -ENOMEM;
- if (!(flags & MREMAP_MAYMOVE))
- goto out_sem;
-
- vma = find_vma(current->mm, addr);
- if (vma) {
- if (vma->vm_flags & VM_SHARED)
- map_flags |= MAP_SHARED;
- file = vma->vm_file;
- }
-
- new_addr = get_unmapped_area(file, addr, new_len,
- vma ? vma->vm_pgoff : 0,
- map_flags);
- ret = new_addr;
- if (new_addr & ~PAGE_MASK)
- goto out_sem;
- flags |= MREMAP_FIXED;
- }
ret = do_mremap(addr, old_len, new_len, flags, new_addr);
-out_sem:
up_write(&current->mm->mmap_sem);
out:
return ret;
diff --git a/arch/sparc64/kernel/etrap.S b/arch/sparc64/kernel/etrap.S
index b49d3b60bc0c..f25e1da3fd03 100644
--- a/arch/sparc64/kernel/etrap.S
+++ b/arch/sparc64/kernel/etrap.S
@@ -27,11 +27,12 @@
.text
.align 64
- .globl etrap, etrap_irq, etraptl1
+ .globl etrap_syscall, etrap, etrap_irq, etraptl1
etrap: rdpr %pil, %g2
-etrap_irq:
- TRAP_LOAD_THREAD_REG(%g6, %g1)
+etrap_irq: clr %g3
+etrap_syscall: TRAP_LOAD_THREAD_REG(%g6, %g1)
rdpr %tstate, %g1
+ or %g1, %g3, %g1
sllx %g2, 20, %g3
andcc %g1, TSTATE_PRIV, %g0
or %g1, %g3, %g1
diff --git a/arch/sparc64/kernel/process.c b/arch/sparc64/kernel/process.c
index 500ac6d483a0..4129c0449856 100644
--- a/arch/sparc64/kernel/process.c
+++ b/arch/sparc64/kernel/process.c
@@ -503,6 +503,8 @@ asmlinkage long sparc_do_fork(unsigned long clone_flags,
unsigned long stack_size)
{
int __user *parent_tid_ptr, *child_tid_ptr;
+ unsigned long orig_i1 = regs->u_regs[UREG_I1];
+ long ret;
#ifdef CONFIG_COMPAT
if (test_thread_flag(TIF_32BIT)) {
@@ -515,9 +517,19 @@ asmlinkage long sparc_do_fork(unsigned long clone_flags,
child_tid_ptr = (int __user *) regs->u_regs[UREG_I4];
}
- return do_fork(clone_flags, stack_start,
- regs, stack_size,
- parent_tid_ptr, child_tid_ptr);
+ ret = do_fork(clone_flags, stack_start,
+ regs, stack_size,
+ parent_tid_ptr, child_tid_ptr);
+
+ /* If we get an error and potentially restart the system
+ * call, we're screwed because copy_thread() clobbered
+ * the parent's %o1. So detect that case and restore it
+ * here.
+ */
+ if ((unsigned long)ret >= -ERESTART_RESTARTBLOCK)
+ regs->u_regs[UREG_I1] = orig_i1;
+
+ return ret;
}
/* Copy a Sparc thread. The fork() return value conventions
diff --git a/arch/sparc64/kernel/ptrace.c b/arch/sparc64/kernel/ptrace.c
index e9fc0aa2da38..f6c9fc92921d 100644
--- a/arch/sparc64/kernel/ptrace.c
+++ b/arch/sparc64/kernel/ptrace.c
@@ -287,11 +287,11 @@ static int genregs64_set(struct task_struct *target,
32 * sizeof(u64),
33 * sizeof(u64));
if (!ret) {
- /* Only the condition codes can be modified
- * in the %tstate register.
+ /* Only the condition codes and the "in syscall"
+ * state can be modified in the %tstate register.
*/
- tstate &= (TSTATE_ICC | TSTATE_XCC);
- regs->tstate &= ~(TSTATE_ICC | TSTATE_XCC);
+ tstate &= (TSTATE_ICC | TSTATE_XCC | TSTATE_SYSCALL);
+ regs->tstate &= ~(TSTATE_ICC | TSTATE_XCC | TSTATE_SYSCALL);
regs->tstate |= tstate;
}
}
@@ -657,8 +657,10 @@ static int genregs32_set(struct task_struct *target,
switch (pos) {
case 32: /* PSR */
tstate = regs->tstate;
- tstate &= ~(TSTATE_ICC | TSTATE_XCC);
+ tstate &= ~(TSTATE_ICC | TSTATE_XCC | TSTATE_SYSCALL);
tstate |= psr_to_tstate_icc(reg);
+ if (reg & PSR_SYSCALL)
+ tstate |= TSTATE_SYSCALL;
regs->tstate = tstate;
break;
case 33: /* PC */
@@ -944,6 +946,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
break;
default:
+ if (request == PTRACE_SPARC_DETACH)
+ request = PTRACE_DETACH;
ret = compat_ptrace_request(child, request, addr, data);
break;
}
@@ -1036,6 +1040,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
break;
default:
+ if (request == PTRACE_SPARC_DETACH)
+ request = PTRACE_DETACH;
ret = ptrace_request(child, request, addr, data);
break;
}
diff --git a/arch/sparc64/kernel/rtrap.S b/arch/sparc64/kernel/rtrap.S
index ecf6753b204a..16689b2930db 100644
--- a/arch/sparc64/kernel/rtrap.S
+++ b/arch/sparc64/kernel/rtrap.S
@@ -46,7 +46,7 @@ __handle_user_windows:
wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
ldx [%g6 + TI_FLAGS], %l0
-1: andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0
+1: andcc %l0, _TIF_SIGPENDING, %g0
be,pt %xcc, __handle_user_windows_continue
nop
mov %l5, %o1
@@ -86,7 +86,7 @@ __handle_perfctrs:
wrpr %g0, RTRAP_PSTATE, %pstate
wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
ldx [%g6 + TI_FLAGS], %l0
-1: andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0
+1: andcc %l0, _TIF_SIGPENDING, %g0
be,pt %xcc, __handle_perfctrs_continue
sethi %hi(TSTATE_PEF), %o0
@@ -195,7 +195,7 @@ __handle_preemption_continue:
andcc %l1, %o0, %g0
andcc %l0, _TIF_NEED_RESCHED, %g0
bne,pn %xcc, __handle_preemption
- andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0
+ andcc %l0, _TIF_SIGPENDING, %g0
bne,pn %xcc, __handle_signal
__handle_signal_continue:
ldub [%g6 + TI_WSAVED], %o2
@@ -257,6 +257,7 @@ rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
wr %o3, %g0, %y
wrpr %l4, 0x0, %pil
wrpr %g0, 0x1, %tl
+ andn %l1, TSTATE_SYSCALL, %l1
wrpr %l1, %g0, %tstate
wrpr %l2, %g0, %tpc
wrpr %o2, %g0, %tnpc
diff --git a/arch/sparc64/kernel/signal.c b/arch/sparc64/kernel/signal.c
index 45d6bf632daa..6e4dc67d16af 100644
--- a/arch/sparc64/kernel/signal.c
+++ b/arch/sparc64/kernel/signal.c
@@ -247,7 +247,9 @@ static long _sigpause_common(old_sigset_t set)
current->state = TASK_INTERRUPTIBLE;
schedule();
- set_thread_flag(TIF_RESTORE_SIGMASK);
+
+ set_restore_sigmask();
+
return -ERESTARTNOHAND;
}
@@ -333,7 +335,7 @@ void do_rt_sigreturn(struct pt_regs *regs)
regs->tnpc = tnpc;
/* Prevent syscall restart. */
- pt_regs_clear_trap_type(regs);
+ pt_regs_clear_syscall(regs);
sigdelsetmask(&set, ~_BLOCKABLE);
spin_lock_irq(&current->sighand->siglock);
@@ -376,16 +378,29 @@ save_fpu_state(struct pt_regs *regs, __siginfo_fpu_t __user *fpu)
static inline void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, unsigned long framesize)
{
- unsigned long sp;
+ unsigned long sp = regs->u_regs[UREG_FP] + STACK_BIAS;
- sp = regs->u_regs[UREG_FP] + STACK_BIAS;
+ /*
+ * If we are on the alternate signal stack and would overflow it, don't.
+ * Return an always-bogus address instead so we will die with SIGSEGV.
+ */
+ if (on_sig_stack(sp) && !likely(on_sig_stack(sp - framesize)))
+ return (void __user *) -1L;
/* This is the X/Open sanctioned signal stack switching. */
if (ka->sa.sa_flags & SA_ONSTACK) {
- if (!on_sig_stack(sp) &&
- !((current->sas_ss_sp + current->sas_ss_size) & 7))
+ if (sas_ss_flags(sp) == 0)
sp = current->sas_ss_sp + current->sas_ss_size;
}
+
+ /* Always align the stack frame. This handles two cases. First,
+ * sigaltstack need not be mindful of platform specific stack
+ * alignment. Second, if we took this signal because the stack
+ * is not aligned properly, we'd like to take the signal cleanly
+ * and report that.
+ */
+ sp &= ~7UL;
+
return (void __user *)(sp - framesize);
}
@@ -486,7 +501,7 @@ static inline void handle_signal(unsigned long signr, struct k_sigaction *ka,
}
static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
- struct sigaction *sa)
+ struct sigaction *sa)
{
switch (regs->u_regs[UREG_I0]) {
case ERESTART_RESTARTBLOCK:
@@ -512,21 +527,19 @@ static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
*/
static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
{
- struct signal_deliver_cookie cookie;
struct k_sigaction ka;
+ int restart_syscall;
sigset_t *oldset;
siginfo_t info;
int signr;
if (pt_regs_is_syscall(regs) &&
(regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) {
- pt_regs_clear_trap_type(regs);
- cookie.restart_syscall = 1;
+ restart_syscall = 1;
} else
- cookie.restart_syscall = 0;
- cookie.orig_i0 = orig_i0;
+ restart_syscall = 0;
- if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ if (current_thread_info()->status & TS_RESTORE_SIGMASK)
oldset = &current->saved_sigmask;
else
oldset = &current->blocked;
@@ -534,77 +547,62 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
#ifdef CONFIG_COMPAT
if (test_thread_flag(TIF_32BIT)) {
extern void do_signal32(sigset_t *, struct pt_regs *,
- struct signal_deliver_cookie *);
- do_signal32(oldset, regs, &cookie);
+ int restart_syscall,
+ unsigned long orig_i0);
+ do_signal32(oldset, regs, restart_syscall, orig_i0);
return;
}
#endif
- signr = get_signal_to_deliver(&info, &ka, regs, &cookie);
+ signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+
+ /* If the debugger messes with the program counter, it clears
+ * the software "in syscall" bit, directing us to not perform
+ * a syscall restart.
+ */
+ if (restart_syscall && !pt_regs_is_syscall(regs))
+ restart_syscall = 0;
+
if (signr > 0) {
- if (cookie.restart_syscall)
- syscall_restart(cookie.orig_i0, regs, &ka.sa);
+ if (restart_syscall)
+ syscall_restart(orig_i0, regs, &ka.sa);
handle_signal(signr, &ka, &info, oldset, regs);
- /* a signal was successfully delivered; the saved
+ /* A signal was successfully delivered; the saved
* sigmask will have been stored in the signal frame,
* and will be restored by sigreturn, so we can simply
- * clear the TIF_RESTORE_SIGMASK flag.
+ * clear the TS_RESTORE_SIGMASK flag.
*/
- if (test_thread_flag(TIF_RESTORE_SIGMASK))
- clear_thread_flag(TIF_RESTORE_SIGMASK);
+ current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
return;
}
- if (cookie.restart_syscall &&
+ if (restart_syscall &&
(regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
regs->u_regs[UREG_I0] == ERESTARTSYS ||
regs->u_regs[UREG_I0] == ERESTARTNOINTR)) {
/* replay the system call when we are done */
- regs->u_regs[UREG_I0] = cookie.orig_i0;
+ regs->u_regs[UREG_I0] = orig_i0;
regs->tpc -= 4;
regs->tnpc -= 4;
}
- if (cookie.restart_syscall &&
+ if (restart_syscall &&
regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
regs->u_regs[UREG_G1] = __NR_restart_syscall;
regs->tpc -= 4;
regs->tnpc -= 4;
}
- /* if there's no signal to deliver, we just put the saved sigmask
+ /* If there's no signal to deliver, we just put the saved sigmask
* back
*/
- if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
- clear_thread_flag(TIF_RESTORE_SIGMASK);
+ if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
+ current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
}
}
void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, unsigned long thread_info_flags)
{
- if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
+ if (thread_info_flags & _TIF_SIGPENDING)
do_signal(regs, orig_i0);
}
-
-void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
-{
- struct signal_deliver_cookie *cp = cookie;
-
- if (cp->restart_syscall &&
- (regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
- regs->u_regs[UREG_I0] == ERESTARTSYS ||
- regs->u_regs[UREG_I0] == ERESTARTNOINTR)) {
- /* replay the system call when we are done */
- regs->u_regs[UREG_I0] = cp->orig_i0;
- regs->tpc -= 4;
- regs->tnpc -= 4;
- cp->restart_syscall = 0;
- }
- if (cp->restart_syscall &&
- regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
- regs->u_regs[UREG_G1] = __NR_restart_syscall;
- regs->tpc -= 4;
- regs->tnpc -= 4;
- cp->restart_syscall = 0;
- }
-}
diff --git a/arch/sparc64/kernel/signal32.c b/arch/sparc64/kernel/signal32.c
index 9415d2c918c5..97cdd1bf4a10 100644
--- a/arch/sparc64/kernel/signal32.c
+++ b/arch/sparc64/kernel/signal32.c
@@ -269,7 +269,7 @@ void do_sigreturn32(struct pt_regs *regs)
regs->tstate |= psr_to_tstate_icc(psr);
/* Prevent syscall restart. */
- pt_regs_clear_trap_type(regs);
+ pt_regs_clear_syscall(regs);
err |= __get_user(fpu_save, &sf->fpu_save);
if (fpu_save)
@@ -355,7 +355,7 @@ asmlinkage void do_rt_sigreturn32(struct pt_regs *regs)
regs->tstate |= psr_to_tstate_icc(psr);
/* Prevent syscall restart. */
- pt_regs_clear_trap_type(regs);
+ pt_regs_clear_syscall(regs);
err |= __get_user(fpu_save, &sf->fpu_save);
if (fpu_save)
@@ -406,11 +406,27 @@ static void __user *get_sigframe(struct sigaction *sa, struct pt_regs *regs, uns
regs->u_regs[UREG_FP] &= 0x00000000ffffffffUL;
sp = regs->u_regs[UREG_FP];
+ /*
+ * If we are on the alternate signal stack and would overflow it, don't.
+ * Return an always-bogus address instead so we will die with SIGSEGV.
+ */
+ if (on_sig_stack(sp) && !likely(on_sig_stack(sp - framesize)))
+ return (void __user *) -1L;
+
/* This is the X/Open sanctioned signal stack switching. */
if (sa->sa_flags & SA_ONSTACK) {
- if (!on_sig_stack(sp) && !((current->sas_ss_sp + current->sas_ss_size) & 7))
+ if (sas_ss_flags(sp) == 0)
sp = current->sas_ss_sp + current->sas_ss_size;
}
+
+ /* Always align the stack frame. This handles two cases. First,
+ * sigaltstack need not be mindful of platform specific stack
+ * alignment. Second, if we took this signal because the stack
+ * is not aligned properly, we'd like to take the signal cleanly
+ * and report that.
+ */
+ sp &= ~7UL;
+
return (void __user *)(sp - framesize);
}
@@ -752,48 +768,55 @@ static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs
* mistake.
*/
void do_signal32(sigset_t *oldset, struct pt_regs * regs,
- struct signal_deliver_cookie *cookie)
+ int restart_syscall, unsigned long orig_i0)
{
struct k_sigaction ka;
siginfo_t info;
int signr;
- signr = get_signal_to_deliver(&info, &ka, regs, cookie);
+ signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+
+ /* If the debugger messes with the program counter, it clears
+ * the "in syscall" bit, directing us to not perform a syscall
+ * restart.
+ */
+ if (restart_syscall && !pt_regs_is_syscall(regs))
+ restart_syscall = 0;
+
if (signr > 0) {
- if (cookie->restart_syscall)
- syscall_restart32(cookie->orig_i0, regs, &ka.sa);
+ if (restart_syscall)
+ syscall_restart32(orig_i0, regs, &ka.sa);
handle_signal32(signr, &ka, &info, oldset, regs);
- /* a signal was successfully delivered; the saved
+ /* A signal was successfully delivered; the saved
* sigmask will have been stored in the signal frame,
* and will be restored by sigreturn, so we can simply
- * clear the TIF_RESTORE_SIGMASK flag.
+ * clear the TS_RESTORE_SIGMASK flag.
*/
- if (test_thread_flag(TIF_RESTORE_SIGMASK))
- clear_thread_flag(TIF_RESTORE_SIGMASK);
+ current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
return;
}
- if (cookie->restart_syscall &&
+ if (restart_syscall &&
(regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
regs->u_regs[UREG_I0] == ERESTARTSYS ||
regs->u_regs[UREG_I0] == ERESTARTNOINTR)) {
/* replay the system call when we are done */
- regs->u_regs[UREG_I0] = cookie->orig_i0;
+ regs->u_regs[UREG_I0] = orig_i0;
regs->tpc -= 4;
regs->tnpc -= 4;
}
- if (cookie->restart_syscall &&
+ if (restart_syscall &&
regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
regs->u_regs[UREG_G1] = __NR_restart_syscall;
regs->tpc -= 4;
regs->tnpc -= 4;
}
- /* if there's no signal to deliver, we just put the saved sigmask
+ /* If there's no signal to deliver, we just put the saved sigmask
* back
*/
- if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
- clear_thread_flag(TIF_RESTORE_SIGMASK);
+ if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
+ current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
}
}
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index 3aba47624df4..0d6403a630ac 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -865,21 +865,14 @@ void smp_call_function_client(int irq, struct pt_regs *regs)
void *info = call_data->info;
clear_softint(1 << irq);
-
- irq_enter();
-
- if (!call_data->wait) {
- /* let initiator proceed after getting data */
- atomic_inc(&call_data->finished);
- }
-
- func(info);
-
- irq_exit();
-
if (call_data->wait) {
/* let initiator proceed only after completion */
+ func(info);
atomic_inc(&call_data->finished);
+ } else {
+ /* let initiator proceed after getting data */
+ atomic_inc(&call_data->finished);
+ func(info);
}
}
@@ -1041,9 +1034,7 @@ void smp_receive_signal(int cpu)
void smp_receive_signal_client(int irq, struct pt_regs *regs)
{
- irq_enter();
clear_softint(1 << irq);
- irq_exit();
}
void smp_new_mmu_context_version_client(int irq, struct pt_regs *regs)
@@ -1051,8 +1042,6 @@ void smp_new_mmu_context_version_client(int irq, struct pt_regs *regs)
struct mm_struct *mm;
unsigned long flags;
- irq_enter();
-
clear_softint(1 << irq);
/* See if we need to allocate a new TLB context because
@@ -1072,8 +1061,6 @@ void smp_new_mmu_context_version_client(int irq, struct pt_regs *regs)
load_secondary_context(mm);
__flush_tlb_mm(CTX_HWBITS(mm->context),
SECONDARY_CONTEXT);
-
- irq_exit();
}
void smp_new_mmu_context_version(void)
@@ -1239,8 +1226,6 @@ void smp_penguin_jailcell(int irq, struct pt_regs *regs)
{
clear_softint(1 << irq);
- irq_enter();
-
preempt_disable();
__asm__ __volatile__("flushw");
@@ -1253,8 +1238,6 @@ void smp_penguin_jailcell(int irq, struct pt_regs *regs)
prom_world(0);
preempt_enable();
-
- irq_exit();
}
/* /proc/profile writes can call this, don't __init it please. */
diff --git a/arch/sparc64/kernel/sys_sparc.c b/arch/sparc64/kernel/sys_sparc.c
index 8d4761f15fa9..ac1bff58c1ac 100644
--- a/arch/sparc64/kernel/sys_sparc.c
+++ b/arch/sparc64/kernel/sys_sparc.c
@@ -542,20 +542,19 @@ asmlinkage long sparc64_personality(unsigned long personality)
return ret;
}
-int sparc64_mmap_check(unsigned long addr, unsigned long len,
- unsigned long flags)
+int sparc64_mmap_check(unsigned long addr, unsigned long len)
{
if (test_thread_flag(TIF_32BIT)) {
if (len >= STACK_TOP32)
return -EINVAL;
- if ((flags & MAP_FIXED) && addr > STACK_TOP32 - len)
+ if (addr > STACK_TOP32 - len)
return -EINVAL;
} else {
if (len >= VA_EXCLUDE_START)
return -EINVAL;
- if ((flags & MAP_FIXED) && invalid_64bit_range(addr, len))
+ if (invalid_64bit_range(addr, len))
return -EINVAL;
}
@@ -609,46 +608,19 @@ asmlinkage unsigned long sys64_mremap(unsigned long addr,
unsigned long old_len, unsigned long new_len,
unsigned long flags, unsigned long new_addr)
{
- struct vm_area_struct *vma;
unsigned long ret = -EINVAL;
if (test_thread_flag(TIF_32BIT))
goto out;
if (unlikely(new_len >= VA_EXCLUDE_START))
goto out;
- if (unlikely(invalid_64bit_range(addr, old_len)))
+ if (unlikely(sparc64_mmap_check(addr, old_len)))
+ goto out;
+ if (unlikely(sparc64_mmap_check(new_addr, new_len)))
goto out;
down_write(&current->mm->mmap_sem);
- if (flags & MREMAP_FIXED) {
- if (invalid_64bit_range(new_addr, new_len))
- goto out_sem;
- } else if (invalid_64bit_range(addr, new_len)) {
- unsigned long map_flags = 0;
- struct file *file = NULL;
-
- ret = -ENOMEM;
- if (!(flags & MREMAP_MAYMOVE))
- goto out_sem;
-
- vma = find_vma(current->mm, addr);
- if (vma) {
- if (vma->vm_flags & VM_SHARED)
- map_flags |= MAP_SHARED;
- file = vma->vm_file;
- }
-
- /* MREMAP_FIXED checked above. */
- new_addr = get_unmapped_area(file, addr, new_len,
- vma ? vma->vm_pgoff : 0,
- map_flags);
- ret = new_addr;
- if (new_addr & ~PAGE_MASK)
- goto out_sem;
- flags |= MREMAP_FIXED;
- }
ret = do_mremap(addr, old_len, new_len, flags, new_addr);
-out_sem:
up_write(&current->mm->mmap_sem);
out:
return ret;
diff --git a/arch/sparc64/kernel/sys_sparc32.c b/arch/sparc64/kernel/sys_sparc32.c
index 161ce4710fe7..ba5bd626b39e 100644
--- a/arch/sparc64/kernel/sys_sparc32.c
+++ b/arch/sparc64/kernel/sys_sparc32.c
@@ -236,13 +236,6 @@ asmlinkage long sys32_getegid16(void)
/* 32-bit timeval and related flotsam. */
-static long get_tv32(struct timeval *o, struct compat_timeval __user *i)
-{
- return (!access_ok(VERIFY_READ, i, sizeof(*i)) ||
- (__get_user(o->tv_sec, &i->tv_sec) |
- __get_user(o->tv_usec, &i->tv_usec)));
-}
-
static inline long put_tv32(struct compat_timeval __user *o, struct timeval *i)
{
return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) ||
@@ -757,30 +750,6 @@ asmlinkage long sys32_settimeofday(struct compat_timeval __user *tv,
return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
}
-asmlinkage long sys32_utimes(char __user *filename,
- struct compat_timeval __user *tvs)
-{
- struct timespec tv[2];
-
- if (tvs) {
- struct timeval ktvs[2];
- if (get_tv32(&ktvs[0], tvs) ||
- get_tv32(&ktvs[1], 1+tvs))
- return -EFAULT;
-
- if (ktvs[0].tv_usec < 0 || ktvs[0].tv_usec >= 1000000 ||
- ktvs[1].tv_usec < 0 || ktvs[1].tv_usec >= 1000000)
- return -EINVAL;
-
- tv[0].tv_sec = ktvs[0].tv_sec;
- tv[0].tv_nsec = 1000 * ktvs[0].tv_usec;
- tv[1].tv_sec = ktvs[1].tv_sec;
- tv[1].tv_nsec = 1000 * ktvs[1].tv_usec;
- }
-
- return do_utimes(AT_FDCWD, filename, tvs ? tv : NULL, 0);
-}
-
/* These are here just in case some old sparc32 binary calls it. */
asmlinkage long sys32_pause(void)
{
@@ -898,44 +867,15 @@ asmlinkage unsigned long sys32_mremap(unsigned long addr,
unsigned long old_len, unsigned long new_len,
unsigned long flags, u32 __new_addr)
{
- struct vm_area_struct *vma;
unsigned long ret = -EINVAL;
unsigned long new_addr = __new_addr;
- if (old_len > STACK_TOP32 || new_len > STACK_TOP32)
+ if (unlikely(sparc64_mmap_check(addr, old_len)))
goto out;
- if (addr > STACK_TOP32 - old_len)
+ if (unlikely(sparc64_mmap_check(new_addr, new_len)))
goto out;
down_write(&current->mm->mmap_sem);
- if (flags & MREMAP_FIXED) {
- if (new_addr > STACK_TOP32 - new_len)
- goto out_sem;
- } else if (addr > STACK_TOP32 - new_len) {
- unsigned long map_flags = 0;
- struct file *file = NULL;
-
- ret = -ENOMEM;
- if (!(flags & MREMAP_MAYMOVE))
- goto out_sem;
-
- vma = find_vma(current->mm, addr);
- if (vma) {
- if (vma->vm_flags & VM_SHARED)
- map_flags |= MAP_SHARED;
- file = vma->vm_file;
- }
-
- /* MREMAP_FIXED checked above. */
- new_addr = get_unmapped_area(file, addr, new_len,
- vma ? vma->vm_pgoff : 0,
- map_flags);
- ret = new_addr;
- if (new_addr & ~PAGE_MASK)
- goto out_sem;
- flags |= MREMAP_FIXED;
- }
ret = do_mremap(addr, old_len, new_len, flags, new_addr);
-out_sem:
up_write(&current->mm->mmap_sem);
out:
return ret;
diff --git a/arch/sparc64/kernel/systbls.S b/arch/sparc64/kernel/systbls.S
index a4fef2ba1ae1..8b5282d433c4 100644
--- a/arch/sparc64/kernel/systbls.S
+++ b/arch/sparc64/kernel/systbls.S
@@ -45,7 +45,7 @@ sys_call_table32:
/*120*/ .word compat_sys_readv, compat_sys_writev, sys32_settimeofday, sys32_fchown16, sys_fchmod
.word sys_nis_syscall, sys32_setreuid16, sys32_setregid16, sys_rename, sys_truncate
/*130*/ .word sys_ftruncate, sys_flock, compat_sys_lstat64, sys_nis_syscall, sys_nis_syscall
- .word sys_nis_syscall, sys32_mkdir, sys_rmdir, sys32_utimes, compat_sys_stat64
+ .word sys_nis_syscall, sys32_mkdir, sys_rmdir, compat_sys_utimes, compat_sys_stat64
/*140*/ .word sys32_sendfile64, sys_nis_syscall, sys32_futex, sys_gettid, compat_sys_getrlimit
.word compat_sys_setrlimit, sys_pivot_root, sys32_prctl, sys_pciconfig_read, sys_pciconfig_write
/*150*/ .word sys_nis_syscall, sys_inotify_init, sys_inotify_add_watch, sys_poll, sys_getdents64
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index 4cad0b32b0af..a9828d748e2c 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -610,8 +610,6 @@ static void __init remap_kernel(void)
static void __init inherit_prom_mappings(void)
{
- read_obp_translations();
-
/* Now fixup OBP's idea about where we really are mapped. */
printk("Remapping the kernel... ");
remap_kernel();
@@ -771,6 +769,9 @@ static void __init find_ramdisk(unsigned long phys_base)
initrd_end = ramdisk_image + sparc_ramdisk_size;
lmb_reserve(initrd_start, initrd_end);
+
+ initrd_start += PAGE_OFFSET;
+ initrd_end += PAGE_OFFSET;
}
#endif
}
@@ -1744,7 +1745,17 @@ void __init paging_init(void)
lmb_init();
- /* Find available physical memory... */
+ /* Find available physical memory...
+ *
+ * Read it twice in order to work around a bug in openfirmware.
+ * The call to grab this table itself can cause openfirmware to
+ * allocate memory, which in turn can take away some space from
+ * the list of available memory. Reading it twice makes sure
+ * we really do get the final value.
+ */
+ read_obp_translations();
+ read_obp_memory("reg", &pall[0], &pall_ents);
+ read_obp_memory("available", &pavail[0], &pavail_ents);
read_obp_memory("available", &pavail[0], &pavail_ents);
phys_base = 0xffffffffffffffffUL;
@@ -1785,8 +1796,6 @@ void __init paging_init(void)
inherit_prom_mappings();
- read_obp_memory("reg", &pall[0], &pall_ents);
-
init_kpte_bitmap();
/* Ok, we can use our TLB miss and window trap handlers safely. */
@@ -2362,16 +2371,3 @@ void __flush_tlb_all(void)
__asm__ __volatile__("wrpr %0, 0, %%pstate"
: : "r" (pstate));
}
-
-#ifdef CONFIG_MEMORY_HOTPLUG
-
-void online_page(struct page *page)
-{
- ClearPageReserved(page);
- init_page_count(page);
- __free_page(page);
- totalram_pages++;
- num_physpages++;
-}
-
-#endif /* CONFIG_MEMORY_HOTPLUG */
diff --git a/arch/um/Kconfig.char b/arch/um/Kconfig.char
index 3a4b396d7979..1b238ebae6b3 100644
--- a/arch/um/Kconfig.char
+++ b/arch/um/Kconfig.char
@@ -145,14 +145,14 @@ config LEGACY_PTYS
systems, it is safe to say N.
config RAW_DRIVER
- tristate "RAW driver (/dev/raw/rawN) (OBSOLETE)"
+ tristate "RAW driver (/dev/raw/rawN)"
+ depends on BLOCK
help
The raw driver permits block devices to be bound to /dev/raw/rawN.
Once bound, I/O against /dev/raw/rawN uses efficient zero-copy I/O.
See the raw(8) manpage for more details.
- The raw driver is deprecated and will be removed soon.
- Applications should simply open the device (eg /dev/hda1)
+ Applications should preferably open the device (eg /dev/hda1)
with the O_DIRECT flag.
config MAX_RAW_DEVS
diff --git a/arch/um/Makefile b/arch/um/Makefile
index 01b97c19a8ba..dbeab15e7bb7 100644
--- a/arch/um/Makefile
+++ b/arch/um/Makefile
@@ -77,10 +77,7 @@ include $(srctree)/$(ARCH_DIR)/Makefile-os-$(OS)
KERNEL_DEFINES = $(strip -Derrno=kernel_errno -Dsigprocmask=kernel_sigprocmask \
-Dmktime=kernel_mktime $(ARCH_KERNEL_DEFINES))
KBUILD_CFLAGS += $(KERNEL_DEFINES)
-# Disable unit-at-a-time mode on pre-gcc-4.0 compilers, it makes gcc use
-# a lot more stack due to the lack of sharing of stacklots:
-KBUILD_CFLAGS += $(shell if [ $(call cc-version) -lt 0400 ] ; then \
- echo $(call cc-option,-fno-unit-at-a-time); fi ;)
+KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time,)
PHONY += linux
diff --git a/arch/um/drivers/chan_user.c b/arch/um/drivers/chan_user.c
index 025764089ac8..cfeb3f4a44af 100644
--- a/arch/um/drivers/chan_user.c
+++ b/arch/um/drivers/chan_user.c
@@ -11,6 +11,7 @@
#include <termios.h>
#include <sys/ioctl.h>
#include "chan_user.h"
+#include "kern_constants.h"
#include "os.h"
#include "um_malloc.h"
#include "user.h"
diff --git a/arch/um/drivers/cow_sys.h b/arch/um/drivers/cow_sys.h
index ca8c9e11a39b..f5701fd2ef90 100644
--- a/arch/um/drivers/cow_sys.h
+++ b/arch/um/drivers/cow_sys.h
@@ -8,7 +8,7 @@
static inline void *cow_malloc(int size)
{
- return kmalloc(size, UM_GFP_KERNEL);
+ return uml_kmalloc(size, UM_GFP_KERNEL);
}
static inline void cow_free(void *ptr)
diff --git a/arch/um/drivers/daemon_user.c b/arch/um/drivers/daemon_user.c
index f23c109a055c..f8e85e0bdace 100644
--- a/arch/um/drivers/daemon_user.c
+++ b/arch/um/drivers/daemon_user.c
@@ -34,7 +34,7 @@ static struct sockaddr_un *new_addr(void *name, int len)
{
struct sockaddr_un *sun;
- sun = kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL);
+ sun = uml_kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL);
if (sun == NULL) {
printk(UM_KERN_ERR "new_addr: allocation of sockaddr_un "
"failed\n");
@@ -83,7 +83,7 @@ static int connect_to_switch(struct daemon_data *pri)
goto out_close;
}
- sun = kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL);
+ sun = uml_kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL);
if (sun == NULL) {
printk(UM_KERN_ERR "new_addr: allocation of sockaddr_un "
"failed\n");
diff --git a/arch/um/drivers/fd.c b/arch/um/drivers/fd.c
index 0a2bb5b64b82..f5a981a16240 100644
--- a/arch/um/drivers/fd.c
+++ b/arch/um/drivers/fd.c
@@ -40,7 +40,7 @@ static void *fd_init(char *str, int device, const struct chan_opts *opts)
return NULL;
}
- data = kmalloc(sizeof(*data), UM_GFP_KERNEL);
+ data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL);
if (data == NULL)
return NULL;
diff --git a/arch/um/drivers/hostaudio_kern.c b/arch/um/drivers/hostaudio_kern.c
index ff1b22b69e9c..368219cc2366 100644
--- a/arch/um/drivers/hostaudio_kern.c
+++ b/arch/um/drivers/hostaudio_kern.c
@@ -154,7 +154,7 @@ static int hostaudio_ioctl(struct inode *inode, struct file *file,
case SNDCTL_DSP_SUBDIVIDE:
case SNDCTL_DSP_SETFRAGMENT:
if (get_user(data, (int __user *) arg))
- return EFAULT;
+ return -EFAULT;
break;
default:
break;
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c
index 10b86e1cc659..5047490fc299 100644
--- a/arch/um/drivers/line.c
+++ b/arch/um/drivers/line.c
@@ -191,9 +191,9 @@ void line_flush_chars(struct tty_struct *tty)
line_flush_buffer(tty);
}
-void line_put_char(struct tty_struct *tty, unsigned char ch)
+int line_put_char(struct tty_struct *tty, unsigned char ch)
{
- line_write(tty, &ch, sizeof(ch));
+ return line_write(tty, &ch, sizeof(ch));
}
int line_write(struct tty_struct *tty, const unsigned char *buf, int len)
diff --git a/arch/um/drivers/mcast_user.c b/arch/um/drivers/mcast_user.c
index 5f647d7a7292..ee19e91568a2 100644
--- a/arch/um/drivers/mcast_user.c
+++ b/arch/um/drivers/mcast_user.c
@@ -15,6 +15,7 @@
#include <unistd.h>
#include <errno.h>
#include <netinet/in.h>
+#include "kern_constants.h"
#include "mcast.h"
#include "net_user.h"
#include "um_malloc.h"
@@ -24,7 +25,7 @@ static struct sockaddr_in *new_addr(char *addr, unsigned short port)
{
struct sockaddr_in *sin;
- sin = kmalloc(sizeof(struct sockaddr_in), UM_GFP_KERNEL);
+ sin = uml_kmalloc(sizeof(struct sockaddr_in), UM_GFP_KERNEL);
if (sin == NULL) {
printk(UM_KERN_ERR "new_addr: allocation of sockaddr_in "
"failed\n");
diff --git a/arch/um/drivers/net_user.c b/arch/um/drivers/net_user.c
index abf2653f5517..9415dd9e63ef 100644
--- a/arch/um/drivers/net_user.c
+++ b/arch/um/drivers/net_user.c
@@ -222,7 +222,7 @@ static void change(char *dev, char *what, unsigned char *addr,
netmask[2], netmask[3]);
output_len = UM_KERN_PAGE_SIZE;
- output = kmalloc(output_len, UM_GFP_KERNEL);
+ output = uml_kmalloc(output_len, UM_GFP_KERNEL);
if (output == NULL)
printk(UM_KERN_ERR "change : failed to allocate output "
"buffer\n");
diff --git a/arch/um/drivers/port_user.c b/arch/um/drivers/port_user.c
index d269ca387f10..b49bf56a56aa 100644
--- a/arch/um/drivers/port_user.c
+++ b/arch/um/drivers/port_user.c
@@ -47,7 +47,7 @@ static void *port_init(char *str, int device, const struct chan_opts *opts)
if (kern_data == NULL)
return NULL;
- data = kmalloc(sizeof(*data), UM_GFP_KERNEL);
+ data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL);
if (data == NULL)
goto err;
diff --git a/arch/um/drivers/pty.c b/arch/um/drivers/pty.c
index 49c79dda6046..1113911dcb2b 100644
--- a/arch/um/drivers/pty.c
+++ b/arch/um/drivers/pty.c
@@ -29,7 +29,7 @@ static void *pty_chan_init(char *str, int device, const struct chan_opts *opts)
{
struct pty_chan *data;
- data = kmalloc(sizeof(*data), UM_GFP_KERNEL);
+ data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL);
if (data == NULL)
return NULL;
diff --git a/arch/um/drivers/random.c b/arch/um/drivers/random.c
index 71f0959c1535..4949044773ba 100644
--- a/arch/um/drivers/random.c
+++ b/arch/um/drivers/random.c
@@ -1,4 +1,5 @@
-/* Copyright (C) 2005 Jeff Dike <jdike@addtoit.com> */
+/* Copyright (C) 2005 - 2008 Jeff Dike <jdike@{linux.intel,addtoit}.com> */
+
/* Much of this ripped from drivers/char/hw_random.c, see there for other
* copyright.
*
@@ -8,16 +9,18 @@
#include <linux/sched.h>
#include <linux/module.h>
#include <linux/fs.h>
+#include <linux/interrupt.h>
#include <linux/miscdevice.h>
#include <linux/delay.h>
#include <asm/uaccess.h>
+#include "irq_kern.h"
#include "os.h"
/*
* core module and version information
*/
#define RNG_VERSION "1.0.0"
-#define RNG_MODULE_NAME "random"
+#define RNG_MODULE_NAME "hw_random"
#define RNG_MISCDEV_MINOR 183 /* official */
@@ -26,47 +29,67 @@
* protects against a module being loaded twice at the same time.
*/
static int random_fd = -1;
+static DECLARE_WAIT_QUEUE_HEAD(host_read_wait);
static int rng_dev_open (struct inode *inode, struct file *filp)
{
/* enforce read-only access to this chrdev */
if ((filp->f_mode & FMODE_READ) == 0)
return -EINVAL;
- if (filp->f_mode & FMODE_WRITE)
+ if ((filp->f_mode & FMODE_WRITE) != 0)
return -EINVAL;
return 0;
}
+static atomic_t host_sleep_count = ATOMIC_INIT(0);
+
static ssize_t rng_dev_read (struct file *filp, char __user *buf, size_t size,
- loff_t * offp)
+ loff_t *offp)
{
- u32 data;
- int n, ret = 0, have_data;
-
- while(size){
- n = os_read_file(random_fd, &data, sizeof(data));
- if(n > 0){
- have_data = n;
- while (have_data && size) {
- if (put_user((u8)data, buf++)) {
- ret = ret ? : -EFAULT;
- break;
- }
- size--;
- ret++;
- have_data--;
- data>>=8;
- }
- }
- else if(n == -EAGAIN){
- if (filp->f_flags & O_NONBLOCK)
- return ret ? : -EAGAIN;
-
- if(need_resched())
- schedule_timeout_interruptible(1);
- }
- else return n;
+ u32 data;
+ int n, ret = 0, have_data;
+
+ while (size) {
+ n = os_read_file(random_fd, &data, sizeof(data));
+ if (n > 0) {
+ have_data = n;
+ while (have_data && size) {
+ if (put_user((u8) data, buf++)) {
+ ret = ret ? : -EFAULT;
+ break;
+ }
+ size--;
+ ret++;
+ have_data--;
+ data >>= 8;
+ }
+ }
+ else if (n == -EAGAIN) {
+ DECLARE_WAITQUEUE(wait, current);
+
+ if (filp->f_flags & O_NONBLOCK)
+ return ret ? : -EAGAIN;
+
+ atomic_inc(&host_sleep_count);
+ reactivate_fd(random_fd, RANDOM_IRQ);
+ add_sigio_fd(random_fd);
+
+ add_wait_queue(&host_read_wait, &wait);
+ set_task_state(current, TASK_INTERRUPTIBLE);
+
+ schedule();
+ set_task_state(current, TASK_RUNNING);
+ remove_wait_queue(&host_read_wait, &wait);
+
+ if (atomic_dec_and_test(&host_sleep_count)) {
+ ignore_sigio_fd(random_fd);
+ deactivate_fd(random_fd, RANDOM_IRQ);
+ }
+ }
+ else
+ return n;
+
if (signal_pending (current))
return ret ? : -ERESTARTSYS;
}
@@ -86,6 +109,13 @@ static struct miscdevice rng_miscdev = {
&rng_chrdev_ops,
};
+static irqreturn_t random_interrupt(int irq, void *data)
+{
+ wake_up(&host_read_wait);
+
+ return IRQ_HANDLED;
+}
+
/*
* rng_init - initialize RNG module
*/
@@ -93,28 +123,33 @@ static int __init rng_init (void)
{
int err;
- err = os_open_file("/dev/random", of_read(OPENFLAGS()), 0);
- if(err < 0)
- goto out;
+ err = os_open_file("/dev/random", of_read(OPENFLAGS()), 0);
+ if (err < 0)
+ goto out;
- random_fd = err;
+ random_fd = err;
- err = os_set_fd_block(random_fd, 0);
- if(err)
+ err = um_request_irq(RANDOM_IRQ, random_fd, IRQ_READ, random_interrupt,
+ IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "random",
+ NULL);
+ if (err)
goto err_out_cleanup_hw;
+ sigio_broken(random_fd, 1);
+
err = misc_register (&rng_miscdev);
if (err) {
- printk (KERN_ERR RNG_MODULE_NAME ": misc device register failed\n");
+ printk (KERN_ERR RNG_MODULE_NAME ": misc device register "
+ "failed\n");
goto err_out_cleanup_hw;
}
+out:
+ return err;
- out:
- return err;
-
- err_out_cleanup_hw:
- random_fd = -1;
- goto out;
+err_out_cleanup_hw:
+ os_close_file(random_fd);
+ random_fd = -1;
+ goto out;
}
/*
@@ -122,6 +157,7 @@ static int __init rng_init (void)
*/
static void __exit rng_cleanup (void)
{
+ os_close_file(random_fd);
misc_deregister (&rng_miscdev);
}
diff --git a/arch/um/drivers/slip_user.c b/arch/um/drivers/slip_user.c
index 8b80505a3fb0..a1c2d2c98a94 100644
--- a/arch/um/drivers/slip_user.c
+++ b/arch/um/drivers/slip_user.c
@@ -96,7 +96,7 @@ static int slip_tramp(char **argv, int fd)
pid = err;
output_len = UM_KERN_PAGE_SIZE;
- output = kmalloc(output_len, UM_GFP_KERNEL);
+ output = uml_kmalloc(output_len, UM_GFP_KERNEL);
if (output == NULL) {
printk(UM_KERN_ERR "slip_tramp : failed to allocate output "
"buffer\n");
diff --git a/arch/um/drivers/tty.c b/arch/um/drivers/tty.c
index c930fedc5172..495858a090e4 100644
--- a/arch/um/drivers/tty.c
+++ b/arch/um/drivers/tty.c
@@ -29,7 +29,7 @@ static void *tty_chan_init(char *str, int device, const struct chan_opts *opts)
}
str++;
- data = kmalloc(sizeof(*data), UM_GFP_KERNEL);
+ data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL);
if (data == NULL)
return NULL;
*data = ((struct tty_chan) { .dev = str,
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index 5e45e39a8a8d..44ad1607be2d 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -1178,8 +1178,8 @@ static void cowify_bitmap(__u64 io_offset, int length, unsigned long *cow_mask,
* by one word. Thanks to Lynn Kerby for the fix and James McMechan
* for the original diagnosis.
*/
- if(*cow_offset == ((bitmap_len + sizeof(unsigned long) - 1) /
- sizeof(unsigned long) - 1))
+ if (*cow_offset == (DIV_ROUND_UP(bitmap_len,
+ sizeof(unsigned long)) - 1))
(*cow_offset)--;
bitmap_words[0] = bitmap[*cow_offset];
diff --git a/arch/um/drivers/xterm.c b/arch/um/drivers/xterm.c
index 8a1c18a9b240..da2caa5a21ef 100644
--- a/arch/um/drivers/xterm.c
+++ b/arch/um/drivers/xterm.c
@@ -30,7 +30,7 @@ static void *xterm_init(char *str, int device, const struct chan_opts *opts)
{
struct xterm_chan *data;
- data = kmalloc(sizeof(*data), UM_GFP_KERNEL);
+ data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL);
if (data == NULL)
return NULL;
*data = ((struct xterm_chan) { .pid = -1,
diff --git a/arch/um/include/as-layout.h b/arch/um/include/as-layout.h
index cac542d8ff70..58e852dfb0ce 100644
--- a/arch/um/include/as-layout.h
+++ b/arch/um/include/as-layout.h
@@ -23,16 +23,16 @@
*/
#ifdef __ASSEMBLY__
-#define _AC(X, Y) (Y)
+#define _UML_AC(X, Y) (Y)
#else
-#define __AC(X, Y) (X (Y))
-#define _AC(X, Y) __AC(X, Y)
+#define __UML_AC(X, Y) (X(Y))
+#define _UML_AC(X, Y) __UML_AC(X, Y)
#endif
-#define STUB_START _AC(, 0x100000)
-#define STUB_CODE _AC((unsigned long), STUB_START)
-#define STUB_DATA _AC((unsigned long), STUB_CODE + UM_KERN_PAGE_SIZE)
-#define STUB_END _AC((unsigned long), STUB_DATA + UM_KERN_PAGE_SIZE)
+#define STUB_START _UML_AC(, 0x100000)
+#define STUB_CODE _UML_AC((unsigned long), STUB_START)
+#define STUB_DATA _UML_AC((unsigned long), STUB_CODE + UM_KERN_PAGE_SIZE)
+#define STUB_END _UML_AC((unsigned long), STUB_DATA + UM_KERN_PAGE_SIZE)
#ifndef __ASSEMBLY__
diff --git a/arch/um/include/line.h b/arch/um/include/line.h
index 1223f2c844b4..311a0d3d93af 100644
--- a/arch/um/include/line.h
+++ b/arch/um/include/line.h
@@ -58,11 +58,11 @@ struct line {
};
#define LINE_INIT(str, d) \
- { .count_lock = SPIN_LOCK_UNLOCKED, \
+ { .count_lock = __SPIN_LOCK_UNLOCKED((str).count_lock), \
.init_str = str, \
.init_pri = INIT_STATIC, \
.valid = 1, \
- .lock = SPIN_LOCK_UNLOCKED, \
+ .lock = __SPIN_LOCK_UNLOCKED((str).lock), \
.driver = d }
extern void line_close(struct tty_struct *tty, struct file * filp);
@@ -71,7 +71,7 @@ extern int line_setup(struct line *lines, unsigned int sizeof_lines,
char *init, char **error_out);
extern int line_write(struct tty_struct *tty, const unsigned char *buf,
int len);
-extern void line_put_char(struct tty_struct *tty, unsigned char ch);
+extern int line_put_char(struct tty_struct *tty, unsigned char ch);
extern void line_set_termios(struct tty_struct *tty, struct ktermios * old);
extern int line_chars_in_buffer(struct tty_struct *tty);
extern void line_flush_buffer(struct tty_struct *tty);
diff --git a/arch/um/include/os.h b/arch/um/include/os.h
index 32c799e3a495..e2716ac8889a 100644
--- a/arch/um/include/os.h
+++ b/arch/um/include/os.h
@@ -290,6 +290,7 @@ extern void os_set_ioignore(void);
extern int add_sigio_fd(int fd);
extern int ignore_sigio_fd(int fd);
extern void maybe_sigio_broken(int fd, int read);
+extern void sigio_broken(int fd, int read);
/* sys-x86_64/prctl.c */
extern int os_arch_prctl(int pid, int code, unsigned long *addr);
diff --git a/arch/um/include/process.h b/arch/um/include/process.h
index 5af9157ff54f..bb873a51262e 100644
--- a/arch/um/include/process.h
+++ b/arch/um/include/process.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
+ * Copyright (C) 2000 - 2008 Jeff Dike (jdike@{addtoit,linux.intel}.com)
* Licensed under the GPL
*/
@@ -8,18 +8,10 @@
#include <signal.h>
-extern void sig_handler(int sig, struct sigcontext sc);
-extern void alarm_handler(int sig, struct sigcontext sc);
+/* Copied from linux/compiler-gcc.h since we can't include it directly */
+#define barrier() __asm__ __volatile__("": : :"memory")
-#endif
+extern void sig_handler(int sig, struct sigcontext *sc);
+extern void alarm_handler(int sig, struct sigcontext *sc);
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+#endif
diff --git a/arch/um/include/skas_ptrace.h b/arch/um/include/skas_ptrace.h
index cd2327d09c8d..3d31bbacd016 100644
--- a/arch/um/include/skas_ptrace.h
+++ b/arch/um/include/skas_ptrace.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
+ * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
* Licensed under the GPL
*/
@@ -12,14 +12,3 @@
#include "sysdep/skas_ptrace.h"
#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff --git a/arch/um/include/sysdep-i386/ptrace_user.h b/arch/um/include/sysdep-i386/ptrace_user.h
index 75650723c38f..ef56247e4143 100644
--- a/arch/um/include/sysdep-i386/ptrace_user.h
+++ b/arch/um/include/sysdep-i386/ptrace_user.h
@@ -41,38 +41,10 @@
#define PT_SP_OFFSET PT_OFFSET(UESP)
#define PT_SP(regs) ((regs)[UESP])
-#define FP_SIZE ((HOST_XFP_SIZE > HOST_FP_SIZE) ? HOST_XFP_SIZE : HOST_FP_SIZE)
+#define FP_SIZE ((HOST_FPX_SIZE > HOST_FP_SIZE) ? HOST_FPX_SIZE : HOST_FP_SIZE)
#ifndef FRAME_SIZE
#define FRAME_SIZE (17)
#endif
-#define FRAME_SIZE_OFFSET (FRAME_SIZE * sizeof(unsigned long))
-
-#define FP_FRAME_SIZE (27)
-#define FPX_FRAME_SIZE (128)
-
-#ifdef PTRACE_GETREGS
-#define UM_HAVE_GETREGS
-#endif
-
-#ifdef PTRACE_SETREGS
-#define UM_HAVE_SETREGS
-#endif
-
-#ifdef PTRACE_GETFPREGS
-#define UM_HAVE_GETFPREGS
-#endif
-
-#ifdef PTRACE_SETFPREGS
-#define UM_HAVE_SETFPREGS
-#endif
-
-#ifdef PTRACE_GETFPXREGS
-#define UM_HAVE_GETFPXREGS
-#endif
-
-#ifdef PTRACE_SETFPXREGS
-#define UM_HAVE_SETFPXREGS
-#endif
#endif
diff --git a/arch/um/include/sysdep-i386/sigcontext.h b/arch/um/include/sysdep-i386/sigcontext.h
index 67e77122aa45..f583c87111a0 100644
--- a/arch/um/include/sysdep-i386/sigcontext.h
+++ b/arch/um/include/sysdep-i386/sigcontext.h
@@ -10,7 +10,7 @@
#define IP_RESTART_SYSCALL(ip) ((ip) -= 2)
-#define GET_FAULTINFO_FROM_SC(fi,sc) \
+#define GET_FAULTINFO_FROM_SC(fi, sc) \
{ \
(fi).cr2 = SC_CR2(sc); \
(fi).error_code = SC_ERR(sc); \
diff --git a/arch/um/include/sysdep-x86_64/ptrace_user.h b/arch/um/include/sysdep-x86_64/ptrace_user.h
index 45c0bd881cb3..4dbccdb58f48 100644
--- a/arch/um/include/sysdep-x86_64/ptrace_user.h
+++ b/arch/um/include/sysdep-x86_64/ptrace_user.h
@@ -48,7 +48,8 @@
#define PT_ORIG_RAX_OFFSET (ORIG_RAX)
#define PT_ORIG_RAX(regs) ((regs)[PT_INDEX(ORIG_RAX)])
-/* x86_64 FC3 doesn't define this in /usr/include/linux/ptrace.h even though
+/*
+ * x86_64 FC3 doesn't define this in /usr/include/linux/ptrace.h even though
* it's defined in the kernel's include/linux/ptrace.h. Additionally, use the
* 2.4 name and value for 2.4 host compatibility.
*/
@@ -56,7 +57,8 @@
#define PTRACE_OLDSETOPTIONS 21
#endif
-/* These are before the system call, so the system call number is RAX
+/*
+ * These are before the system call, so the system call number is RAX
* rather than ORIG_RAX, and arg4 is R10 rather than RCX
*/
#define REGS_SYSCALL_NR PT_INDEX(RAX)
@@ -73,14 +75,3 @@
#define FP_SIZE (HOST_FP_SIZE)
#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff --git a/arch/um/include/um_malloc.h b/arch/um/include/um_malloc.h
index 0ad17cb83d96..c554d706d106 100644
--- a/arch/um/include/um_malloc.h
+++ b/arch/um/include/um_malloc.h
@@ -8,15 +8,12 @@
#include "kern_constants.h"
-extern void *__kmalloc(int size, int flags);
-static inline void *kmalloc(int size, int flags)
-{
- return __kmalloc(size, flags);
-}
-
+extern void *uml_kmalloc(int size, int flags);
extern void kfree(const void *ptr);
extern void *vmalloc(unsigned long size);
extern void vfree(void *ptr);
#endif /* __UM_MALLOC_H__ */
+
+
diff --git a/arch/um/kernel/dyn.lds.S b/arch/um/kernel/dyn.lds.S
index 26090b7f323e..9975e1ab44fb 100644
--- a/arch/um/kernel/dyn.lds.S
+++ b/arch/um/kernel/dyn.lds.S
@@ -1,4 +1,5 @@
#include <asm-generic/vmlinux.lds.h>
+#include <asm/page.h>
OUTPUT_FORMAT(ELF_FORMAT)
OUTPUT_ARCH(ELF_ARCH)
@@ -21,7 +22,7 @@ SECTIONS
_einittext = .;
}
- . = ALIGN(4096);
+ . = ALIGN(PAGE_SIZE);
/* Read-only sections, merged into text segment: */
.hash : { *(.hash) }
@@ -68,9 +69,9 @@ SECTIONS
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
- . = ALIGN(4096);
+ . = ALIGN(PAGE_SIZE);
} =0x90909090
- . = ALIGN(4096);
+ . = ALIGN(PAGE_SIZE);
.syscall_stub : {
__syscall_stub_start = .;
*(.__syscall_stub*)
diff --git a/arch/um/kernel/mem.c b/arch/um/kernel/mem.c
index 2eea1ff235e6..b0ee64622ff7 100644
--- a/arch/um/kernel/mem.c
+++ b/arch/um/kernel/mem.c
@@ -375,3 +375,8 @@ pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
return pmd;
}
#endif
+
+void *uml_kmalloc(int size, int flags)
+{
+ return kmalloc(size, flags);
+}
diff --git a/arch/um/kernel/time.c b/arch/um/kernel/time.c
index 0d0cea2ac98d..c3e2f369c33c 100644
--- a/arch/um/kernel/time.c
+++ b/arch/um/kernel/time.c
@@ -75,7 +75,7 @@ static irqreturn_t um_timer(int irq, void *dev)
static cycle_t itimer_read(void)
{
- return os_nsecs();
+ return os_nsecs() / 1000;
}
static struct clocksource itimer_clocksource = {
@@ -83,7 +83,7 @@ static struct clocksource itimer_clocksource = {
.rating = 300,
.read = itimer_read,
.mask = CLOCKSOURCE_MASK(64),
- .mult = 1,
+ .mult = 1000,
.shift = 0,
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c
index 56deed623446..9db85b2ce698 100644
--- a/arch/um/kernel/um_arch.c
+++ b/arch/um/kernel/um_arch.c
@@ -150,7 +150,7 @@ __uml_setup("root=", uml_root_setup,
static int __init no_skas_debug_setup(char *line, int *add)
{
printf("'debug' is not necessary to gdb UML in skas mode - run \n");
- printf("'gdb linux'");
+ printf("'gdb linux'\n");
return 0;
}
@@ -258,6 +258,7 @@ int __init linux_main(int argc, char **argv)
{
unsigned long avail, diff;
unsigned long virtmem_size, max_physmem;
+ unsigned long stack;
unsigned int i;
int add;
char * mode;
@@ -348,7 +349,9 @@ int __init linux_main(int argc, char **argv)
}
virtmem_size = physmem_size;
- avail = TASK_SIZE - start_vm;
+ stack = (unsigned long) argv;
+ stack &= ~(1024 * 1024 - 1);
+ avail = stack - start_vm;
if (physmem_size > avail)
virtmem_size = avail;
end_vm = start_vm + virtmem_size;
diff --git a/arch/um/kernel/uml.lds.S b/arch/um/kernel/uml.lds.S
index 5828c1d54505..11b835248b86 100644
--- a/arch/um/kernel/uml.lds.S
+++ b/arch/um/kernel/uml.lds.S
@@ -1,4 +1,5 @@
#include <asm-generic/vmlinux.lds.h>
+#include <asm/page.h>
OUTPUT_FORMAT(ELF_FORMAT)
OUTPUT_ARCH(ELF_ARCH)
@@ -26,7 +27,7 @@ SECTIONS
INIT_TEXT
_einittext = .;
}
- . = ALIGN(4096);
+ . = ALIGN(PAGE_SIZE);
.text :
{
@@ -39,7 +40,7 @@ SECTIONS
*(.gnu.linkonce.t*)
}
- . = ALIGN(4096);
+ . = ALIGN(PAGE_SIZE);
.syscall_stub : {
__syscall_stub_start = .;
*(.__syscall_stub*)
@@ -79,7 +80,7 @@ SECTIONS
.sdata : { *(.sdata) }
_edata = .;
PROVIDE (edata = .);
- . = ALIGN(0x1000);
+ . = ALIGN(PAGE_SIZE);
.sbss :
{
__bss_start = .;
diff --git a/arch/um/os-Linux/drivers/ethertap_user.c b/arch/um/os-Linux/drivers/ethertap_user.c
index 6fb0b174f538..cc72cb2c1af6 100644
--- a/arch/um/os-Linux/drivers/ethertap_user.c
+++ b/arch/um/os-Linux/drivers/ethertap_user.c
@@ -52,7 +52,7 @@ static void etap_change(int op, unsigned char *addr, unsigned char *netmask,
return;
}
- output = kmalloc(UM_KERN_PAGE_SIZE, UM_GFP_KERNEL);
+ output = uml_kmalloc(UM_KERN_PAGE_SIZE, UM_GFP_KERNEL);
if (output == NULL)
printk(UM_KERN_ERR "etap_change : Failed to allocate output "
"buffer\n");
@@ -165,7 +165,7 @@ static int etap_open(void *data)
err = etap_tramp(pri->dev_name, pri->gate_addr, control_fds[0],
control_fds[1], data_fds[0], data_fds[1]);
output_len = UM_KERN_PAGE_SIZE;
- output = kmalloc(output_len, UM_GFP_KERNEL);
+ output = uml_kmalloc(output_len, UM_GFP_KERNEL);
read_output(control_fds[0], output, output_len);
if (output == NULL)
diff --git a/arch/um/os-Linux/helper.c b/arch/um/os-Linux/helper.c
index f25c29a12d00..74ca7aabf4e1 100644
--- a/arch/um/os-Linux/helper.c
+++ b/arch/um/os-Linux/helper.c
@@ -71,8 +71,8 @@ int run_helper(void (*pre_exec)(void *), void *pre_data, char **argv)
data.pre_data = pre_data;
data.argv = argv;
data.fd = fds[1];
- data.buf = __cant_sleep() ? kmalloc(PATH_MAX, UM_GFP_ATOMIC) :
- kmalloc(PATH_MAX, UM_GFP_KERNEL);
+ data.buf = __cant_sleep() ? uml_kmalloc(PATH_MAX, UM_GFP_ATOMIC) :
+ uml_kmalloc(PATH_MAX, UM_GFP_KERNEL);
pid = clone(helper_child, (void *) sp, CLONE_VM, &data);
if (pid < 0) {
ret = -errno;
diff --git a/arch/um/os-Linux/main.c b/arch/um/os-Linux/main.c
index abb9b0ffd960..eee69b9f52c9 100644
--- a/arch/um/os-Linux/main.c
+++ b/arch/um/os-Linux/main.c
@@ -199,7 +199,7 @@ void *__wrap_malloc(int size)
return __real_malloc(size);
else if (size <= UM_KERN_PAGE_SIZE)
/* finding contiguous pages can be hard*/
- ret = kmalloc(size, UM_GFP_KERNEL);
+ ret = uml_kmalloc(size, UM_GFP_KERNEL);
else ret = vmalloc(size);
/*
diff --git a/arch/um/os-Linux/sigio.c b/arch/um/os-Linux/sigio.c
index abf47a7c4abd..eb8f2e4be192 100644
--- a/arch/um/os-Linux/sigio.c
+++ b/arch/um/os-Linux/sigio.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
+ * Copyright (C) 2002 - 2008 Jeff Dike (jdike@{addtoit,linux.intel}.com)
* Licensed under the GPL
*/
@@ -15,6 +15,7 @@
#include "kern_util.h"
#include "init.h"
#include "os.h"
+#include "process.h"
#include "sigio.h"
#include "um_malloc.h"
#include "user.h"
@@ -109,7 +110,7 @@ static int need_poll(struct pollfds *polls, int n)
if (n <= polls->size)
return 0;
- new = kmalloc(n * sizeof(struct pollfd), UM_GFP_ATOMIC);
+ new = uml_kmalloc(n * sizeof(struct pollfd), UM_GFP_ATOMIC);
if (new == NULL) {
printk(UM_KERN_ERR "need_poll : failed to allocate new "
"pollfds\n");
@@ -243,7 +244,7 @@ static struct pollfd *setup_initial_poll(int fd)
{
struct pollfd *p;
- p = kmalloc(sizeof(struct pollfd), UM_GFP_KERNEL);
+ p = uml_kmalloc(sizeof(struct pollfd), UM_GFP_KERNEL);
if (p == NULL) {
printk(UM_KERN_ERR "setup_initial_poll : failed to allocate "
"poll\n");
@@ -338,20 +339,10 @@ out_close1:
close(l_write_sigio_fds[1]);
}
-/* Changed during early boot */
-static int pty_output_sigio = 0;
-static int pty_close_sigio = 0;
-
-void maybe_sigio_broken(int fd, int read)
+void sigio_broken(int fd, int read)
{
int err;
- if (!isatty(fd))
- return;
-
- if ((read || pty_output_sigio) && (!read || pty_close_sigio))
- return;
-
write_sigio_workaround();
sigio_lock();
@@ -370,6 +361,21 @@ out:
sigio_unlock();
}
+/* Changed during early boot */
+static int pty_output_sigio;
+static int pty_close_sigio;
+
+void maybe_sigio_broken(int fd, int read)
+{
+ if (!isatty(fd))
+ return;
+
+ if ((read || pty_output_sigio) && (!read || pty_close_sigio))
+ return;
+
+ sigio_broken(fd, read);
+}
+
static void sigio_cleanup(void)
{
if (write_sigio_pid == -1)
@@ -383,7 +389,7 @@ static void sigio_cleanup(void)
__uml_exitcall(sigio_cleanup);
/* Used as a flag during SIGIO testing early in boot */
-static volatile int got_sigio = 0;
+static int got_sigio;
static void __init handler(int sig)
{
@@ -498,7 +504,8 @@ static void tty_output(int master, int slave)
if (errno != EAGAIN)
printk(UM_KERN_ERR "tty_output : write failed, errno = %d\n",
errno);
- while (((n = read(slave, buf, sizeof(buf))) > 0) && !got_sigio)
+ while (((n = read(slave, buf, sizeof(buf))) > 0) &&
+ !({ barrier(); got_sigio; }))
;
if (got_sigio) {
diff --git a/arch/um/os-Linux/signal.c b/arch/um/os-Linux/signal.c
index 3f1694b134cb..5aade6027e40 100644
--- a/arch/um/os-Linux/signal.c
+++ b/arch/um/os-Linux/signal.c
@@ -12,6 +12,7 @@
#include "as-layout.h"
#include "kern_util.h"
#include "os.h"
+#include "process.h"
#include "sysdep/barrier.h"
#include "sysdep/sigcontext.h"
#include "user.h"
diff --git a/arch/um/os-Linux/skas/process.c b/arch/um/os-Linux/skas/process.c
index 1e8cba6550a9..6be028ca1817 100644
--- a/arch/um/os-Linux/skas/process.c
+++ b/arch/um/os-Linux/skas/process.c
@@ -442,7 +442,7 @@ void userspace(struct uml_pt_regs *regs)
unblock_signals();
break;
default:
- printk(UM_KERN_ERR "userspace - child stopped "
+ printk(UM_KERN_ERR "userspace - child stopped "
"with signal %d\n", sig);
fatal_sigsegv();
}
diff --git a/arch/um/os-Linux/start_up.c b/arch/um/os-Linux/start_up.c
index 997d01944f91..b4b36e0f2e89 100644
--- a/arch/um/os-Linux/start_up.c
+++ b/arch/um/os-Linux/start_up.c
@@ -23,6 +23,7 @@
#include "mem_user.h"
#include "ptrace_user.h"
#include "registers.h"
+#include "skas.h"
#include "skas_ptrace.h"
static void ptrace_child(void)
@@ -140,14 +141,27 @@ static int stop_ptraced_child(int pid, int exitcode, int mustexit)
}
/* Changed only during early boot */
-int ptrace_faultinfo = 1;
-int ptrace_ldt = 1;
-int proc_mm = 1;
-int skas_needs_stub = 0;
+int ptrace_faultinfo;
+static int disable_ptrace_faultinfo;
+
+int ptrace_ldt;
+static int disable_ptrace_ldt;
+
+int proc_mm;
+static int disable_proc_mm;
+
+int have_switch_mm;
+static int disable_switch_mm;
+
+int skas_needs_stub;
static int __init skas0_cmd_param(char *str, int* add)
{
- ptrace_faultinfo = proc_mm = 0;
+ disable_ptrace_faultinfo = 1;
+ disable_ptrace_ldt = 1;
+ disable_proc_mm = 1;
+ disable_switch_mm = 1;
+
return 0;
}
@@ -157,15 +171,12 @@ static int __init mode_skas0_cmd_param(char *str, int* add)
__attribute__((alias("skas0_cmd_param")));
__uml_setup("skas0", skas0_cmd_param,
- "skas0\n"
- " Disables SKAS3 usage, so that SKAS0 is used, unless \n"
- " you specify mode=tt.\n\n");
+"skas0\n"
+" Disables SKAS3 and SKAS4 usage, so that SKAS0 is used\n\n");
__uml_setup("mode=skas0", mode_skas0_cmd_param,
- "mode=skas0\n"
- " Disables SKAS3 usage, so that SKAS0 is used, unless you \n"
- " specify mode=tt. Note that this was recently added - on \n"
- " older kernels you must use simply \"skas0\".\n\n");
+"mode=skas0\n"
+" Disables SKAS3 and SKAS4 usage, so that SKAS0 is used.\n\n");
/* Changed only during early boot */
static int force_sysemu_disabled = 0;
@@ -360,7 +371,7 @@ void __init os_early_checks(void)
static int __init noprocmm_cmd_param(char *str, int* add)
{
- proc_mm = 0;
+ disable_proc_mm = 1;
return 0;
}
@@ -372,7 +383,7 @@ __uml_setup("noprocmm", noprocmm_cmd_param,
static int __init noptracefaultinfo_cmd_param(char *str, int* add)
{
- ptrace_faultinfo = 0;
+ disable_ptrace_faultinfo = 1;
return 0;
}
@@ -384,7 +395,7 @@ __uml_setup("noptracefaultinfo", noptracefaultinfo_cmd_param,
static int __init noptraceldt_cmd_param(char *str, int* add)
{
- ptrace_ldt = 0;
+ disable_ptrace_ldt = 1;
return 0;
}
@@ -404,17 +415,15 @@ static inline void check_skas3_ptrace_faultinfo(void)
n = ptrace(PTRACE_FAULTINFO, pid, 0, &fi);
if (n < 0) {
- ptrace_faultinfo = 0;
if (errno == EIO)
non_fatal("not found\n");
else
perror("not found");
- }
+ } else if (disable_ptrace_faultinfo)
+ non_fatal("found but disabled on command line\n");
else {
- if (!ptrace_faultinfo)
- non_fatal("found but disabled on command line\n");
- else
- non_fatal("found\n");
+ ptrace_faultinfo = 1;
+ non_fatal("found\n");
}
stop_ptraced_child(pid, 1, 1);
@@ -437,38 +446,30 @@ static inline void check_skas3_ptrace_ldt(void)
if (n < 0) {
if (errno == EIO)
non_fatal("not found\n");
- else {
+ else
perror("not found");
- }
- ptrace_ldt = 0;
- }
+ } else if (disable_ptrace_ldt)
+ non_fatal("found, but use is disabled\n");
else {
- if (ptrace_ldt)
- non_fatal("found\n");
- else
- non_fatal("found, but use is disabled\n");
+ ptrace_ldt = 1;
+ non_fatal("found\n");
}
stop_ptraced_child(pid, 1, 1);
-#else
- /* PTRACE_LDT might be disabled via cmdline option.
- * We want to override this, else we might use the stub
- * without real need
- */
- ptrace_ldt = 1;
#endif
}
static inline void check_skas3_proc_mm(void)
{
non_fatal(" - /proc/mm...");
- if (access("/proc/mm", W_OK) < 0) {
- proc_mm = 0;
+ if (access("/proc/mm", W_OK) < 0)
perror("not found");
- }
- else if (!proc_mm)
+ else if (disable_proc_mm)
non_fatal("found but disabled on command line\n");
- else non_fatal("found\n");
+ else {
+ proc_mm = 1;
+ non_fatal("found\n");
+ }
}
void can_do_skas(void)
diff --git a/arch/um/os-Linux/sys-i386/registers.c b/arch/um/os-Linux/sys-i386/registers.c
index b613473b3ec1..c6183e7aec3d 100644
--- a/arch/um/os-Linux/sys-i386/registers.c
+++ b/arch/um/os-Linux/sys-i386/registers.c
@@ -5,6 +5,7 @@
*/
#include <errno.h>
+#include <asm/user.h>
#include "kern_constants.h"
#include "longjmp.h"
#include "user.h"
@@ -74,10 +75,10 @@ int put_fp_registers(int pid, unsigned long *regs)
void arch_init_registers(int pid)
{
- unsigned long fpx_regs[HOST_XFP_SIZE];
+ struct user_fxsr_struct fpx_regs;
int err;
- err = ptrace(PTRACE_GETFPXREGS, pid, 0, fpx_regs);
+ err = ptrace(PTRACE_GETFPXREGS, pid, 0, &fpx_regs);
if (!err)
return;
diff --git a/arch/um/os-Linux/time.c b/arch/um/os-Linux/time.c
index e49280599465..bee98f466d66 100644
--- a/arch/um/os-Linux/time.c
+++ b/arch/um/os-Linux/time.c
@@ -9,7 +9,9 @@
#include <time.h>
#include <sys/time.h>
#include "kern_constants.h"
+#include "kern_util.h"
#include "os.h"
+#include "process.h"
#include "user.h"
int set_interval(void)
@@ -58,12 +60,17 @@ static inline long long timeval_to_ns(const struct timeval *tv)
long long disable_timer(void)
{
struct itimerval time = ((struct itimerval) { { 0, 0 }, { 0, 0 } });
+ int remain, max = UM_NSEC_PER_SEC / UM_HZ;
if (setitimer(ITIMER_VIRTUAL, &time, &time) < 0)
printk(UM_KERN_ERR "disable_timer - setitimer failed, "
"errno = %d\n", errno);
- return timeval_to_ns(&time.it_value);
+ remain = timeval_to_ns(&time.it_value);
+ if (remain > max)
+ remain = max;
+
+ return remain;
}
long long os_nsecs(void)
@@ -79,7 +86,44 @@ static int after_sleep_interval(struct timespec *ts)
{
return 0;
}
+
+static void deliver_alarm(void)
+{
+ alarm_handler(SIGVTALRM, NULL);
+}
+
+static unsigned long long sleep_time(unsigned long long nsecs)
+{
+ return nsecs;
+}
+
#else
+unsigned long long last_tick;
+unsigned long long skew;
+
+static void deliver_alarm(void)
+{
+ unsigned long long this_tick = os_nsecs();
+ int one_tick = UM_NSEC_PER_SEC / UM_HZ;
+
+ if (last_tick == 0)
+ last_tick = this_tick - one_tick;
+
+ skew += this_tick - last_tick;
+
+ while (skew >= one_tick) {
+ alarm_handler(SIGVTALRM, NULL);
+ skew -= one_tick;
+ }
+
+ last_tick = this_tick;
+}
+
+static unsigned long long sleep_time(unsigned long long nsecs)
+{
+ return nsecs > skew ? nsecs - skew : 0;
+}
+
static inline long long timespec_to_us(const struct timespec *ts)
{
return ((long long) ts->tv_sec * UM_USEC_PER_SEC) +
@@ -102,6 +146,8 @@ static int after_sleep_interval(struct timespec *ts)
*/
if (start_usecs > usec)
start_usecs = usec;
+
+ start_usecs -= skew / UM_NSEC_PER_USEC;
tv = ((struct timeval) { .tv_sec = start_usecs / UM_USEC_PER_SEC,
.tv_usec = start_usecs % UM_USEC_PER_SEC });
interval = ((struct itimerval) { { 0, usec }, tv });
@@ -113,8 +159,6 @@ static int after_sleep_interval(struct timespec *ts)
}
#endif
-extern void alarm_handler(int sig, struct sigcontext *sc);
-
void idle_sleep(unsigned long long nsecs)
{
struct timespec ts;
@@ -126,10 +170,12 @@ void idle_sleep(unsigned long long nsecs)
*/
if (nsecs == 0)
nsecs = UM_NSEC_PER_SEC / UM_HZ;
+
+ nsecs = sleep_time(nsecs);
ts = ((struct timespec) { .tv_sec = nsecs / UM_NSEC_PER_SEC,
.tv_nsec = nsecs % UM_NSEC_PER_SEC });
if (nanosleep(&ts, &ts) == 0)
- alarm_handler(SIGVTALRM, NULL);
+ deliver_alarm();
after_sleep_interval(&ts);
}
diff --git a/arch/um/sys-i386/ptrace.c b/arch/um/sys-i386/ptrace.c
index 6b4499906a6c..c9b176534d65 100644
--- a/arch/um/sys-i386/ptrace.c
+++ b/arch/um/sys-i386/ptrace.c
@@ -148,14 +148,13 @@ int peek_user(struct task_struct *child, long addr, long data)
int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
{
int err, n, cpu = ((struct thread_info *) child->stack)->cpu;
- long fpregs[HOST_FP_SIZE];
+ struct user_i387_struct fpregs;
- BUG_ON(sizeof(*buf) != sizeof(fpregs));
- err = save_fp_registers(userspace_pid[cpu], fpregs);
+ err = save_fp_registers(userspace_pid[cpu], (unsigned long *) &fpregs);
if (err)
return err;
- n = copy_to_user(buf, fpregs, sizeof(fpregs));
+ n = copy_to_user(buf, &fpregs, sizeof(fpregs));
if(n > 0)
return -EFAULT;
@@ -165,27 +164,26 @@ int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
int set_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
{
int n, cpu = ((struct thread_info *) child->stack)->cpu;
- long fpregs[HOST_FP_SIZE];
+ struct user_i387_struct fpregs;
- BUG_ON(sizeof(*buf) != sizeof(fpregs));
- n = copy_from_user(fpregs, buf, sizeof(fpregs));
+ n = copy_from_user(&fpregs, buf, sizeof(fpregs));
if (n > 0)
return -EFAULT;
- return restore_fp_registers(userspace_pid[cpu], fpregs);
+ return restore_fp_registers(userspace_pid[cpu],
+ (unsigned long *) &fpregs);
}
int get_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
{
int err, n, cpu = ((struct thread_info *) child->stack)->cpu;
- long fpregs[HOST_XFP_SIZE];
+ struct user_fxsr_struct fpregs;
- BUG_ON(sizeof(*buf) != sizeof(fpregs));
- err = save_fpx_registers(userspace_pid[cpu], fpregs);
+ err = save_fpx_registers(userspace_pid[cpu], (unsigned long *) &fpregs);
if (err)
return err;
- n = copy_to_user(buf, fpregs, sizeof(fpregs));
+ n = copy_to_user(buf, &fpregs, sizeof(fpregs));
if(n > 0)
return -EFAULT;
@@ -195,14 +193,14 @@ int get_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
int set_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
{
int n, cpu = ((struct thread_info *) child->stack)->cpu;
- long fpregs[HOST_XFP_SIZE];
+ struct user_fxsr_struct fpregs;
- BUG_ON(sizeof(*buf) != sizeof(fpregs));
- n = copy_from_user(fpregs, buf, sizeof(fpregs));
+ n = copy_from_user(&fpregs, buf, sizeof(fpregs));
if (n > 0)
return -EFAULT;
- return restore_fpx_registers(userspace_pid[cpu], fpregs);
+ return restore_fpx_registers(userspace_pid[cpu],
+ (unsigned long *) &fpregs);
}
long subarch_ptrace(struct task_struct *child, long request, long addr,
diff --git a/arch/um/sys-i386/user-offsets.c b/arch/um/sys-i386/user-offsets.c
index 39bd32bf84f0..5f883bfe773f 100644
--- a/arch/um/sys-i386/user-offsets.c
+++ b/arch/um/sys-i386/user-offsets.c
@@ -22,7 +22,7 @@ void foo(void)
OFFSET(HOST_SC_CR2, sigcontext, cr2);
DEFINE_LONGS(HOST_FP_SIZE, sizeof(struct user_fpregs_struct));
- DEFINE_LONGS(HOST_XFP_SIZE, sizeof(struct user_fpxregs_struct));
+ DEFINE_LONGS(HOST_FPX_SIZE, sizeof(struct user_fpxregs_struct));
DEFINE(HOST_IP, EIP);
DEFINE(HOST_SP, UESP);
diff --git a/arch/um/sys-x86_64/user-offsets.c b/arch/um/sys-x86_64/user-offsets.c
index 2f3443c6e859..973585414a66 100644
--- a/arch/um/sys-x86_64/user-offsets.c
+++ b/arch/um/sys-x86_64/user-offsets.c
@@ -24,7 +24,6 @@ void foo(void)
OFFSET(HOST_SC_TRAPNO, sigcontext, trapno);
DEFINE(HOST_FP_SIZE, sizeof(struct _fpstate) / sizeof(unsigned long));
- DEFINE(HOST_XFP_SIZE, 0);
DEFINE_LONGS(HOST_RBX, RBX);
DEFINE_LONGS(HOST_RCX, RCX);
DEFINE_LONGS(HOST_RDI, RDI);
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 845ea2b2d487..fe361ae7ef2f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -18,6 +18,7 @@ config X86_64
### Arch settings
config X86
def_bool y
+ select HAVE_UNSTABLE_SCHED_CLOCK
select HAVE_IDE
select HAVE_OPROFILE
select HAVE_KPROBES
@@ -334,6 +335,7 @@ config X86_RDC321X
select GENERIC_GPIO
select LEDS_CLASS
select LEDS_GPIO
+ select NEW_LEDS
help
This option is needed for RDC R-321x system-on-chip, also known
as R-8610-(G).
@@ -1661,7 +1663,6 @@ config GEODE_MFGPT_TIMER
config OLPC
bool "One Laptop Per Child support"
- depends on MGEODE_LX
default n
help
Add support for detecting the unique features of the OLPC
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index bbdacb398d48..5e618c3b4720 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -83,9 +83,7 @@ obj-$(CONFIG_KVM_GUEST) += kvm.o
obj-$(CONFIG_KVM_CLOCK) += kvmclock.o
obj-$(CONFIG_PARAVIRT) += paravirt.o paravirt_patch_$(BITS).o
-ifdef CONFIG_INPUT_PCSPKR
-obj-y += pcspeaker.o
-endif
+obj-$(CONFIG_PCSPKR_PLATFORM) += pcspeaker.o
obj-$(CONFIG_SCx200) += scx200.o
scx200-y += scx200_32.o
diff --git a/arch/x86/kernel/acpi/realmode/wakeup.lds.S b/arch/x86/kernel/acpi/realmode/wakeup.lds.S
index 22fab6c4be15..7da00b799cda 100644
--- a/arch/x86/kernel/acpi/realmode/wakeup.lds.S
+++ b/arch/x86/kernel/acpi/realmode/wakeup.lds.S
@@ -12,11 +12,6 @@ ENTRY(_start)
SECTIONS
{
- . = HEADER_OFFSET;
- .header : {
- *(.header)
- }
-
. = 0;
.text : {
*(.text*)
@@ -50,6 +45,11 @@ SECTIONS
__bss_end = .;
}
+ . = HEADER_OFFSET;
+ .header : {
+ *(.header)
+ }
+
. = ALIGN(16);
_end = .;
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 238468ae1993..c2e1ce33c7cb 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -6,6 +6,7 @@
#include <linux/cpu.h>
+#include <asm/pat.h>
#include <asm/processor.h>
struct cpuid_bit {
@@ -48,3 +49,23 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
set_cpu_cap(c, cb->feature);
}
}
+
+#ifdef CONFIG_X86_PAT
+void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
+{
+ switch (c->x86_vendor) {
+ case X86_VENDOR_AMD:
+ if (c->x86 >= 0xf && c->x86 <= 0x11)
+ return;
+ break;
+ case X86_VENDOR_INTEL:
+ if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+ return;
+ break;
+ }
+
+ pat_disable(cpu_has_pat ?
+ "PAT disabled. Not yet verified on this CPU type." :
+ "PAT not supported by CPU.");
+}
+#endif
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 35b4f6a9c8ef..d0463a946247 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -12,6 +12,7 @@
#include <asm/mmu_context.h>
#include <asm/mtrr.h>
#include <asm/mce.h>
+#include <asm/pat.h>
#ifdef CONFIG_X86_LOCAL_APIC
#include <asm/mpspec.h>
#include <asm/apic.h>
@@ -308,19 +309,6 @@ static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
}
- clear_cpu_cap(c, X86_FEATURE_PAT);
-
- switch (c->x86_vendor) {
- case X86_VENDOR_AMD:
- if (c->x86 >= 0xf && c->x86 <= 0x11)
- set_cpu_cap(c, X86_FEATURE_PAT);
- break;
- case X86_VENDOR_INTEL:
- if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
- set_cpu_cap(c, X86_FEATURE_PAT);
- break;
- }
-
}
/*
@@ -409,18 +397,6 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
init_scattered_cpuid_features(c);
}
- clear_cpu_cap(c, X86_FEATURE_PAT);
-
- switch (c->x86_vendor) {
- case X86_VENDOR_AMD:
- if (c->x86 >= 0xf && c->x86 <= 0x11)
- set_cpu_cap(c, X86_FEATURE_PAT);
- break;
- case X86_VENDOR_INTEL:
- if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
- set_cpu_cap(c, X86_FEATURE_PAT);
- break;
- }
}
static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
@@ -651,6 +627,7 @@ void __init early_cpu_init(void)
cpu_devs[cvdev->vendor] = cvdev->cpu_dev;
early_cpu_detect();
+ validate_pat_support(&boot_cpu_data);
}
/* Make sure %fs is initialized properly in idle threads */
diff --git a/arch/x86/kernel/geode_32.c b/arch/x86/kernel/geode_32.c
index 9dad6ca6cd70..e8edd63ab000 100644
--- a/arch/x86/kernel/geode_32.c
+++ b/arch/x86/kernel/geode_32.c
@@ -161,6 +161,25 @@ void geode_gpio_setup_event(unsigned int gpio, int pair, int pme)
}
EXPORT_SYMBOL_GPL(geode_gpio_setup_event);
+int geode_has_vsa2(void)
+{
+ static int has_vsa2 = -1;
+
+ if (has_vsa2 == -1) {
+ /*
+ * The VSA has virtual registers that we can query for a
+ * signature.
+ */
+ outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
+ outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
+
+ has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG);
+ }
+
+ return has_vsa2;
+}
+EXPORT_SYMBOL_GPL(geode_has_vsa2);
+
static int __init geode_southbridge_init(void)
{
if (!is_geode())
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index db6839b53195..e03cc952f233 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -450,7 +450,6 @@ static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
{
struct task_struct *tsk = current;
- clear_fpu(tsk);
return __copy_from_user(&tsk->thread.xstate->fsave, buf,
sizeof(struct i387_fsave_struct));
}
@@ -461,7 +460,6 @@ static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
struct user_i387_ia32_struct env;
int err;
- clear_fpu(tsk);
err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
sizeof(struct i387_fxsave_struct));
/* mxcsr reserved bits must be masked to zero for security reasons */
@@ -478,6 +476,16 @@ int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
int err;
if (HAVE_HWFP) {
+ struct task_struct *tsk = current;
+
+ clear_fpu(tsk);
+
+ if (!used_math()) {
+ err = init_fpu(tsk);
+ if (err)
+ return err;
+ }
+
if (cpu_has_fxsr)
err = restore_i387_fxsave(buf);
else
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 0c37f16b6950..c5ef1af8e79d 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -385,11 +385,13 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
if (dma_alloc_from_coherent_mem(dev, size, dma_handle, &memory))
return memory;
- if (!dev)
+ if (!dev) {
dev = &fallback_dev;
+ gfp |= GFP_DMA;
+ }
dma_mask = dev->coherent_dma_mask;
if (dma_mask == 0)
- dma_mask = DMA_32BIT_MASK;
+ dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;
/* Device not DMA able */
if (dev->dma_mask == NULL)
@@ -403,7 +405,7 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
larger than 16MB and in this case we have a chance of
finding fitting memory in the next higher zone first. If
not retry with true GFP_DMA. -AK */
- if (dma_mask <= DMA_32BIT_MASK)
+ if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
gfp |= GFP_DMA32;
#endif
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index fb03ef380f0e..a7835f282936 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -1303,6 +1303,9 @@ static const struct user_regset_view user_x86_64_view = {
#define genregs32_get genregs_get
#define genregs32_set genregs_set
+#define user_i387_ia32_struct user_i387_struct
+#define user32_fxsr_struct user_fxsr_struct
+
#endif /* CONFIG_X86_64 */
#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
@@ -1315,13 +1318,13 @@ static const struct user_regset x86_32_regsets[] = {
},
[REGSET_FP] = {
.core_note_type = NT_PRFPREG,
- .n = sizeof(struct user_i387_struct) / sizeof(u32),
+ .n = sizeof(struct user_i387_ia32_struct) / sizeof(u32),
.size = sizeof(u32), .align = sizeof(u32),
.active = fpregs_active, .get = fpregs_get, .set = fpregs_set
},
[REGSET_XFP] = {
.core_note_type = NT_PRXFPREG,
- .n = sizeof(struct user_i387_struct) / sizeof(u32),
+ .n = sizeof(struct user32_fxsr_struct) / sizeof(u32),
.size = sizeof(u32), .align = sizeof(u32),
.active = xfpregs_active, .get = xfpregs_get, .set = xfpregs_set
},
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index cc6f5eb20b24..6f80b852a196 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -12,6 +12,7 @@
#include <asm/mpspec.h>
#include <asm/apicdef.h>
+#ifdef CONFIG_X86_LOCAL_APIC
unsigned int num_processors;
unsigned disabled_cpus __cpuinitdata;
/* Processor that is doing the boot up */
@@ -23,8 +24,9 @@ EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
/* Bitmask of physically existing CPUs */
physid_mask_t phys_cpu_present_map;
+#endif
-#if defined(CONFIG_HAVE_SETUP_PER_CPU_AREA) && defined(CONFIG_SMP)
+#if defined(CONFIG_HAVE_SETUP_PER_CPU_AREA) && defined(CONFIG_X86_SMP)
/*
* Copy data used in early init routines from the initial arrays to the
* per cpu data areas. These arrays then become expendable and the
@@ -95,7 +97,7 @@ void __init setup_per_cpu_areas(void)
/* Copy section for each CPU (we discard the original) */
size = PERCPU_ENOUGH_ROOM;
- printk(KERN_INFO "PERCPU: Allocating %zd bytes of per cpu data\n",
+ printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n",
size);
for_each_possible_cpu(i) {
diff --git a/arch/x86/kernel/setup_32.c b/arch/x86/kernel/setup_32.c
index 2283422af794..2c5f8b213e86 100644
--- a/arch/x86/kernel/setup_32.c
+++ b/arch/x86/kernel/setup_32.c
@@ -127,7 +127,12 @@ static struct resource standard_io_resources[] = { {
}, {
.name = "keyboard",
.start = 0x0060,
- .end = 0x006f,
+ .end = 0x0060,
+ .flags = IORESOURCE_BUSY | IORESOURCE_IO
+}, {
+ .name = "keyboard",
+ .start = 0x0064,
+ .end = 0x0064,
.flags = IORESOURCE_BUSY | IORESOURCE_IO
}, {
.name = "dma page reg",
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 22c14e21c97c..6dff1286ad8a 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -70,6 +70,7 @@
#include <asm/ds.h>
#include <asm/topology.h>
#include <asm/trampoline.h>
+#include <asm/pat.h>
#include <mach_apic.h>
#ifdef CONFIG_PARAVIRT
@@ -128,7 +129,9 @@ static struct resource standard_io_resources[] = {
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
{ .name = "timer1", .start = 0x50, .end = 0x53,
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
- { .name = "keyboard", .start = 0x60, .end = 0x6f,
+ { .name = "keyboard", .start = 0x60, .end = 0x60,
+ .flags = IORESOURCE_BUSY | IORESOURCE_IO },
+ { .name = "keyboard", .start = 0x64, .end = 0x64,
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
{ .name = "dma page reg", .start = 0x80, .end = 0x8f,
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
@@ -948,7 +951,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
{
if (c->x86 == 0x6 && c->x86_model >= 0xf)
- set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
+ set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
}
static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
@@ -1063,25 +1066,19 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
if (c->extended_cpuid_level >= 0x80000007)
c->x86_power = cpuid_edx(0x80000007);
-
- clear_cpu_cap(c, X86_FEATURE_PAT);
-
switch (c->x86_vendor) {
case X86_VENDOR_AMD:
early_init_amd(c);
- if (c->x86 >= 0xf && c->x86 <= 0x11)
- set_cpu_cap(c, X86_FEATURE_PAT);
break;
case X86_VENDOR_INTEL:
early_init_intel(c);
- if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
- set_cpu_cap(c, X86_FEATURE_PAT);
break;
case X86_VENDOR_CENTAUR:
early_init_centaur(c);
break;
}
+ validate_pat_support(c);
}
/*
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index 8f75893a6467..0cb7aadc87cd 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -231,7 +231,8 @@ native_smp_call_function_mask(cpumask_t mask,
wmb();
/* Send a message to other CPUs */
- if (cpus_equal(mask, allbutself))
+ if (cpus_equal(mask, allbutself) &&
+ cpus_equal(cpu_online_map, cpu_callout_map))
send_IPI_allbutself(CALL_FUNCTION_VECTOR);
else
send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 6b087ab6cd8f..38988491c622 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -86,6 +86,7 @@ void *x86_bios_cpu_apicid_early_ptr;
#ifdef CONFIG_X86_32
u8 apicid_2_node[MAX_APICID];
+static int low_mappings;
#endif
/* State of each CPU */
@@ -326,6 +327,12 @@ static void __cpuinit start_secondary(void *unused)
enable_8259A_irq(0);
}
+#ifdef CONFIG_X86_32
+ while (low_mappings)
+ cpu_relax();
+ __flush_tlb_all();
+#endif
+
/* This must be done before setting cpu_online_map */
set_cpu_sibling_map(raw_smp_processor_id());
wmb();
@@ -1040,14 +1047,20 @@ int __cpuinit native_cpu_up(unsigned int cpu)
#ifdef CONFIG_X86_32
/* init low mem mapping */
clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
- min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
+ min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
flush_tlb_all();
-#endif
+ low_mappings = 1;
err = do_boot_cpu(apicid, cpu);
- if (err < 0) {
+
+ zap_low_mappings();
+ low_mappings = 0;
+#else
+ err = do_boot_cpu(apicid, cpu);
+#endif
+ if (err) {
Dprintk("do_boot_cpu failed %d\n", err);
- return err;
+ return -EIO;
}
/*
@@ -1259,9 +1272,6 @@ void __init native_smp_cpus_done(unsigned int max_cpus)
setup_ioapic_dest();
#endif
check_nmi_watchdog();
-#ifdef CONFIG_X86_32
- zap_low_mappings();
-#endif
}
#ifdef CONFIG_HOTPLUG_CPU
diff --git a/arch/x86/kernel/x8664_ksyms_64.c b/arch/x86/kernel/x8664_ksyms_64.c
index 58882f9f2637..f6c05d0410fb 100644
--- a/arch/x86/kernel/x8664_ksyms_64.c
+++ b/arch/x86/kernel/x8664_ksyms_64.c
@@ -2,6 +2,7 @@
All C exports should go in the respective C files. */
#include <linux/module.h>
+#include <net/checksum.h>
#include <linux/smp.h>
#include <asm/processor.h>
@@ -29,6 +30,8 @@ EXPORT_SYMBOL(__copy_from_user_inatomic);
EXPORT_SYMBOL(copy_page);
EXPORT_SYMBOL(clear_page);
+EXPORT_SYMBOL(csum_partial);
+
/*
* Export string functions. We normally rely on gcc builtin for most of these,
* but gcc sometimes decides not to inline them.
diff --git a/arch/x86/lib/csum-partial_64.c b/arch/x86/lib/csum-partial_64.c
index bc503f506903..bf51144d97e1 100644
--- a/arch/x86/lib/csum-partial_64.c
+++ b/arch/x86/lib/csum-partial_64.c
@@ -136,8 +136,6 @@ __wsum csum_partial(const void *buff, int len, __wsum sum)
(__force u32)sum);
}
-EXPORT_SYMBOL(csum_partial);
-
/*
* this routine is used for miscellaneous IP-like checksums, mainly
* in icmp.c
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index de236e419cb5..ec30d10154b6 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -438,8 +438,6 @@ void zap_low_mappings(void)
{
int i;
- save_pg_dir();
-
/*
* Zap initial low-memory mappings.
*
@@ -663,16 +661,8 @@ void __init mem_init(void)
test_wp_bit();
cpa_init();
-
- /*
- * Subtle. SMP is doing it's boot stuff late (because it has to
- * fork idle threads) - but it also needs low mappings for the
- * protected-mode entry to work. We zap these entries only after
- * the WP-bit has been tested.
- */
-#ifndef CONFIG_SMP
+ save_pg_dir();
zap_low_mappings();
-#endif
}
#ifdef CONFIG_MEMORY_HOTPLUG
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 277446cd30b6..bcb1a8e4b2db 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -25,31 +25,24 @@
#include <asm/mtrr.h>
#include <asm/io.h>
-int pat_wc_enabled = 1;
+#ifdef CONFIG_X86_PAT
+int __read_mostly pat_wc_enabled = 1;
-static u64 __read_mostly boot_pat_state;
-
-static int nopat(char *str)
+void __init pat_disable(char *reason)
{
pat_wc_enabled = 0;
- printk(KERN_INFO "x86: PAT support disabled.\n");
-
- return 0;
+ printk(KERN_INFO "%s\n", reason);
}
-early_param("nopat", nopat);
-static int pat_known_cpu(void)
+static int nopat(char *str)
{
- if (!pat_wc_enabled)
- return 0;
-
- if (cpu_has_pat)
- return 1;
-
- pat_wc_enabled = 0;
- printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
+ pat_disable("PAT support disabled.");
return 0;
}
+early_param("nopat", nopat);
+#endif
+
+static u64 __read_mostly boot_pat_state;
enum {
PAT_UC = 0, /* uncached */
@@ -66,17 +59,19 @@ void pat_init(void)
{
u64 pat;
-#ifndef CONFIG_X86_PAT
- nopat(NULL);
-#endif
-
- /* Boot CPU enables PAT based on CPU feature */
- if (!smp_processor_id() && !pat_known_cpu())
+ if (!pat_wc_enabled)
return;
- /* APs enable PAT iff boot CPU has enabled it before */
- if (smp_processor_id() && !pat_wc_enabled)
- return;
+ /* Paranoia check. */
+ if (!cpu_has_pat) {
+ printk(KERN_ERR "PAT enabled, but CPU feature cleared\n");
+ /*
+ * Panic if this happens on the secondary CPU, and we
+ * switched to PAT on the boot CPU. We have no way to
+ * undo PAT.
+ */
+ BUG_ON(boot_pat_state);
+ }
/* Set PWT to Write-Combining. All other bits stay the same */
/*
@@ -95,9 +90,8 @@ void pat_init(void)
PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC);
/* Boot CPU check */
- if (!smp_processor_id()) {
+ if (!boot_pat_state)
rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
- }
wrmsrl(MSR_IA32_CR_PAT, pat);
printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
@@ -561,7 +555,7 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
"%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n",
current->comm, current->pid,
cattr_name(flags),
- offset, offset + size);
+ offset, (unsigned long long)(offset + size));
return 0;
}
@@ -582,7 +576,7 @@ void map_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
"%s:%d /dev/mem expected mapping type %s for %Lx-%Lx, got %s\n",
current->comm, current->pid,
cattr_name(want_flags),
- addr, addr + size,
+ addr, (unsigned long long)(addr + size),
cattr_name(flags));
}
}
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c
index 9ee007be9142..369cf065b6a4 100644
--- a/arch/x86/mm/pgtable_32.c
+++ b/arch/x86/mm/pgtable_32.c
@@ -172,10 +172,3 @@ void reserve_top_address(unsigned long reserve)
__FIXADDR_TOP = -reserve - PAGE_SIZE;
__VMALLOC_RESERVE += reserve;
}
-
-int pmd_bad(pmd_t pmd)
-{
- WARN_ON_ONCE(pmd_bad_v1(pmd) != pmd_bad_v2(pmd));
-
- return pmd_bad_v1(pmd);
-}
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 1a9c0c6a1a18..d95de2f199cd 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -6,45 +6,6 @@
#include <asm/numa.h>
#include "pci.h"
-static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
-{
- pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
- printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
- return 0;
-}
-
-static struct dmi_system_id acpi_pciprobe_dmi_table[] __devinitdata = {
-/*
- * Systems where PCI IO resource ISA alignment can be skipped
- * when the ISA enable bit in the bridge control is not set
- */
- {
- .callback = can_skip_ioresource_align,
- .ident = "IBM System x3800",
- .matches = {
- DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
- DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
- },
- },
- {
- .callback = can_skip_ioresource_align,
- .ident = "IBM System x3850",
- .matches = {
- DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
- DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
- },
- },
- {
- .callback = can_skip_ioresource_align,
- .ident = "IBM System x3950",
- .matches = {
- DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
- DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
- },
- },
- {}
-};
-
struct pci_root_info {
char *name;
unsigned int res_num;
@@ -196,8 +157,6 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
int pxm;
#endif
- dmi_check_system(acpi_pciprobe_dmi_table);
-
if (domain && !pci_domains_supported) {
printk(KERN_WARNING "PCI: Multiple domains not supported "
"(dom %d, bus %d)\n", domain, busnum);
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 2a4d751818b7..8545c8a9d107 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -77,17 +77,48 @@ int pcibios_scanned;
*/
DEFINE_SPINLOCK(pci_config_lock);
-static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
+static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
{
- struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
-
- if (rom_r->parent)
- return;
- if (rom_r->start)
- /* we deal with BIOS assigned ROM later */
- return;
- if (!(pci_probe & PCI_ASSIGN_ROMS))
- rom_r->start = rom_r->end = rom_r->flags = 0;
+ pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
+ printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
+ return 0;
+}
+
+static struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitdata = {
+/*
+ * Systems where PCI IO resource ISA alignment can be skipped
+ * when the ISA enable bit in the bridge control is not set
+ */
+ {
+ .callback = can_skip_ioresource_align,
+ .ident = "IBM System x3800",
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
+ },
+ },
+ {
+ .callback = can_skip_ioresource_align,
+ .ident = "IBM System x3850",
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
+ },
+ },
+ {
+ .callback = can_skip_ioresource_align,
+ .ident = "IBM System x3950",
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
+ },
+ },
+ {}
+};
+
+void __init dmi_check_skip_isa_align(void)
+{
+ dmi_check_system(can_skip_pciprobe_dmi_table);
}
/*
@@ -97,11 +128,7 @@ static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
void __devinit pcibios_fixup_bus(struct pci_bus *b)
{
- struct pci_dev *dev;
-
pci_read_bridge_bases(b);
- list_for_each_entry(dev, &b->devices, bus_list)
- pcibios_fixup_device_resources(dev);
}
/*
@@ -318,13 +345,16 @@ static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
{}
};
+void __init dmi_check_pciprobe(void)
+{
+ dmi_check_system(pciprobe_dmi_table);
+}
+
struct pci_bus * __devinit pcibios_scan_root(int busnum)
{
struct pci_bus *bus = NULL;
struct pci_sysdata *sd;
- dmi_check_system(pciprobe_dmi_table);
-
while ((bus = pci_find_next_bus(bus)) != NULL) {
if (bus->number == busnum) {
/* Already scanned */
@@ -462,6 +492,9 @@ char * __devinit pcibios_setup(char *str)
} else if (!strcmp(str, "routeirq")) {
pci_routeirq = 1;
return NULL;
+ } else if (!strcmp(str, "skip_isa_align")) {
+ pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
+ return NULL;
}
return str;
}
@@ -489,7 +522,7 @@ void pcibios_disable_device (struct pci_dev *dev)
pcibios_disable_irq(dev);
}
-struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
+struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
{
struct pci_bus *bus = NULL;
struct pci_sysdata *sd;
@@ -512,7 +545,7 @@ struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
return bus;
}
-struct pci_bus *pci_scan_bus_with_sysdata(int busno)
+struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
{
return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
}
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index b60b2abd480c..ff3a6a336342 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -502,7 +502,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SIEMENS, 0x0015,
*/
static void fam10h_pci_cfg_space_size(struct pci_dev *dev)
{
- dev->cfg_size = pci_cfg_space_size_ext(dev, 0);
+ dev->cfg_size = pci_cfg_space_size_ext(dev);
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1200, fam10h_pci_cfg_space_size);
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 8af0f0bae2af..10fb308fded8 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -301,15 +301,13 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
prot = pgprot_val(vma->vm_page_prot);
if (pat_wc_enabled && write_combine)
prot |= _PAGE_CACHE_WC;
- else if (pat_wc_enabled)
+ else if (pat_wc_enabled || boot_cpu_data.x86 > 3)
/*
* ioremap() and ioremap_nocache() defaults to UC MINUS for now.
* To avoid attribute conflicts, request UC MINUS here
* aswell.
*/
prot |= _PAGE_CACHE_UC_MINUS;
- else if (boot_cpu_data.x86 > 3)
- prot |= _PAGE_CACHE_UC;
vma->vm_page_prot = __pgprot(prot);
diff --git a/arch/x86/pci/init.c b/arch/x86/pci/init.c
index dd30c6076b5d..e70b9c57b88e 100644
--- a/arch/x86/pci/init.c
+++ b/arch/x86/pci/init.c
@@ -33,6 +33,10 @@ static __init int pci_access_init(void)
printk(KERN_ERR
"PCI: Fatal: No config space access function found\n");
+ dmi_check_pciprobe();
+
+ dmi_check_skip_isa_align();
+
return 0;
}
arch_initcall(pci_access_init);
diff --git a/arch/x86/pci/k8-bus_64.c b/arch/x86/pci/k8-bus_64.c
index ab6d4b18a88f..5c2799c20e47 100644
--- a/arch/x86/pci/k8-bus_64.c
+++ b/arch/x86/pci/k8-bus_64.c
@@ -504,14 +504,6 @@ static int __init early_fill_mp_bus_info(void)
}
}
-#ifdef CONFIG_NUMA
- for (i = 0; i < BUS_NR; i++) {
- node = mp_bus_to_node[i];
- if (node >= 0)
- printk(KERN_DEBUG "bus: %02x to node: %02x\n", i, node);
- }
-#endif
-
for (i = 0; i < pci_root_num; i++) {
int res_num;
int busnum;
diff --git a/arch/x86/pci/pci.h b/arch/x86/pci/pci.h
index c58805a92db5..f3972b12c60a 100644
--- a/arch/x86/pci/pci.h
+++ b/arch/x86/pci/pci.h
@@ -38,6 +38,9 @@ enum pci_bf_sort_state {
pci_dmi_bf,
};
+extern void __init dmi_check_pciprobe(void);
+extern void __init dmi_check_skip_isa_align(void);
+
/* pci-i386.c */
extern unsigned int pcibios_max_latency;