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Diffstat (limited to 'arch/arm/boot/dts/imx7s.dtsi')
-rw-r--r--arch/arm/boot/dts/imx7s.dtsi109
1 files changed, 80 insertions, 29 deletions
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 1843fc053870..a72b59d88540 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -55,19 +55,6 @@
#address-cells = <1>;
#size-cells = <0>;
- idle-states {
- entry-method = "psci";
-
- cpu_sleep_wait: cpu-sleep-wait {
- compatible = "arm,idle-state";
- arm,psci-suspend-param = <0x0010000>;
- local-timer-stop;
- entry-latency-us = <100>;
- exit-latency-us = <50>;
- min-residency-us = <1000>;
- };
- };
-
cpu0: cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
@@ -75,7 +62,6 @@
clock-frequency = <792000000>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clks IMX7D_CLK_ARM>;
- cpu-idle-states = <&cpu_sleep_wait>;
};
};
@@ -149,16 +135,6 @@
};
};
- timer {
- compatible = "arm,armv7-timer";
- arm,cpu-registers-not-fw-configured;
- interrupt-parent = <&intc>;
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -208,6 +184,11 @@
};
};
+ caam_sm: caam-sm@100000 {
+ compatible = "fsl,imx7d-caam-sm", "fsl,imx6q-caam-sm";
+ reg = <0x100000 0x8000>;
+ };
+
funnel@30083000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0x30083000 0x1000>;
@@ -308,6 +289,17 @@
<0x31006000 0x2000>;
};
+ timer {
+ compatible = "arm,armv7-timer";
+ arm,cpu-registers-not-fw-configured;
+ interrupt-parent = <&intc>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ clock-frequency = <8000000>;
+ };
+
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
@@ -441,8 +433,9 @@
reg = <0x302d0000 0x10000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_GPT1_ROOT_CLK>,
- <&clks IMX7D_GPT1_ROOT_CLK>;
- clock-names = "ipg", "per";
+ <&clks IMX7D_GPT1_ROOT_CLK>,
+ <&clks IMX7D_GPT_3M_CLK>;
+ clock-names = "ipg", "per", "osc_per";
};
gpt2: timer@302e0000 {
@@ -591,6 +584,20 @@
};
};
+ irq_sec_vio: caam_secvio {
+ compatible = "fsl,imx6q-caam-secvio";
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ jtag-tamper = "disabled";
+ watchdog-tamper = "enabled";
+ internal-boot-tamper = "enabled";
+ external-pin-tamper = "disabled";
+ };
+
+ caam_snvs: caam-snvs@30370000 {
+ compatible = "fsl,imx6q-caam-snvs";
+ reg = <0x30370000 0x10000>;
+ };
+
snvs: snvs@30370000 {
compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
reg = <0x30370000 0x10000>;
@@ -605,6 +612,15 @@
clock-names = "snvs-rtc";
};
+ snvs_poweroff: snvs-poweroff {
+ compatible = "syscon-poweroff";
+ regmap = <&snvs>;
+ offset = <0x38>;
+ value = <0x60>;
+ mask = <0x60>;
+ status = "disabled";
+ };
+
snvs_pwrkey: snvs-powerkey {
compatible = "fsl,sec-v4.0-pwrkey";
regmap = <&snvs>;
@@ -641,6 +657,7 @@
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <3>;
interrupt-parent = <&intc>;
+ fsl,mf-mix-wakeup-irq = <0x54410000 0xc00 0x0 0x1040640>;
#power-domain-cells = <1>;
pgc {
@@ -704,6 +721,8 @@
clocks = <&clks IMX7D_ECSPI4_ROOT_CLK>,
<&clks IMX7D_ECSPI4_ROOT_CLK>;
clock-names = "ipg", "per";
+ dmas = <&sdma 6 7 1>, <&sdma 7 7 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -801,8 +820,11 @@
reg = <0x30730000 0x10000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>,
- <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>;
- clock-names = "pix", "axi";
+ <&clks IMX7D_CLK_DUMMY>,
+ <&clks IMX7D_CLK_DUMMY>;
+ assigned-clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_VIDEO_POST_DIV>;
+ clock-names = "pix", "axi", "disp_axi";
status = "disabled";
};
@@ -834,6 +856,11 @@
};
};
};
+
+ ddrc: ddrc@307a0000 {
+ compatible = "fsl,imx7-ddrc";
+ reg = <0x307a0000 0x10000>;
+ };
};
aips3: bus@30800000 {
@@ -859,6 +886,8 @@
clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
<&clks IMX7D_ECSPI1_ROOT_CLK>;
clock-names = "ipg", "per";
+ dmas = <&sdma 0 7 1>, <&sdma 1 7 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -871,6 +900,8 @@
clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
<&clks IMX7D_ECSPI2_ROOT_CLK>;
clock-names = "ipg", "per";
+ dmas = <&sdma 2 7 1>, <&sdma 3 7 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -883,6 +914,8 @@
clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
<&clks IMX7D_ECSPI3_ROOT_CLK>;
clock-names = "ipg", "per";
+ dmas = <&sdma 4 7 1>, <&sdma 5 7 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -905,6 +938,8 @@
clocks = <&clks IMX7D_UART2_ROOT_CLK>,
<&clks IMX7D_UART2_ROOT_CLK>;
clock-names = "ipg", "per";
+ dmas = <&sdma 24 4 0>, <&sdma 25 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -916,6 +951,8 @@
clocks = <&clks IMX7D_UART3_ROOT_CLK>,
<&clks IMX7D_UART3_ROOT_CLK>;
clock-names = "ipg", "per";
+ dmas = <&sdma 26 4 0>, <&sdma 27 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -1065,6 +1102,8 @@
clocks = <&clks IMX7D_UART4_ROOT_CLK>,
<&clks IMX7D_UART4_ROOT_CLK>;
clock-names = "ipg", "per";
+ dmas = <&sdma 28 4 0>, <&sdma 29 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -1076,6 +1115,8 @@
clocks = <&clks IMX7D_UART5_ROOT_CLK>,
<&clks IMX7D_UART5_ROOT_CLK>;
clock-names = "ipg", "per";
+ dmas = <&sdma 30 4 0>, <&sdma 31 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -1087,6 +1128,8 @@
clocks = <&clks IMX7D_UART6_ROOT_CLK>,
<&clks IMX7D_UART6_ROOT_CLK>;
clock-names = "ipg", "per";
+ dmas = <&sdma 32 4 0>, <&sdma 33 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -1098,6 +1141,8 @@
clocks = <&clks IMX7D_UART7_ROOT_CLK>,
<&clks IMX7D_UART7_ROOT_CLK>;
clock-names = "ipg", "per";
+ dmas = <&sdma 34 4 0>, <&sdma 35 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -1166,6 +1211,8 @@
<&clks IMX7D_USDHC1_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
+ fsl,tuning-step = <2>;
+ fsl,tuning-start-tap = <20>;
status = "disabled";
};
@@ -1178,6 +1225,8 @@
<&clks IMX7D_USDHC2_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
+ fsl,tuning-step = <2>;
+ fsl,tuning-start-tap = <20>;
status = "disabled";
};
@@ -1190,6 +1239,8 @@
<&clks IMX7D_USDHC3_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
+ fsl,tuning-step = <2>;
+ fsl,tuning-start-tap = <20>;
status = "disabled";
};
@@ -1229,7 +1280,7 @@
<&clks IMX7D_ENET_AXI_ROOT_CLK>,
<&clks IMX7D_ENET1_TIME_ROOT_CLK>,
<&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
- <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
+ <&clks IMX7D_ENET_PHY_REF_ROOT_DIV>;
clock-names = "ipg", "ahb", "ptp",
"enet_clk_ref", "enet_out";
fsl,num-tx-queues = <3>;
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-06 03:34:34 +0000