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authorHuang Shijie <b32955@freescale.com>2012-01-16 15:01:55 +0800
committerJason Liu <r64343@freescale.com>2012-01-19 12:41:33 +0800
commit9026b185a69e2c25bdbd904234e3301cc073418d (patch)
treed77e45881d71a440f07e35775003570f39d14f7c /sound
parenta1a43335ccbf5578eb48edbf16c11e53d76c0123 (diff)
ENGR00169906-5 GPMI : change the code for new interface
If we do not set the WAIT4END in the middle DMA command structure of the long DMA command chain, a DMA timeout may occurs. The reason of the DMA timeout is: [1] We do not set the WAIT4END in the DMA command structure which do the ECC READ PAGE by the BCH. [2] So the following DMA command structure (maybe in other DMA CHAIN)may disable the BCH module. [3] If the time delay between [2] and [1] is long enough, it's ok. But if the time delay is not long enough, the BCH module may become unnormal, so it can not finish its job. The DMA will timeout in this case. We have changed the DMA interface to fix the bug, now use the new interface. Acked-by: Jason Liu <r64343@freescale.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
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