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authorJeeja KP <jeeja.kp@intel.com>2015-12-18 15:11:59 +0530
committerMark Brown <broonie@kernel.org>2016-01-10 12:02:30 +0000
commita9c48f7f5906d02d4ec4aa50b1c20fccbce53eec (patch)
tree845f455a73f44b45c1f6d075ce73ab76b0363677 /include/sound
parent1e83b0475a6833a2cb88beeb79f095b0cf4b40db (diff)
ALSA: hdac: Add support for hda DMA Resume capability
Skylake sports new capability of DMA resume, DRSM where we can resume the DMA. This capability is defined by presence of AZX_DRSM_CAP_ID. If this capability is present, we use this capability. So we add: snd_hdac_ext_stream_drsm_enable() - DMA resume caps snd_hdac_ext_stream_set_dpibr() - set the DMA position snd_hdac_ext_stream_set_lpib() - set the lpib Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/sound')
-rw-r--r--include/sound/hda_register.h9
-rw-r--r--include/sound/hdaudio_ext.h14
2 files changed, 23 insertions, 0 deletions
diff --git a/include/sound/hda_register.h b/include/sound/hda_register.h
index 2ae8812d7b1a..28ac1f9a18ac 100644
--- a/include/sound/hda_register.h
+++ b/include/sound/hda_register.h
@@ -230,6 +230,15 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
#define AZX_MLCTL_SPA (1<<16)
#define AZX_MLCTL_CPA 23
+
+/* registers for DMA Resume Capability Structure */
+#define AZX_DRSM_CAP_ID 0x5
+#define AZX_REG_DRSM_CTL 0x4
+/* Base used to calculate the iterating register offset */
+#define AZX_DRSM_BASE 0x08
+/* Interval used to calculate the iterating register offset */
+#define AZX_DRSM_INTERVAL 0x08
+
/*
* helpers to read the stream position
*/
diff --git a/include/sound/hdaudio_ext.h b/include/sound/hdaudio_ext.h
index 425af0674557..f3454950ee0b 100644
--- a/include/sound/hdaudio_ext.h
+++ b/include/sound/hdaudio_ext.h
@@ -12,6 +12,7 @@
* @spbcap: SPIB capabilities pointer
* @mlcap: MultiLink capabilities pointer
* @gtscap: gts capabilities pointer
+ * @drsmcap: dma resume capabilities pointer
* @hlink_list: link list of HDA links
*/
struct hdac_ext_bus {
@@ -23,6 +24,7 @@ struct hdac_ext_bus {
void __iomem *spbcap;
void __iomem *mlcap;
void __iomem *gtscap;
+ void __iomem *drsmcap;
struct list_head hlink_list;
};
@@ -72,6 +74,9 @@ enum hdac_ext_stream_type {
* @pplc_addr: processing pipe link stream pointer
* @spib_addr: software position in buffers stream pointer
* @fifo_addr: software position Max fifos stream pointer
+ * @dpibr_addr: DMA position in buffer resume pointer
+ * @dpib: DMA position in buffer
+ * @lpib: Linear position in buffer
* @decoupled: stream host and link is decoupled
* @link_locked: link is locked
* @link_prepared: link is prepared
@@ -86,6 +91,10 @@ struct hdac_ext_stream {
void __iomem *spib_addr;
void __iomem *fifo_addr;
+ void __iomem *dpibr_addr;
+
+ u32 dpib;
+ u32 lpib;
bool decoupled:1;
bool link_locked:1;
bool link_prepared;
@@ -116,6 +125,11 @@ int snd_hdac_ext_stream_set_spib(struct hdac_ext_bus *ebus,
struct hdac_ext_stream *stream, u32 value);
int snd_hdac_ext_stream_get_spbmaxfifo(struct hdac_ext_bus *ebus,
struct hdac_ext_stream *stream);
+void snd_hdac_ext_stream_drsm_enable(struct hdac_ext_bus *ebus,
+ bool enable, int index);
+int snd_hdac_ext_stream_set_dpibr(struct hdac_ext_bus *ebus,
+ struct hdac_ext_stream *stream, u32 value);
+int snd_hdac_ext_stream_set_lpib(struct hdac_ext_stream *stream, u32 value);
void snd_hdac_ext_link_stream_start(struct hdac_ext_stream *hstream);
void snd_hdac_ext_link_stream_clear(struct hdac_ext_stream *hstream);