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authorZachary Amsden <zach@vmware.com>2007-05-02 19:27:19 +0200
committerAndi Kleen <andi@basil.nowhere.org>2007-05-02 19:27:19 +0200
commit142dd975911fdd82b1b6f6617cd20ac90a8ccf00 (patch)
tree1e72e96bce64d9301d3305b4dd0b30675c8676b0 /include/asm-i386/pgtable-3level.h
parentc2c1accd4b2f9c82fb89d40611c7f581948db255 (diff)
[PATCH] i386: pte xchg optimization
In situations where page table updates need only be made locally, and there is no cross-processor A/D bit races involved, we need not use the heavyweight xchg instruction to atomically fetch and clear page table entries. Instead, we can just read and clear them directly. This introduces a neat optimization for non-SMP kernels; drop the atomic xchg operations from page table updates. Thanks to Michel Lespinasse for noting this potential optimization. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'include/asm-i386/pgtable-3level.h')
-rw-r--r--include/asm-i386/pgtable-3level.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h
index 664bfee5a2f2..45b024181507 100644
--- a/include/asm-i386/pgtable-3level.h
+++ b/include/asm-i386/pgtable-3level.h
@@ -139,6 +139,17 @@ static inline void pud_clear (pud_t * pud) { }
#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \
pmd_index(address))
+/* local pte updates need not use xchg for locking */
+static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
+{
+ pte_t res;
+
+ res = *ptep;
+ native_pte_clear(NULL, 0, ptep);
+ return res;
+}
+
+#ifdef CONFIG_SMP
static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
{
pte_t res;
@@ -150,6 +161,9 @@ static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
return res;
}
+#else
+#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
+#endif
#define __HAVE_ARCH_PTE_SAME
static inline int pte_same(pte_t a, pte_t b)