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authorColin Cross <ccross@google.com>2010-08-01 20:05:38 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:35:22 -0800
commite6ff60a24e1fcc165c1b4ae1bace3e32db111928 (patch)
treeaf4fdfffe92b88ac9d5dc0bb2bf73cd1c98ca720 /drivers/serial
parente8e2d6962c70f3cd5b107abea452398a97439106 (diff)
serial: tegra_hsuart: Fix void return type on writel accessors
Signed-off-by: Colin Cross <ccross@google.com>
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/tegra_hsuart.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/serial/tegra_hsuart.c b/drivers/serial/tegra_hsuart.c
index 1ed206fb4c76..2433a8555270 100644
--- a/drivers/serial/tegra_hsuart.c
+++ b/drivers/serial/tegra_hsuart.c
@@ -117,20 +117,20 @@ static inline u8 uart_readb(struct tegra_uart_port *t, unsigned long reg)
return val;
}
-static inline u8 uart_writeb(struct tegra_uart_port *t, u8 val,
+static inline void uart_writeb(struct tegra_uart_port *t, u8 val,
unsigned long reg)
{
dev_vdbg(t->uport.dev, "%s: %p %03lx %02x\n",
__func__, t->uport.membase, reg << t->uport.regshift, val);
- return writeb(val, t->uport.membase + (reg << t->uport.regshift));
+ writeb(val, t->uport.membase + (reg << t->uport.regshift));
}
-static inline u8 uart_writel(struct tegra_uart_port *t, u32 val,
+static inline void uart_writel(struct tegra_uart_port *t, u32 val,
unsigned long reg)
{
dev_vdbg(t->uport.dev, "%s: %p %03lx %08x\n",
__func__, t->uport.membase, reg << t->uport.regshift, val);
- return writel(val, t->uport.membase + (reg << t->uport.regshift));
+ writel(val, t->uport.membase + (reg << t->uport.regshift));
}
static void tegra_set_baudrate(struct tegra_uart_port *t, unsigned int baud);