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authorMagnus Damm <damm@opensource.se>2010-11-17 10:59:31 +0000
committerPaul Mundt <lethal@linux-sh.org>2010-11-18 15:45:21 +0900
commit6d9598e24d50a8c72f48a3864327484a30aaee44 (patch)
tree4ff6d28a73306df0fe4853833010ca58a8ab8450 /drivers/serial/sh-sci.h
parent6d72ad35f1bfaf6e52ca7133cb51ce0e36f17528 (diff)
ARM: mach-shmobile: Initial AG5 and AG5EVM support
This patch adds initial support for Renesas SH-Mobile AG5. At this point the AG5 CPU support is limited to the ARM core, SCIF serial and a CMT timer together with L2 cache and the GIC. The AG5EVM board also supports Ethernet. Future patches will add support for GPIO, INTCS, CPGA and platform data / driver updates for devices such as IIC, LCDC, FSI, KEYSC, CEU and SDHI among others. The code in entry-macro.S will be cleaned up when the ARM IRQ demux code improvements have been merged. Depends on the AG5EVM mach-type recently registered but not yet present in arch/arm/tools/mach-types. As the AG5EVM board comes with 512MiB memory it is recommended to turn on HIGHMEM. Many thanks to Yoshii-san for initial bring up. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/serial/sh-sci.h')
-rw-r--r--drivers/serial/sh-sci.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index d2352ac437c5..4bc614e4221c 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -31,6 +31,7 @@
# define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0
#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SH73A0) || \
defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372)
@@ -244,6 +245,7 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SH73A0) || \
defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372)
@@ -280,6 +282,7 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SH73A0) || \
defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372)
@@ -378,6 +381,7 @@
}
#if defined(CONFIG_CPU_SH3) || \
+ defined(CONFIG_ARCH_SH73A0) || \
defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372)
@@ -391,6 +395,7 @@
#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SH73A0) || \
defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377)
#define SCIF_FNS(name, scif_offset, scif_size) \
@@ -433,6 +438,7 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SH73A0) || \
defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377)
@@ -632,6 +638,7 @@ static inline int sci_rxd_in(struct uart_port *port)
#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SH73A0) || \
defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372)