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authorXu Yang <xu.yang_2@nxp.com>2022-05-24 12:07:02 +0800
committerXu Yang <xu.yang_2@nxp.com>2022-07-26 17:30:41 +0800
commitbb5128a7bac7103238916e83cffa3e00e356089f (patch)
tree61c9194b5d9fb55d3b4bb78328e93cbcbaebc004 /drivers/perf/Kconfig
parent16600080ac6d3e1cca61c04103e79b3f4094046d (diff)
MLK-25920-1 perf: imx9_ddr: add driver for i.MX9 DDR PerfMon
Add driver for i.MX9 DDR PerfMon. Usage: 1. cycles event # perf stat -a -I 1000 -e imx9_ddr0/cycles,counter=0/ or perf stat -a -I -e 1000 imx9_ddr0/cycles/ 2. reference events # perf stat -a -I 1000 -e imx9_ddr0/ddrc_ddrc1_rmw_for_ecc,counter=X/ 3. counter specific events, such as counter 5 # perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pmon_ld_rdq1,counter=5/ Axi filtering feature: 4. for read transaction: # perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_rd_trans_filt,counter=2,axi_mask=ID_MASK,axi_id=ID/ 5. for write transaction: # perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_wr_trans_filt,counter=3,axi_mask=ID_MASK,axi_id=ID/ 6. for read beat: # perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_rd_beat_filt,counter=4,axi_mask=ID_MASK,axi_id=ID/ For example (for cortex-a55): # perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_rd_trans_filt,counter=2,axi_mask=0xe00f,axi_id=0x0006/ # perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_wr_trans_filt,counter=3,axi_mask=0xe00f,axi_id=0x0006/ # perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_rd_beat_filt,counter=4,axi_mask=0xe00f,axi_id=0x0006/ v2: - using platform_get_irq() Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'drivers/perf/Kconfig')
-rw-r--r--drivers/perf/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig
index 77522e5efe11..1b5ca02e5ded 100644
--- a/drivers/perf/Kconfig
+++ b/drivers/perf/Kconfig
@@ -86,6 +86,14 @@ config FSL_IMX8_DDR_PMU
can give information about memory throughput and other related
events.
+config FSL_IMX9_DDR_PMU
+ tristate "Freescale i.MX9 DDR perf monitor"
+ depends on ARCH_MXC
+ help
+ Provides support for the DDR performance monitor in i.MX9, which
+ can give information about memory throughput and other related
+ events.
+
config QCOM_L2_PMU
bool "Qualcomm Technologies L2-cache PMU"
depends on ARCH_QCOM && ARM64 && ACPI