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authorKeith Busch <keith.busch@intel.com>2018-01-24 17:03:18 -0600
committerBjorn Helgaas <helgaas@kernel.org>2018-01-26 16:49:40 -0600
commiteed85ff4c0da72640dcf7c0737c5a08bca2958e7 (patch)
treeea6c3e9286e0d3bf2d36f6fa7eac37bde287c9d6 /drivers/pci/pcie/Kconfig
parentaa6ca5a9d7d08bc151f9de6101fe466fae4255c0 (diff)
PCI/DPC: Enable DPC only if AER is available
The "Determination of DPC Control" implementation note in PCIe r4.0, sec 6.1.10, recommends the operating system always link DPC control to the control of AER, as the two functionalities are strongly connected. To avoid conflicts over whether platform firmware or the OS controls DPC, enable DPC only if AER is enabled in the OS, and the device's error handling does not have firmware-first AER handling. Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Diffstat (limited to 'drivers/pci/pcie/Kconfig')
-rw-r--r--drivers/pci/pcie/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig
index ac53edbc9613..d658dfa53b87 100644
--- a/drivers/pci/pcie/Kconfig
+++ b/drivers/pci/pcie/Kconfig
@@ -92,7 +92,7 @@ config PCIE_PME
config PCIE_DPC
bool "PCIe Downstream Port Containment support"
- depends on PCIEPORTBUS
+ depends on PCIEPORTBUS && PCIEAER
default n
help
This enables PCI Express Downstream Port Containment (DPC)