diff options
author | Jason Chen <b02280@freescale.com> | 2009-12-23 14:11:43 +0800 |
---|---|---|
committer | Alejandro Gonzalez <alex.gonzalez@digi.com> | 2010-05-24 11:50:01 +0200 |
commit | b38f4afe4f271827cbc1ab7fc7f9d4e1c01437ef (patch) | |
tree | 520e0f3d4e2030be21e04390f8fe976672a8dfa3 /drivers/mxc | |
parent | 82e36c9848fb95f971fd85e123e61b2baa94906f (diff) |
ENGR00119531 ipuv3: dmfc setting restore during resume
dmfc setting should be restored after system resume.
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
Diffstat (limited to 'drivers/mxc')
-rw-r--r-- | drivers/mxc/ipu3/ipu_common.c | 7 | ||||
-rw-r--r-- | drivers/mxc/ipu3/ipu_prv.h | 1 |
2 files changed, 6 insertions, 2 deletions
diff --git a/drivers/mxc/ipu3/ipu_common.c b/drivers/mxc/ipu3/ipu_common.c index 16e7f01605fb..8065145f7125 100644 --- a/drivers/mxc/ipu3/ipu_common.c +++ b/drivers/mxc/ipu3/ipu_common.c @@ -1077,8 +1077,11 @@ int32_t ipu_init_channel_buffer(ipu_channel_t channel, ipu_buffer_t type, } else if (_ipu_is_irt_chan(dma_chan)) { _ipu_ch_param_set_burst_size(dma_chan, 8); _ipu_ch_param_set_block_mode(dma_chan); - } else if (_ipu_is_dmfc_chan(dma_chan)) + } else if (_ipu_is_dmfc_chan(dma_chan)) { + spin_lock_irqsave(&ipu_lock, lock_flags); _ipu_dmfc_set_wait4eot(dma_chan, width); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + } if (_ipu_chan_is_interlaced(channel)) { _ipu_ch_param_set_interlaced_scan(dma_chan); @@ -2406,7 +2409,7 @@ static int ipu_resume(struct platform_device *pdev) __raw_writel(idma_enable_reg[1], IDMAC_CHA_EN(32)); } else { clk_enable(g_ipu_clk); - _ipu_dmfc_init(DMFC_NORMAL, 0); + _ipu_dmfc_init(dmfc_type_setup, 1); _ipu_init_dc_mappings(); /* Set sync refresh channels as high priority */ diff --git a/drivers/mxc/ipu3/ipu_prv.h b/drivers/mxc/ipu3/ipu_prv.h index 8947ee7fe921..213ded04c87d 100644 --- a/drivers/mxc/ipu3/ipu_prv.h +++ b/drivers/mxc/ipu3/ipu_prv.h @@ -29,6 +29,7 @@ extern struct clk *g_pixel_clk[2]; extern struct clk *g_csi_clk[2]; extern unsigned char g_dc_di_assignment[]; extern int g_ipu_hw_rev; +extern int dmfc_type_setup; #define IDMA_CHAN_INVALID 0xFF #define HIGH_RESOLUTION_WIDTH 1024 |