diff options
author | Daiane Angolini <daiane.angolini@foundries.io> | 2022-07-11 08:54:38 -0300 |
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committer | Daiane Angolini <daiane.angolini@foundries.io> | 2022-07-11 08:54:38 -0300 |
commit | 6d5d44ccd4eb52e4e467fb61c20d3c2c7d220d2b (patch) | |
tree | 1daeac33277273f3f8f286f5e587d66a54d2dc01 /drivers/mtd/nand/raw/gpmi-nand | |
parent | fa6c3168595c02bd9d5366fcc28c9e7304947a3d (diff) | |
parent | bc2e851e616a4d109669322f94102d1a763dbd82 (diff) |
Merge branch 'local/v5.15.33' into 5.15.32-2.0.0
This is the 5.15.33 stable release
Files which conflict can cause problem in future:
drivers/clk/imx/clk-imx8qxp-lpcg.c
reverted:
4b8a71f206c94445317179b79d7f91996f40dcfc clk: imx: off by one in imx_lpcg_parse_clks_from_dt()
drivers/mailbox/imx-mailbox.c
e8d90d8901e42f9ac039086af9f1829030204fa8 MLK-25649-4 mailbox: imx: Add support for identifying SCU wakeup source from sysfs
security/keys/trusted-keys/trusted_core.c
ae82e852ca1b899e936c02859c18a80467901b2f KEYS: trusted: allow use of TEE as backend without TCG_TPM support
Signed-off-by: Daiane Angolini <daiane.angolini@foundries.io>
Diffstat (limited to 'drivers/mtd/nand/raw/gpmi-nand')
-rw-r--r-- | drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c index 1d00cc8f1df9..7f79bd85505a 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -853,6 +853,7 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_data *this, const struct nand_sdr_timings *sdr) { struct gpmi_nfc_hardware_timing *hw = &this->hw; + struct resources *r = &this->resources; unsigned int dll_threshold_ps = this->devdata->max_chain_delay; unsigned int period_ps, reference_period_ps; unsigned int data_setup_cycles, data_hold_cycles, addr_setup_cycles; @@ -876,6 +877,8 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_data *this, wrn_dly_sel = BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } + hw->clk_rate = clk_round_rate(r->clock[0], hw->clk_rate); + /* SDR core timings are given in picoseconds */ period_ps = div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); |