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authorVincent Palatin <vpalatin@chromium.org>2011-04-12 10:55:58 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2011-05-26 19:45:31 +0200
commite6f1945b9e71cbc8498e5fbf8d5352331ac5da14 (patch)
tree00e733fd5e826854f3876e38195adec8df50c9ee /drivers/mfd
parentea91db527cd73a4401d10a1fd730f06ce9a363c7 (diff)
mfd: Fix tps6586x GPIO value setting
In the current code, every time we set a TPS6586x GPIO pin, the tps6586x_gpio_set function is resetting all other GPIO pins. We need to update the right GPIOxOUT bit of the GPIOSET2 register instead of overriding the full value. Tested by setting sequentially GPIO2 and GPIO3 and verifying the pins voltage. Change-Id: I560edde146c5425cce37432c4ee91569eea5adcf Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd')
-rw-r--r--drivers/mfd/tps6586x.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mfd/tps6586x.c b/drivers/mfd/tps6586x.c
index b600808690c1..bba26d96c240 100644
--- a/drivers/mfd/tps6586x.c
+++ b/drivers/mfd/tps6586x.c
@@ -270,8 +270,8 @@ static void tps6586x_gpio_set(struct gpio_chip *chip, unsigned offset,
{
struct tps6586x *tps6586x = container_of(chip, struct tps6586x, gpio);
- __tps6586x_write(tps6586x->client, TPS6586X_GPIOSET2,
- value << offset);
+ tps6586x_update(tps6586x->dev, TPS6586X_GPIOSET2,
+ value << offset, 1 << offset);
}
static int tps6586x_gpio_output(struct gpio_chip *gc, unsigned offset,