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authorAlex Deucher <alexander.deucher@amd.com>2013-08-12 11:35:02 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-08-30 16:30:38 -0400
commit1bd4cff651350380f9fb6847313cb78e84c03846 (patch)
treeaf8c8683a8d2b9195e8ac378ef8d5d3811689785 /drivers/gpu/drm/radeon/ni_dpm.c
parentf75195cac32bfd2ef07764bd370d3b788bd8b003 (diff)
drm/radeon/dpm: adjust the vblank time checks for eg, ni, si
According to the internal teams, we never hit the limit for mclk switching on these asics, so we can disable the check. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/ni_dpm.c')
-rw-r--r--drivers/gpu/drm/radeon/ni_dpm.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
index f0f5f748938a..238078c2b319 100644
--- a/drivers/gpu/drm/radeon/ni_dpm.c
+++ b/drivers/gpu/drm/radeon/ni_dpm.c
@@ -769,7 +769,8 @@ bool ni_dpm_vblank_too_short(struct radeon_device *rdev)
{
struct rv7xx_power_info *pi = rv770_get_pi(rdev);
u32 vblank_time = r600_dpm_get_vblank_time(rdev);
- u32 switch_limit = pi->mem_gddr5 ? 450 : 300;
+ /* we never hit the non-gddr5 limit so disable it */
+ u32 switch_limit = pi->mem_gddr5 ? 450 : 0;
if (vblank_time < switch_limit)
return true;