diff options
| author | Matthew Auld <matthew.auld@intel.com> | 2017-10-06 23:18:23 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-10-07 10:11:54 +0100 |
| commit | 8cb0983678e05939457d867e09bddb6883db5268 (patch) | |
| tree | 64b17f86907191c5a93d025745f069aca336d65d /drivers/gpu/drm/i915/i915_gem_gtt.h | |
| parent | 9a6330cff9b4b0691c7554fe873b09e7f6d377a9 (diff) | |
drm/i915: disable GTT cache for 2M pages
When SW enables the use of 2M/1G pages, it must disable the GTT cache.
v2: don't disable for Cherryview which doesn't even support 48b PPGTT!
v3: explicitly check that the system does support 2M/1G pages
v4: split WA and decision logic
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171006145041.21673-12-matthew.auld@intel.com
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20171006221833.32439-11-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_gtt.h')
0 files changed, 0 insertions, 0 deletions