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authorImre Deak <imre.deak@intel.com>2018-06-08 17:41:37 +0300
committerImre Deak <imre.deak@intel.com>2018-06-11 14:01:43 +0300
commit602a9de513d5a43ecaf7d0443eca41656165d3c4 (patch)
tree672faaf0e0eaba4e37ac6ccfbe17b8323ed1e920 /drivers/gpu/drm/i915/i915_gem_gtt.h
parent2b9a820318ebdf81f666be4daf7414d98123fefb (diff)
drm/i915/skl: Add warn about unsupported CDCLK rates
While checking workarounds related to the CDCLK PLL, I noticed that the DMC firmware bits for WA#1183 are missing for SKL. After that I clarified with HW people that it's not needed on SKL, since it doesn't support eDP1.4 which would be the only thing requiring the problematic CDCLK clock rates. So in theory we shouldn't ever choose these frequencies, but add an assert in any case for catching such cases and for documentation. v2: - Move the check to skl_set_cdclk and warn whenever using the corresponding VCO freq. (Ville) v3: - Actually check for the platform. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180608144137.7943-1-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_gtt.h')
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