diff options
author | Wenjing Liu <Wenjing.Liu@amd.com> | 2019-11-13 17:03:37 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-12-05 16:31:33 -0500 |
commit | dcd65857a7815ef94735f73d01e0d0d7e1ff2090 (patch) | |
tree | a5a08deab47f2c75d0d4d43bd63a086ea1c27414 /drivers/gpu/drm/amd/display/dc/dc_dsc.h | |
parent | 5c7b0f38522e702ce0143a9ef62908eb953808ac (diff) |
drm/amd/display: add dc dsc functions to return bpp range for pixel encoding
[why]
Need to support 6 bpp for 420 pixel encoding only.
[how]
Add a dc function to determine what bpp range can be supported
for given pixel encoding.
Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_dsc.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_dsc.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dsc.h b/drivers/gpu/drm/amd/display/dc/dc_dsc.h index cc9915e545cd..d98b89bad353 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_dsc.h +++ b/drivers/gpu/drm/amd/display/dc/dc_dsc.h @@ -52,8 +52,8 @@ bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data, bool dc_dsc_compute_bandwidth_range( const struct display_stream_compressor *dsc, const uint32_t dsc_min_slice_height_override, - const uint32_t min_kbps, - const uint32_t max_kbps, + const uint32_t min_bpp, + const uint32_t max_bpp, const struct dsc_dec_dpcd_caps *dsc_sink_caps, const struct dc_crtc_timing *timing, struct dc_dsc_bw_range *range); @@ -65,4 +65,8 @@ bool dc_dsc_compute_config( uint32_t target_bandwidth_kbps, const struct dc_crtc_timing *timing, struct dc_dsc_config *dsc_cfg); + +bool dc_dsc_get_bpp_range_for_pixel_encoding(enum dc_pixel_encoding pixel_enc, + uint32_t *min_bpp, + uint32_t *max_bpp); #endif |