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authorBen Dooks <ben.dooks@codethink.co.uk>2015-03-16 11:52:43 +0000
committerVinod Koul <vinod.koul@intel.com>2015-03-18 22:41:48 +0530
commit3a2307f72e684199a27ae9d8e7cfd98e8b05c8db (patch)
tree901fdc25402dec229efbd9658632297f36cc90a4 /drivers/dma/pl330.c
parent57c0342239b028db54741209a051a4d5f7c857e7 (diff)
dmaengine: pl330: fix issues with big-endian armv7
When running Xilinx Zynq in big-endian mode the pl330 driver fails to pass the dmatest suite. To fix this, ensure all non byte values are written in little endian. As a note, the documentation does not mention if it will do big-endian descriptor fetches, only that it will swap the data in flight. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> -- Vinod Koul <vinod.koul@intel.com> Dan Williams <dan.j.williams@intel.com> DMA List <dmaengine@vger.kernel.org> Maxime Ripard <maxime.ripard@free-electrons.com> Jassi Brar <jassisinghbrar@gmail.com> Liviu Dudau <Liviu.Dudau@arm.com> Linux ARM Kernel <linux-arm-kernel@lists.infradead.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/pl330.c')
-rw-r--r--drivers/dma/pl330.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 0e1f56772855..f76c94c148f4 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -556,7 +556,7 @@ static inline u32 _emit_ADDH(unsigned dry_run, u8 buf[],
buf[0] = CMD_DMAADDH;
buf[0] |= (da << 1);
- *((u16 *)&buf[1]) = val;
+ *((__le16 *)&buf[1]) = cpu_to_le16(val);
PL330_DBGCMD_DUMP(SZ_DMAADDH, "\tDMAADDH %s %u\n",
da == 1 ? "DA" : "SA", val);
@@ -710,7 +710,7 @@ static inline u32 _emit_MOV(unsigned dry_run, u8 buf[],
buf[0] = CMD_DMAMOV;
buf[1] = dst;
- *((u32 *)&buf[2]) = val;
+ *((__le32 *)&buf[2]) = cpu_to_le32(val);
PL330_DBGCMD_DUMP(SZ_DMAMOV, "\tDMAMOV %s 0x%x\n",
dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val);
@@ -888,7 +888,7 @@ static inline u32 _emit_GO(unsigned dry_run, u8 buf[],
buf[1] = chan & 0x7;
- *((u32 *)&buf[2]) = addr;
+ *((__le32 *)&buf[2]) = cpu_to_le32(addr);
return SZ_DMAGO;
}
@@ -928,7 +928,7 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
}
writel(val, regs + DBGINST0);
- val = *((u32 *)&insn[2]);
+ val = le32_to_cpu(*((__le32 *)&insn[2]));
writel(val, regs + DBGINST1);
/* If timed out due to halted state-machine */