diff options
| author | Sumit Singh <sumsingh@nvidia.com> | 2014-01-13 11:54:48 +0530 |
|---|---|---|
| committer | Sachin Nikam <snikam@nvidia.com> | 2014-02-25 04:08:49 -0800 |
| commit | e392dd5d6fa08ab41a65f719e0db7e17e607c0c7 (patch) | |
| tree | ab7eff244908b1172356a02d02afe29a9317f5c3 /drivers/clocksource | |
| parent | 2e717fd62d7508aafd69d7c58556e21206f3e20d (diff) | |
ARM: tegra: move timerinfo to drivers/misc/
Bug 1380001
Change-Id: I0cb9a887ad85b67ba14626e3ab5543525cf26a00
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/354930
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/tegra-nvtimers.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/clocksource/tegra-nvtimers.c b/drivers/clocksource/tegra-nvtimers.c index 219ab865dc34..dbaecd3ca0b1 100644 --- a/drivers/clocksource/tegra-nvtimers.c +++ b/drivers/clocksource/tegra-nvtimers.c @@ -1,12 +1,12 @@ /* - * arch/arch/mach-tegra/timer.c + * drivers/clocksource/tegra-nvtimers.c * * Copyright (C) 2010 Google, Inc. * * Author: * Colin Cross <ccross@google.com> * - * Copyright (C) 2010-2013 NVIDIA CORPORATION. All rights reserved. + * Copyright (C) 2010-2014 NVIDIA CORPORATION. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -45,6 +45,7 @@ #endif void __iomem *timer_reg_base; +phys_addr_t timer_reg_base_pa; static void __iomem *rtc_base; /* set to 1 = busy every eight 32kHz clocks during copy of sec+msec to AHB */ @@ -519,12 +520,17 @@ void __init tegra_init_timer(struct device_node *np) struct clk *clk; int ret; unsigned long rate; + struct resource res; - timer_reg_base = of_iomap(np, 0); + if (of_address_to_resource(np, 0, &res)) + pr_err("%s:No memory resources found\n", __func__); + + timer_reg_base = ioremap(res.start, resource_size(&res)); if (!timer_reg_base) { pr_err("%s:Can't map timer registers\n", __func__); BUG(); } + timer_reg_base_pa = res.start; tegra_timer_irq.irq = irq_of_parse_and_map(np, 0); if (tegra_timer_irq.irq <= 0) { |