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authorTaniya Das <tdas@codeaurora.org>2019-02-11 13:09:27 +0530
committerStephen Boyd <sboyd@kernel.org>2019-02-21 14:18:12 -0800
commit96dc791d0b9e12f6374a80f00ad9304b9df2efee (patch)
treecf91560567ec2d7c7e7841fac5780b708b4404fc /drivers/clk/qcom/clk-rcg.h
parentfe6b580ec64cc8b32c4f5ee3db4a994471e1e4c1 (diff)
clk: qcom: clk-rcg2: Introduce a cfg offset for RCGs
The RCG CFG/M/N/D register base could be at a different offset than the CMD register, so introduce a cfg_offset to identify the offset with respect to the CMD RCGR register. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Anu Ramanathan <anur@codeaurora.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/clk-rcg.h')
-rw-r--r--drivers/clk/qcom/clk-rcg.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h
index 91336a030179..c25b57c3cbc8 100644
--- a/drivers/clk/qcom/clk-rcg.h
+++ b/drivers/clk/qcom/clk-rcg.h
@@ -138,6 +138,7 @@ extern const struct clk_ops clk_dyn_rcg_ops;
* @parent_map: map from software's parent index to hardware's src_sel field
* @freq_tbl: frequency table
* @clkr: regmap clock handle
+ * @cfg_off: defines the cfg register offset from the CMD_RCGR + CFG_REG
*/
struct clk_rcg2 {
u32 cmd_rcgr;
@@ -147,6 +148,7 @@ struct clk_rcg2 {
const struct parent_map *parent_map;
const struct freq_tbl *freq_tbl;
struct clk_regmap clkr;
+ u8 cfg_off;
};
#define to_clk_rcg2(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg2, clkr)